ASM3I1819CSR - Alliance Semiconductor

Alliance Semiconductor

2595, Augustine Drive • Santa Clara • CA 95054 • Tel 408 855 4900 • Fax 408 855 4999 • www.alsc.com

October 2003 ASM3P1819A-H

rev 1.0

Notice: The information in this document is subject to change without notice.

Peak Reducing EMI Solution

Features

• FCC approved method of EMI

attenuation.

• Provides up to 15dB EMI reduction.

• Generates a low EMI spread spectrum

clock and a non-spread reference clock

of the input frequency.

• Optimized for frequency range from

20MHz to 40MHz.

• Internal loop filter minimizes external

components and board space.

• Selectable spread options: Down and

Center Spread.

• Low inherent cycle-to-cycle jitter.

• Eight Spread % Selections:

o ± 0.625% to –3.5%.

• 3.3V operating voltage.

• CMOS/TTL compatible inputs and

outputs.

• Low-power CMOS design.

• Supports notebook VGA and other LCD

timing controller applications.

• Power down function for mobile

application.

• Products are available for industrial

temperature range.

• Available in 8-pin SOIC and TSSOP

packages.

Product Description

The ASM3P1819x is a versatile spread

spectrum frequency modulator designed

specifically for input clock frequencies from

20MHz to 40MHz. The ASM3P1819x can

generate an EMI reduced clock form an OSC or

a system-generated clock. The ASM3P1819x

offers Down and Center spread options with

different percentage deviations. (Refer Spread

Deviation Selections Table.)

The ASM3P1819x reduces electromagnetic

interference (EMI) at the clock source, allowing

system wide reduction of EMI of down stream

clock and data dependent signals. The

ASM3P1819x allows significant system cost

savings by reducing the number of circuit board

layers and shielding that are traditionally

required to pass EMI regulations.

The ASM3P1819x modulates the output of a

single PLL in order to “spread” the bandwidth of

a synthesized clock, thereby decreasing the

peak amplitudes of its harmonics. This results in

significantly lower system EMI compared to the

typical narrow band signal produced by

oscillators and most clock generators. Lowering

EMI by increasing a signal’s bandwidth is called

spread spectrum clock generation.

The ASM3P1819x uses the most efficient and

optimized modulation profile approved by the

FCC and is implemented by using a proprietary

all-digital method.

Applications

The ASM3P1819x is targeted towards EMI

management for memory and LVDS interfaces

in mobile graphic chipsets and high-speed digital

applications such as PC peripheral devices,

consumer electronics, and embedded controller

systems.

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Octoberr 2003 ASM3P1819A-H

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Notice: The information in this document is subject to change without notice.

Block Diagram

Pin Diagram

Pin Description

Pin Name

Pin#

ASM3P1819A-D ASM3P1819E-H

Type Description

1 XIN XIN I Connect to externally generated clock signal or crystal.

2 VSS VSS P Ground to entire chip.

3 D_C I

Digital logic input used to select Down (LOW) or Center

(HIGH) spread options (Refer Spread Deviation

Selection Table.) This pin has an internal pull-up

resistor.

3 SRS I

Spread range select. Digital logic input used to select

frequency deviation (Refer Spread Deviation Selection

Table.)

4 ModOUT ModOUT O Spread spectrum clock output.

5 REF REF O

Un-modulated reference output clock of the input

frequency.

6 PD# PD# I

Power-Down control pin. Pull LOW to enable Power-

Down mode. This pin has an internal pull-up resistor.

7 VDD REF P Connect to +3.3V.

8 XOUT XOUT O

Crystal connection. If connected to an externally

generated clock, this pin must be left unconnected.

XIN

VSS

4 5

SRS

REF

XOUT

PD#

VDD

ModOUT

ASM3P1819

-D

VSS

XIN

Crystal

Oscillator

Frequency

Divide

Feedback

Divide

Modulation

Phase

Detecto

Loop

Filte

VCO Output

Divide

ModOUT

PLL

VDD

D_C

XOUT

PD#

REF

SRS

XIN

VSS

4 5

D_C

REF

XOUT

PD#

VDD

ModOUT

SM3P1819E-H

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Octoberr 2003 ASM3P1819A-H

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Notice: The information in this document is subject to change without notice.

Input Frequency and Modulation Rate

Part Number Input Frequency Range

(MHz)

Output Frequency Range

(MHz) Modulation Rate

ASM3P1819A-H 20 to 40 20 to 40 Input frequency / 512

Spread Deviation Selections

Part Number SRS D-C Spread Deviation

0 - 2.5% (Down)

ASM3P1819A 1 N/A -3.50% (Down)

0 - 1.25% (Down)

ASM3P1819B 1 N/A -1.75% (Down)

0 ±1.25% (Center)

ASM3P1819C 1 N/A ± 1.75% (Center)

0 ±0.625% (Center)

ASM3P1819D 1 N/A ±0.875 % (Center)

0 - 1.25% (Down)

ASM3P1819E N/A 1 ± 0.625% (Center)

0 - 2.5% (Down)

ASM3P1819F N/A 1 ± 1.25% (Center)

0 - 1.75% (Down)

ASM3P1819G N/A 1 ± 0.875% (Center)

0 - 3.5% (Down)

ASM3P1819H N/A 1 ±3.50% (Center)

Absolute Maximum Ratings

Symbol Parameter Rating Unit

VDD, VIN Voltage on any pin with respect to GND -0.5 to + 7.0 V

TSTG Storage temperature -65 to +125 °C

TA Operating temperature 0 to 70 °C

Note: These are stress ratings only and functional operation is not implied. Exposure to absolute

maximum ratings for extended periods may affect device reliability.

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DC Electrical Characteristics

Unless otherwise noted, VDD = 3.3V and TA =25°C

Symbol Parameter Min Typ Max Unit

VIL Input low voltage GND – 0.3 - 0.8 V

VIH Input high voltage 2.00 - VDD + 0.3 V

IIL Input low current (inputs D_C, PD#) -60.0 - -20.0 µA

IIH Input high current - - 1.00 µA

IXOL X

OUT output low current (@ 0.4V, VDD = 3.3V) 2.00 - 12.00 mA

IXOH X

OUT output high current (@2.5V, VDD = 3.3V) - - 12.00 mA

VOL Output low voltage (VDD = 3.3V, IOL = 20mA) - - 0.4 V

VOH Output high voltage (VDD = 3.3V, IOH = 20mA) 2.8 - - V

ICC Dynamic supply current normal mode (3.3V and

10pF loading) 7.1 fIN - min - 26.9 fIN - max mA

IDD Static supply current standby mode - 4.5 - mA

VDD Operating voltage - 3.3 - V

tON Power up time (first locked clock cycle after power

up) - 0.18 - mS

ZOUT Clock output impedance - 50 - Ω

AC Electrical Characteristics

Symbol Parameter Min Typ Max Unit

fIN Input frequency 20 - 40 MHz

fOUT Output frequency 20 - 40 MHz

tLH* Output rise time (measured at 0.8V to 2.0V) - 0.69 - ns

tHL* Output fall time (measured at 2.0V to 0.8V) - 0.66 - ns

tJC Jitter (cycle to cycle) -200 - 200 ps

tD Output duty cycle 45 50 55 %

* tLH and tHL are measured into a capacitive load of 15pF

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Package Information

8-Pin SOIC

Symbol Dimensions in inches Dimensions in millimeters

Min Max Min Max

A 0.053 0.069 1.35 1.75

A1 0.004 0.010 0.10 0.25

A2 0.053 0.069 1.35 1.75

B 0.013 0.022 0.33 0.53

C 0.007 0.012 0.33 0.53

D 0.188 0.197 4.78 5.00

E 0.150 0.158 3.80 4.01

e 0.050 BSC 1.27 BSC

H 0.228 0.244 5.80 6.20

L 0.016 0.035 0.40 0.89

θ 0° 8° 0° 8°

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8-Pin TSSOP

Dimensions in inches Dimensions in millimeters

Symbol Min Max Min Max

A 0.043 1.10

A1 0.002 0.006 0.05 0.15

A2 0.033 0.037 0.85 0.95

B 0.008 0.012 0.19 0.30

C 0.004 0.008 0.09 0.20

D 0.114 0.122 2.90 3.10

E 0.169 0.177 4.30 4.50

e 0.026 BSC 0.65 BSC

H 0.244 0.260 6.20 6.60

L 0.020 0.028 0.50 0.70

θ 0° 8° 0° 8°

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Octoberr 2003 ASM3P1819A-H

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Notice: The information in this document is subject to change without notice.

Ordering Information

Part Number Package Configuration Temperature Range

ASM3P1819xST 8-Pin SOIC Tube Commercial

ASM3P1819xSR 8-Pin SOIC Tape and Reel Commercial

ASM3P1819xTT 8-Pin TSSOP Tube Commercial

ASM3P1819xTR 8-Pin TSSOP Tape and Reel Commercial

ASM3I1819xST 8-Pin SOIC Tube Industrial

ASM3I1819xSR 8-Pin SOIC Tape and Reel Industrial

ASM3I1819xTT 8-Pin TSSOP Tube Industrial

ASM3I1819xTR 8-Pin TSSOP Tape and Reel Industrial

Device Ordering Information

ASM3P1819xST

Licensed under US patent numbers 5,488,627 and 5,631,920.

OR - SOT23/T/R SR - SOIC, T/R

TT – TSSOP, TUBE QR – QFN, T/R

TR - TSSOP, T/R QT - QFN, TUBE

VT – TVSOP, TUBE BT - BGA, TUBE

VR – TVSOP, T/R BR – BGA, T/R

ST – SOIC, TUBE

X = A/B/C/D/E/F/G/H

PART NUMBER

lliance Semiconductor Mixed Signal Product

X = Automotive I = Industrial P or n/c = Commercial

1 – reserved 6 – power management

2 - Non PLL based 7 – power management

3 – EMI Reduction 8 – power management

4 – DDR support products 9 – Hi performance

–

STD Zero Dela

Buffe

0 - reserved

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Octoberr 2003 ASM3P1819A-H

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Notice: The information in this document is subject to change without notice.

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assumes no responsibility for any errors that may appear in this document. The data contained herein represents Alliance's best

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If the product described herein is under development, significant changes to these specifications are possible. The information in

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Alliance Semiconductor Corporation

2595, Augustine Drive,

Santa Clara, CA 95054

Tel# 408-855-4900

Fax: 408-855-4999

www.alsc.com

Part Number: ASM3P1819A-H

Document Version: v1.0