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Model XC0900
EH
-
03
Rev B
Hybrid Coupler
3 dB, 90°
°°
°
Description
The XC0900EH is a low profile, high performance 3dB hybrid coupler in a
new easy to use, manufacturing friendly surface mount package. It is
designed for AMPS band applications. The XC0900EH is designed
particularly for balanced power and low noise amplifiers, plus signal
distribution and other applications where low insertion loss and tight
amplitude and phase balance is required. It can be used in high power
applications up to 80 watts.
Parts have been subjected to rigorous qualification testing and they are
manufactured using materials with coefficients of thermal expansion (CTE)
compatible with common substrates such as FR4, G-10, RF-35, RO4350,
and polyimide.
Electrical Specifications
**
Frequency Isolation Insertion
Loss VSWR Amplitude
Balance
MHz dB Min dB Max Max : 1 dB Max
800-1000 21 0.22 1.19 ± 0.20
869-894 23 0.20 1.17 ± 0.15
925-960 23 0.21 1.17 ± 0.15
Phase Power Θ
ΘΘ
ΘJC Operating
Temp.
Degrees Avg. CW Watts ºC/Watt ºC
90 ± 3.0 70 31 -55 to +95
90 ± 2.0 80 31 -55 to +95
Features:
800-1000 MHz
AMPS
High Power
Very Low Loss
Tight Amplitude Balance
High Isolation
Production Friendly
Tape and Reel
Available in Lead-Free (as
illustrated) or Tin-Lead
Reliable, FIT=0.53
90 ± 2.5 75 31 -55 to +95
**Specification based on performance of unit properly installed on Anaren Test Board 58492-0001 with small
signal applied. Specifications subject to change without notice. Refer to parameter definitions for details.
XC0900EH-03* Mechanical Outline Rev. A
Dimensions are in Inches [Millimeters]
Side View
.092
±.007
[2.34
±0.18
]
Bottom View (Far-Side)
Top View (Near-Side)
* = Plating Finish
Tolerances are Non-Cumulative
.560
±.010
[14.22
±0.25
]
.200
±.010
[5.08
±0.25
]
.450
±.004
[11.43
±0.10
]
.090
±.004
[2.29
±0.10
]
4X .025
±.004
[0.64
±0.10
]
4X .051
±.004
SQ
[1.30
±0.10
]
Pin 1 Pin 2
Pin 4 Pin 3
Denotes
Array Number
Orientation
Marker Denotes
Pin 1
Pin 1Pin 2
Pin 3
Pin 4
GND
GND
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Rev B
Hybrid Coupler Pin Configuration
The XC0900EH-03 has an orientation marker to denote Pin 1. Once port one has been identified the other ports are
known automatically. Please see the chart below for clarification:
Configuration Pin 1 Pin 2 Pin 3 Pin 4
Splitter Input -3dB
90
θ
Isolated -3dB
θ
Splitter Isolated -3dB
θ
Input -3dB
90
θ
Splitter -3dB
90
θ
Input -3dB
θ
Isolated
Splitter -3dB
θ
Isolated -3dB
90
θ
Input
*Combiner A
90
θ
Isolated A
θ
Output
*Combiner A
θ
Output A
90
θ
Isolated
*Combiner Isolated A
90
θ
Output A
θ
*Combiner Output A
θ
Isolated A
90
θ
*Note: “A” is the amplitude of the applied signals. When two quadrature signals with equal amplitudes are
applied to the coupler as described in the table, they will combine at the output port. If the amplitudes are
not equal, some of the applied energy will be directed to the isolated port.
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Model XC0900
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-
03
Rev B
Insertion Loss and Power Derating Curves
-50
0
50
100
150
200
250
300
-0.3
-0.28
-0.26
-0.24
-0.22
-0.2
-0.18
-0.16
-0.14
-0.12
-0.1
Temperature of the Part ( °C)
Insertion Loss (dB)
Typical Insertion Loss Derating Curve for XC0900EH-03
typical insertion loss(f=894Mhz)
typical insertion loss(f=960Mhz)
typical insertion loss(f=1000Mhz)
0
25
50
75
100
125
150
175
200
225
0
25
50
75
100
125
150
Base Plate TemperatureC)
Power (Watts)
Power Derating Curve for XC0900EH-03
power handling (f=894MHz)
power handling (f=960MHz)
power handling (f=1000MHz)
Insertion Loss Derating:
The insertion loss, at a given frequency, of a group of
couplers is measured at 25°C and then averaged. The
measurements are performed under small signal
conditions (i.e. using a Vector Network Analyzer). The
process is repeated at -55°C and 95°C. Based on
copper as well as dielectric losses, the insertion loss is
computed from -55°C to 300°C.
Power Derating:
The power handling and corresponding power derating
plots are a function of the thermal resistance, mounting
surface temperature (base plate temperature),
maximum continuous operating temperature of the
coupler, and the thermal insertion loss. The thermal
insertion loss is defined in the Power Handling section of
the data sheet.
As the mounting interface temperature approaches the
maximum continuous operating temperature, the power
handling decreases to zero.
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Rev B
Typical Performance (-55°C, 25°C and 95°C): 800-1000 MHz
800
850
900
950
1000
-60
-50
-40
-30
-20
-10
0
Frequency (MHz)
Return Loss (dB)
Return Loss for XC0900EH-03(Feeding Port1)
-55 °C
25 °C
95 °C
800
850
900
950
1000
-60
-50
-40
-30
-20
-10
0
Frequency (MHz)
Return Loss (dB)
Return Loss for XC0900EH-03(Feeding Port2)
-55 °C
25 °C
95 °C
800
850
900
950
1000
-60
-50
-40
-30
-20
-10
0
Frequency (MHz)
Return Loss (dB)
Return Loss for XC0900EH-03(Feeding Port3)
-55 °C
25 °C
95 °C
800
850
900
950
1000
-60
-50
-40
-30
-20
-10
0
Frequency (MHz)
Return Loss (dB)
Return Loss for XC0900EH-03(Feeding Port4)
-55 °C
25 °C
95 °C
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-
03
Rev B
Typical Performance (-55°C, 25°C and 95°C): 800-1000 MHz
800
850
900
950
1000
-3.4
-3.3
-3.2
-3.1
-3
-2.9
-2.8
Frequency (MHz)
Coupling (dB)
Coupling for XC0900EH-03(Feeding Port1)
-55 °C
25 °C
95 °C
800
850
900
950
1000
-0.2
-0.18
-0.16
-0.14
-0.12
-0.1
-0.08
-0.06
-0.04
-0.02
0
Frequency (MHz)
Insertion Loss (dB)
Insertion Loss for XC0900EH-03(Feeding Port1)
-55 °C
25 °C
95 °C
800
850
900
950
1000
87
88
89
90
91
92
93
Frequency (MHz)
Phase Balance (degree)
Phase Balance for XC0900EH-03(Feeding Port1)
-55 °C
25 °C
95 °C
800
850
900
950
1000
-60
-50
-40
-30
-20
-10
0
Frequency (MHz)
Isolation (dB)
Isolation for XC0900EH-03(Feeding Port1)
-55 °C
25 °C
95 °C
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Rev B
Definition of Measured Specifications
Parameter Definition Mathematical Representation
VSWR
(Voltage Standing Wave Ratio)
The impedance match of
the coupler to a 50
system. A VSWR of 1:1 is
optimal.
VSWR =
min
max
V
V
Vmax = voltage maxima of a standing wave
Vmin = voltage minima of a standing wave
Return Loss
The impedance match of
the coupler to a 50
system. Return Loss is
an alternate means to
express VSWR.
Return Loss (dB)= 20log
1
-
VSWR
1VSWR
+
Insertion Loss The input power divided
by the sum of the power
at the two output ports. Insertion Loss(dB)= 10log
direct cpl
in
PP
P
+
Isolation The input power divided
by the power at the
isolated port. Isolation(dB)= 10log
iso
in
P
P
Phase Balance The difference in phase
angle between the two
output ports. Phase at coupled port – Phase at direct port
Amplitude Balance
The power at each output
divided by the average
power of the two outputs.
10log
+
2
PP
P
directcpl
cpl
and 10log
+
2
PP
P
directcpl
direct
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-
03
Rev B
Notes on RF Testing and Circuit Layout
The XC0900EH Surface Mount Couplers require the use of a test fixture for verification of RF performance. This test
fixture is designed to evaluate the coupler in the same environment that is recommended for installation. Enclosed
inside the test fixture, is a circuit board that is fabricated using the recommended footprint. The part being tested is
placed into the test fixture and pressure is applied to the top of the device using a pneumatic piston. A four port Vector
Network Analyzer is connected to the fixture and is used to measure the S-parameters of the part. Worst case values
for each parameter are found and compared to the specification. These worst case values are reported to the test
equipment operator along with a Pass or Fail flag. See the illustrations below.
3 dB
Test Board
10 dB
Test Board
Test Board
In Fixture
Test Station
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The effects of the test fixture on the measured data must be minimized in order to accurately determine the
performance of the device under test. If the line impedance is anything other than 50 and/or there is a discontinuity
at the microstrip to SMA interface, there will be errors in the data for the device under test. The test environment can
never be “perfect”, but the procedure used to build and evaluate the test boards (outlined below) demonstrates an
attempt to minimize the errors associated with testing these devices. The lower the signal level that is being
measured, the more impact the fixture errors will have on the data. Parameters such as Return Loss and
Isolation/Directivity, which are specified as low as 27dB and typically measure at much lower levels, will present the
greatest measurement challenge.
The test fixture errors introduce an uncertainty to the measured data. Fixture errors can make the performance of the
device under test look better or worse than it actually is. For example, if a device has a known return loss of 30dB and
a discontinuity with a magnitude of –35dB is introduced into the measurement path, the new measured Return Loss
data could read anywhere between –26dB and –37dB. This same discontinuity could introduce an insertion phase
error of up to 1°.
There are different techniques used throughout the industry to minimize the affects of the test fixture on the
measurement data. Anaren uses the following design and de-embedding criteria:
Test boards have been designed and parameters specified to provide trace impedances of 50
±1. Furthermore, discontinuities at the SMA to microstrip interface are required to be less than
–35dB and insertion phase errors (due to differences in the connector interface discontinuities
and the electrical line length) should be less than ±0.25° from the median value of the four
paths.
A “Thru” circuit board is built. This is a two port, microstrip board that uses the same SMA to
microstrip interface and has the same total length (insertion phase) as the actual test board. The
“Thru” board must meet the same stringent requirements as the test board. The insertion loss
and insertion phase of the “Thru” board are measured and stored. This data is used to
completely de-embed the device under test from the test fixture. The de-embedded data is
available in S-parameter form on the Anaren website (www.anaren.com).
Note: The S-parameter files that are available on the anaren.com website include data for frequencies that are
outside of the specified band. It is important to note that the test fixture is designed for optimum performance through
2.3GHz. Some degradation in the test fixture performance will occur above this frequency and connector interface
discontinuities of –25dB or more can be expected. This larger discontinuity will affect the data at frequencies above
2.3GHz.
Circuit Board Layout
The dimensions for the Anaren test board are shown below. The test board is printed on Rogers RO4350 material
that is 0.030” thick. Consider the case when a different material is used. First, the pad size must remain the same to
accommodate the part. But, if the material thickness or dielectric constant (or both) changes, the reactance at the
interface to the coupler will also change. Second, the linewidth required for 50 will be different and this will introduce
a step in the line at the pad where the coupler interfaces with the printed microstrip trace. Both of these conditions will
affect the performance of the part. To achieve the specified performance, serious attention must be given to the
design and layout of the circuit environment in which this component will be used.
If a different circuit board material is used, an attempt should be made to achieve the same interface pad reactance
that is present on the Anaren RO4350 test board. When thinner circuit board material is used, the ground plane will
be closer to the pad yielding more capacitance for the same size interface pad. The same is true if the dielectric
constant of the circuit board material is higher than is used on the Anaren test board. In both of these cases,
narrowing the line before the interface pad will introduce a series inductance, which, when properly tuned, will
compensate for the extra capacitive reactance. If a thicker circuit board or one with a lower dielectric constant is used,
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-
03
Rev B
the interface pad will have less capacitive reactance than the Anaren test board. In this case, a wider section of line
before the interface pad (or a larger interface pad) will introduce a shunt capacitance and when properly tuned will
match the performance of the Anaren test board.
Notice that the board layout for the 3dB couplers is different from that of the 10dB couplers. The test board for the
3dB couplers has all four traces interfacing with the coupler at the same angle. The test board for the 10dB couplers
has two traces approaching at one angle and the other two traces at a different angle. The entry angle of the traces
has a significant impact on the RF performance and these parts have been optimized for the layout used on
the test boards shown below.
10 dB Test Board 3 dB Test Board
Testing Sample Parts Supplied on Anaren Test Boards
If you have received a coupler installed on an Anaren produced microstrip test board, please remember to remove the
loss of the test board from the measured data. The loss is small enough that it is not of concern for Return Loss and
Isolation/Directivity, but it should certainly be considered when measuring coupling and calculating the insertion loss
of the coupler. An S-parameter file for a “Thru” board (see description of “Thru” board above) will be supplied upon
request. As a first order approximation, one should consider the following loss estimates:
Frequency Band Avg. Ins. Loss of Test Board @ 25°
°°
°C
800 – 1000 MHz ~ 0.07dB
1700 – 2300 MHz ~ 0.12dB
2300 – 2700MHz ~ 0.15dB
For example, a 1900MHz, 10dB coupler on a test board may measure –10.30dB from input to the coupled port at
some frequency, F1. When the loss of the test board is removed, the coupling at F1 becomes -10.18dB (-10.30dB +
0.12dB). This compensation must be made to both the coupled and direct path measurements when calculating
insertion loss.
The loss estimates in the table above come from room temperature measurements. It is important to note that the
loss of the test board will change with temperature. This fact must be considered if the coupler is to be evaluated at
other temperatures.
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Peak Power Handling
High-Pot testing of these couplers during the qualification procedure resulted in a minimum breakdown voltage of
1.7KV (minimum recorded value). This voltage level corresponds to a breakdown resistance capable of handling at
least 12dB peaks over average power levels, for very short durations. The breakdown location consistently occurred
across the air interface at the coupler contact pads (see illustration below). The breakdown levels at these points will
be affected by any contamination in the gap area around these pads. These areas must be kept clean for optimum
performance. It is recommended that the user test for voltage breakdown under the maximum operating conditions
and over worst case modulation induced power peaking. This evaluation should also include extreme environmental
conditions (such as high humidity).
Orientation Marker
A printed circular feature appears on the top surface of the coupler to designate Pin 1. This orientation marker is not
intended to limit the use of the symmetry that these couplers exhibit but rather to facilitate consistent placement of
these parts into the tape and reel package. This ensures that the components are always delivered with the same
orientation. Refer to the table on page 2 of the data sheet for allowable pin configurations.
Test Plan
Xinger II couplers are manufactured in large panels and then separated. A sample population of parts is RF small
signal tested at room temperature in the fixture described above. All parts are DC tested for shorts/opens. (See
“Qualification Flow Chart” section for details on the accelerated life test procedures.)
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Power Handling
The average power handling (total input power) of a Xinger coupler is a function of:
Internal circuit temperature.
Unit mounting interface temperature.
Unit thermal resistance
Power dissipated within the unit.
All thermal calculations are based on the following assumptions:
The unit has reached a steady state operating condition.
Maximum mounting interface temperature is 95
o
C.
Conduction Heat Transfer through the mounting interface.
No Convection Heat Transfer.
No Radiation Heat Transfer.
The material properties are constant over the operating temperature range.
Finite element simulations are made for each unit. The simulation results are used to calculate the unit thermal
resistance. The finite element simulation requires the following inputs:
Unit material stack-up.
Material properties.
Circuit geometry.
Mounting interface temperature.
Thermal load (dissipated power).
The classical definition for dissipated power is temperature delta (
T) divided by thermal resistance (R). The
dissipated power (P
dis
) can also be calculated as a function of the total input power (P
in
) and the thermal insertion loss
(IL
therm
):
)(101
10
WP
R
T
P
therm
IL
indis
=
=
(1)
Power flow and nomenclature for an “H” style coupler is shown in Figure 1.
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Pin 1
Pin 4
Input Port
Coupled Port Isolated Port
Direct Port
P
In
P
Out
(RL) P
Out
(DC)
P
Out
(CPL) P
Out
(ISO)
Figure 1
The coupler is excited at the input port with P
in
(watts) of power. Assuming the coupler is not ideal, and that there are
no radiation losses, power will exit the coupler at all four ports. Symbolically written, P
out(RL)
is the power that is
returned to the source because of impedance mismatch, P
out(ISO)
is the power at the isolated port, P
out(CPL)
is the
power at the coupled port, and P
out(DC)
is the power at the direct port.
At Anaren, insertion loss is defined as the log of the input power divided by the sum of the power at the coupled and
direct ports:
Note: in this document, insertion loss is taken to be a positive number. In many places, insertion loss is written as a
negative number. Obviously, a mere sign change equates the two quantities.
)dB(
PP
P
log10IL
)DC(out)CPL(out
in
10
+
=
(2)
In terms of S-parameters, IL can be computed as follows:
)dB(SSlog10IL
2
41
2
3110
+=
(3)
We notice that this insertion loss value includes the power lost because of return loss as well as power lost to the
isolated port.
For thermal calculations, we are only interested in the power lost “inside” the coupler. Since P
out(RL)
is lost in the
source termination and P
out(ISO)
is lost in an external termination, they are not be included in the insertion loss for
thermal calculations. Therefore, we define a new insertion loss value solely to be used for thermal calculations:
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)(log10
)()()()(
10
dB
PPPP
P
IL
RLoutISOoutDCoutCPLout
in
therm
+++
=
(4)
In terms of S-parameters, IL
therm
can be computed as follows:
)(log10
2
41
2
31
2
21
2
1110
dBSSSSIL
therm
+++=
(5)
The thermal resistance and power dissipated within the unit are then used to calculate the average total input power
of the unit. The average total steady state input power (P
in
) therefore is:
)(
101101
1010
W
R
T
P
P
thermtherm
ILIL
dis
in
=
=
(6)
Where the temperature delta is the circuit temperature (T
circ
) minus the mounting interface temperature (T
mnt
):
)( CTTT
o
mntcirc
=
(7)
The maximum allowable circuit temperature is defined by the properties of the materials used to construct the unit.
Multiple material combinations and bonding techniques are used within the Xinger II product family to optimize RF
performance. Consequently the maximum allowable circuit temperature varies. Please note that the circuit
temperature is not a function of the Xinger case (top surface) temperature. Therefore, the case temperature cannot
be used as a boundary condition for power handling calculations.
Due to the numerous board materials and mounting configurations used in specific customer configurations, it is the
end users responsibility to ensure that the Xinger II coupler mounting interface temperature is maintained within the
limits defined on
the power derating plots for the required average power handling. Additionally appropriate solder
composition is required to prevent
reflow or
fatigue failure at the RF ports. Finally, reliability is improved when the
mounting interface and RF port temperatures are kept to a minimum.
The power-derating curve illustrates how changes in the mounting interface temperature result in converse changes
of the power handling of the coupler.
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Mounting
In order for Xinger surface mount couplers to work
optimally, there must be 50 transmission lines leading
to and from all of the RF ports. Also, there must be a
very good ground plane underneath the part to ensure
proper electrical performance. If either of these two
conditions is not satisfied, electrical performance may not
meet published specifications.
Overall ground is improved if a dense population of
plated through holes connect the top and bottom ground
layers of the PCB. This minimizes ground inductance
and improves ground continuity. All of the Xinger hybrid
and directional couplers are constructed from ceramic
filled PTFE composites which possess excellent electrical
and mechanical stability having X and Y thermal
coefficient of expansion (CTE) of 17-25 ppm/
o
C.
When a surface mount hybrid coupler is mounted to a
printed circuit board, the primary concerns are; ensuring
the RF pads of the device are in contact with the circuit
trace of the PCB and insuring the ground plane of neither
the component nor the PCB is in contact with the RF
signal.
Mounting Footprint
Coupler Mounting Process
The process for assembling this component is a
conventional surface mount process as shown in Figure
1. This process is conducive to both low and high volume
usage.
Figure 1: Surface Mounting Process Steps
Storage of Components: The Xinger II products are
available in either an immersion tin or tin-lead finish.
Commonly used storage procedures used to control
oxidation should be followed for these surface mount
components. The storage temperatures should be held
between 15
O
C and 60
O
C.
Substrate: Depending upon the particular component,
the circuit material has an x and y coefficient of thermal
expansion of between 17 and 25 ppm/°C. This coefficient
minimizes solder joint stresses due to similar expansion
rates of most commonly used board substrates such as
RF35, RO4350, FR4, polyimide and G-10 materials.
Mounting to “hard” substrates (alumina etc.) is possible
depending upon operational temperature requirements.
The solder surfaces of the coupler are all copper plated
with either an immersion tin or tin-lead exterior finish.
Solder Paste: All conventional solder paste formulations
will work well with Anaren’s Xinger II surface mount
components. Solder paste can be applied with stencils or
syringe dispensers. An example of a stenciled solder
paste deposit is shown in Figure 2. As shown in the
figure solder paste is applied to the four RF pads and the
entire ground plane underneath the body of the part.
To ensure proper electrical and thermal performance
there must be a ground plane with 100%
solder connection underneath the part
Dimensions are in Inches [Millimeters]
XC0900EH-03* Mounting Footprint Rev. A
4X .066 SQ
[1.68] 4X 50
Transmission
Line
Multiple
plated thru holes
to ground
* = Plating Finish
.450
[11.43]
.090
[2.29]
.025
[0.63]
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Figure 2: Solder Paste Application
Coupler Positioning: The surface mount coupler can
be placed manually or with automatic pick and place
mechanisms. Couplers should be placed (see Figure 3
and 4) onto wet paste with common surface mount
techniques and parameters. Pick and place systems
must supply adequate vacuum to hold a 0.50-0.55
gram coupler.
Figure 3: Component Placement
Figure 4: Mounting Features Example
Reflow: The surface mount coupler is conducive to most of
today’s conventional reflow methods. A low and high
temperature thermal reflow profile are shown in Figures 5
and 6, respectively. Manual soldering of these components
can be done with conventional surface mount non-contact
hot air soldering tools. Board pre-heating is highly
recommended for these selective hot air soldering
methods. Manual soldering with conventional irons should
be avoided.
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-
03
Rev B
Figure 5 – Low Temperature Solder Reflow Thermal Profile
Figure 6 – High Temperature Solder Reflow Thermal Profile
Available on Tape
and Reel for Pick and
Place Manufacturing.
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:
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Model XC0900
EH
-
03
Rev B
Qualification Flow Chart
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-
03
Rev B
Electrical testing at room
temperature S-parameter
n=50
Visual Inspection
n=25
Mechanical Inspection
n=25
Microsection
3 test units and 1 control
High Power Test
n=2 Life Testing XXX watts Input XXX°C
base plate temperature 96 hours 3 in
series n=6
Visual Inspection
n=16
Electrical Testing at room temperature
and over temperature S-parameter
n=6
Microsection
2 Life, 1 high power and 1
control
Visual Inspection
n=50
Bake parts for 1 hour at 100°C
n=40
Electrical testing at room
temperature S-parameter
n=50
Moisture Resistance Testing -25° to 65° C for 2 hrs.
@ 90% humidity. Increase to 95% humidity and
soak for 4 hrs. ramp temp to 25° C in 2 hrs. repeat
for 10 cycles and then soak -10° C hour 3 hrs. n=40
Electrical testing at room
temperature s-parameter n=50
Visual Inspection
n=50
Control Units
n=10
Control Units
n=10
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Place Manufacturing.
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Model XC0900
EH
-
03
Rev B
Material Declaration XC0900EH-03S
Material Weight
(lbs) (g) (PPM) CAS Number
2-thiourea
62-56-6
Acetone
67-64-1
Aluminum
7429-90-5
Arsenic
7440-38-2
Brominated Epoxy Resin
-------------
BT Resin
-------------
Chromium
7440-47-3
Copper 3.7559E-04
1.7037E-01 3.6486E+05 7440-50-8
EDTA Disodium Salt
139-33-3
Fiberglass
65997-17-3
Fused Silica 3.0425E-04
1.3801E-01 2.9556E+05 60676-86-0
Lead
7439-92-1
Polyimide 1.2875E-05
5.8400E-03 1.2507E+04 60842-76-4
Polyphenylene Ether Resin
-------------
PTFE
9002-84-0
Proprietary / Unknown
-------------
Sodium Hypophosphite
7681-53-0
Stannous Chloride
7772-99-8
Steel
7439-89-6
3.1389E-05
1.4238E-02 3.0492E+04 25067-11-2
Tetrafluoroethylene
Hexaflouoropropylene
copolymer
Tin 1.0530E-06
4.7766E-04 1.0230E+03 7440-31-5
Titanium Dioxide 3.0425E-04
1.3801E-01 2.9556E+05 13463-67-7
Xylene
1330-20-7
Total Weight Calculated 1.0294E-03
4.6694E-01
Total Weight Measured 9.6660E-04
4.3845E-01
The values presented above are estimates at the current revision, and it is derived from vendor
supplied data. While Anaren strives for accurate reporting, due to product and process variations at
both Anaren and our suppliers, the quoted values are our best estimates only, and not measured
absolute values. Product specifications are subject to change without notice.
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Manufacturing.
-
03
Rev B
Application Information
The XC1900EH-03 is an “H” style 3dB (hybrid) coupler. Unlike an “Xstyle coupler (see XC1900A-03 datasheet), the
“H” style coupler has output ports on opposite sides of the coupler. Complete port configurations are defined on page
2 of this data sheet and an example is shown below.
Ideal 3dB Coupler Splitter Operation
The hybrid coupler can also be used to combine two signals that are applied with equal amplitudes and phase
quadrature (9 phase difference). An example of this function is illustrated below.
Ideal 3dB Coupler Combiner Operation
Reflections From Equal Unmatched Terminations
Referring to the illustration below, consider the following reflection properties of the 3dB coupler. A signal applied to
port 1 is split and appears at the two output ports, ports 2 & 4, with equal amplitude and in phase quadrature. If ports 2
& 4 are not perfectly matched to 50 there will be some signal reflected back into the coupler. If the magnitude and
angle of these reflections are equal, there will be two signals that are equal in amplitude and in phase quadrature (i.e.
the reflected signals) being applied to ports 2 & 4 as inputs. These reflected signals will combine at the isolated port
and will cancel at the input port. So, terminations with the same mismatch placed at the outputs of the 3dB coupler will
not reflect back to the input port and therefore will not affect input return loss.
1
2
1V
0.707V
θ
(
-
3dB)
0.707V
θ
-
90 (
-
3dB)
Isolated Port
4
3
1
2
1V
0.707V
θ
0.707V
θ
-
90
Isolated Port
4
3
Available on Tape
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EH
-
03
Rev B
The reflection property of common mismatches in 3dB couplers is very beneficial to the operation of many networks.
For instance, when splitter/combiner networks are employed to increase output power by paralleling transistors with
similar reflection coefficients, input return loss is not degraded by the match of the transistor circuit. The reflections
from the transistor circuits are directed away from the input to the termination at the isolated port of the coupler.
This example is not limited to Power Amplifiers. In the case of Low Noise Amplifiers (LNA’s), the reflection property of
3dB couplers is again beneficial. The transistor devices used in LNA’s will present different reflection coefficients
depending on the bias level. The bias level that yields the best noise performance does not also provide the best
match to 50 . A circuit that is optimized for both noise performance and return loss can be achieved by combining two
matched LNA transistor devices using 3dB couplers. The devices can be biased for the best noise performance and
the reflection property of the couplers will provide a good match as described above.
G= 0
0
Z
Z
ZZ
L
L
+
1
2
1V
0.707V
θ
(
-
3dB)
Isolated Port
4
3
Termination = Z
L
G
0.707V
∠θ
|G (0.5V
2
θ
-90 + 0.5V
2
θ
-90)| = |G|
G (0.5V
2
θ
+ 0.5V
2
θ
-180) = 0V
Termination = Z
L
0.707V
θ
-
90 (
-
3dB)
G × 0.707V
θ
-90
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Manufacturing.
-
03
Rev B
Packaging and Ordering Information
Parts are available in both reel and tube. Packaging follows EIA 481-2. Parts are oriented in tape and reel as
shown below. Minimum order quantities are 2000 per reel and 34 per tube. See Model Numbers below for
further ordering information.
B
ØA ØC
REEL DIMENSIONS (inches [mm])
ØA
B
ØC
0.630 [16.0]
4.017 [102.03]
13.0 [330.0]
2000
QUANTITY/REEL
TABLE 1
ØD
0.512 [13.0]
ØD