CAUTION: It is advised that normal static precautions be taken in handling and assembly
of this component to prevent damage and/or degradation which may be induced by ESD.
Features
15 kV/µs minimum Common Mode Rejection (CMR)
at VCM = 1KV for HCNW2611, HCPL-2611, HCPL-4661,
HCPL-0611, HCPL-0661
High speed: 10 MBd typical
LSTTL/TTL compatible
Low input current capability: 5 mA
Guaranteed ac and dc performance over temperature:
-40°C to +85°C
Available in 8-Pin DIP, SOIC-8, widebody packages
Strobable output (single channel products only)
Safety approval
UL recognized - 3750 V rms for 1 minute and 5000
Vrms* for 1 minute per UL1577 CSA approved
IEC/EN/DIN EN 60747-5-2 approved with
VIORM = 560 V peak for 06xx Option 060
VIORM = 630 V peak for 6N137/26xx Option 060
VIORM = 1414 V peak for HCNW137/26X1
MIL-PRF-38534 hermetic version available
(HCPL-56XX/66XX)
Applications
Isolated line receiver
Computer-peripheral interfaces
Microprocessor system interfaces
Digital isolation for A/D, D/A conversion
Switching power supply
Instrument input/output isolation
Ground loop elimination
Pulse transformer replacement
Power transistor isolation in motor drives
Isolation of high speed logic systems
Functional Diagram
*5000 V rms/1 Minute rating is for HCNW137/26X1 and Option 020
(6N137, HCPL-2601/11/30/31, HCPL-4661) products only.
A 0.1 µF bypass capacitor must be connected between pins 5 and 8.
1
2
3
4
8
7
6
5
CATHODE
ANODE
GND
V
V
CC
O
6N137 Functional Diag
1
2
3
4
8
7
6
5
ANODE
2
CATHODE
2
CATHODE
1
ANODE
1
GND
V
V
CC
O2
V
E
V
O1
6N137, HCPL-2601/2611
HCPL-0600/0601/0611
HCPL-2630/2631/4661
HCPL-0630/0631/0661
NC
NC
LED
ON
OFF
ON
OFF
ON
OFF
ENABLE
H
H
L
L
NC
NC
OUTPUT
L
H
H
H
L
H
TRUTH TABLE
(POSITIVE LOGIC)
LED
ON
OFF
OUTPUT
L
H
TRUTH TABLE
(POSITIVE LOGIC)
SHIELD SHIELD
6N137, HCNW137, HCNW2601, HCNW2611, HCPL-0600,
HCPL-0601, HCPL-0611, HCPL-0630, HCPL-0631, HCPL-0661,
HCPL-2601, HCPL-2611, HCPL-2630, HCPL-2631, HCPL-4661
High CMR, High Speed TTL Compatible Optocouplers
Data Sheet
Description
The 6N137, HCPL-26XX/06XX/4661, HCNW137/26X1 are
optically coupled gates that combine a GaAsP light emit-
ting diode and an integrated high gain photo detector.
An enable input allows the detector to be strobed. The
output of the detector IC is an open collector Schottky-
clamped transistor. The internal shield provides a guar-
anteed common mode transient immunity specication
up to 15,000 V/µs at Vcm=1000V.
This unique design provides maximum ac and dc circuit iso-
lation while achieving TTL compatibility. The optocoupler
ac and dc operational parameters are guaranteed from -
40°C to +85°C allowing troublefree system performance.
Lead (Pb) Free
RoHS 6 fully
compliant
RoHS 6 fully compliant options available;
-xxxE denotes a lead-free product
2
The 6N137, HCPL-26XX, HCPL-06XX, HCPL-4661, HCNW137,
and HCNW26X1 are suitable for high speed logic interfac-
ing, input/output buering, as line receivers in environ-
ments that conventional line receivers cannot tolerate
and are recommended for use in extremely high ground
or induced noise environments.
Selection Guide
Widebody
Minimum CMR 8-Pin DIP (300 Mil) Small-Outline SO-8 (400 Mil) Hermetic
Input Single
On- Single Dual Single Dual Single and Dual
dV/dt V
CM Current Output Channel Channel Channel Channel Channel Channel
(V/µs) (V) (mA) Enable Package Package Package Package Package Packages
1000 10 5 YES 6N137
5,000 1,000 5 YES HCPL-0600 HCNW137
NO HCPL-2630 HCPL-0630
10,000 1,000 YES HCPL-2601 HCPL-0601 HCNW2601
NO HCPL-2631 HCPL-0631
15,000 1,000 YES HCPL-2611 HCPL-0611 HCNW2611
NO HCPL-4661 HCPL-0661
1,000 50 YES HCPL-2602[1]
3, 500 300 YES HCPL-2612[1]
1,000 50 3 YES HCPL-261A[1] HCPL-061A[1]
NO HCPL-263A[1] HCPL-063A[1]
1,000[2] 1,000 YES HCPL-261N[1] HCPL-061N[1]
NO HCPL-263N[1] HCPL-063N[1]
1,000 50 12.5 [3] HCPL-193X[1]
HCPL-56XX[1]
HCPL-66XX[1]
Notes:
1. Technical data are on separate Avago publications.
2. 15 kV/µs with VCM = 1 kV can be achieved using Avago application circuit.
3. Enable is available for single channel products only, except for HCPL-193X devices.
3
Ordering Information
HCPL-xxxx is UL Recognized with 3750 Vrms for 1 minute per UL1577.
HCNWxxxx is UL Rcognized with 5000 Vrms for 1 minute per UL1577.
Part
Number
Option
Package
Surface
Mount
Gull
Wing
Tape &
Reel
UL 5000 Vrms/
1 Minute
Rating
IEC/EN/DIN
EN 60747-5-2 Quantity
RoHS
Compliant
Non RoHS
Compliant
6N137
-000E No option
300mil
DIP-8
50 per tube
-300E #300 X X 50 per tube
-500E #500 X X X 1000 per reel
-020E #020 X 50 per tube
-320E #320 X X X 50 per tube
-520E #520 X X X X 1000 per reel
-060E #060 X 50 per tube
-560E -560 X X X X 1000 per reel
HCPL-2601
-000E No option
300mil
DIP-8
50 per tube
-300E #300 X X 50 per tube
-500E #500 X X X 1000 per reel
-020E #020 X 50 per tube
-320E #320 X X X 50 per tube
-520E #520 X X X X 1000 per reel
-060E #060 X 50 per tube
-360E - X X X 50 per tube
HCPL-2611
-000E No option
300mil
DIP-8
50 per tube
-300E #300 X X 50 per tube
-500E #500 X X X 1000 per reel
-020E #020 X 50 per tube
-320E #320 X X X 50 per tube
-520E #520 X X X X 1000 per reel
-060E #060 X 50 per tube
-360E #360 X X X 50 per tube
-560E #560 X X X X 1000 per reel
HCPL-2630
-000E No option
300mil
DIP-8
50 per tube
-300E #300 X X 50 per tube
-500E #500 X X X 1000 per reel
-020E #020 X 50 per tube
-320E #320 X X X 50 per tube
-520E -520 X X X X 1000 per reel
HCPL-2631
HCPL-4661
-000E No option
300mil
DIP-8
50 per tube
-300E #300 X X 50 per tube
-500E #500 X X X 1000 per reel
-020E #020 X 50 per tube
-320E #320 X X X 50 per tube
-520E #520 X X X X 1000 per reel
4
Schematic
SHIELD
8
6
5
2+
3
6N137 Schematic a
V
F
USE OF A 0.1 µF BYPASS CAPACITOR CONNECTED
BETWEEN PINS 5 AND 8 IS RECOMMENDED (SEE NOTE 5).
I
F
I
CC
V
CC
V
O
GND
I
O
V
E
I
E
7
6N137, HCPL-2601/2611
HCPL-0600/0601/0611
HCNW137, HCNW2601/2611
SHIELD
8
7
+
2
6N137 Schematic b
V
F1
I
F1
I
CC
V
CC
V
O1
I
O1
1
SHIELD
6
5
4
V
F2
+
I
F2
V
O2
GND
I
O2
3
HCPL-2630/2631/4661
HCPL-0630/0631/0661
Part
Number
Option
Package
Surface
Mount
Gull
Wing
Tape &
Reel
UL 5000 Vrms/
1 Minute
Rating
IEC/EN/DIN
EN 60747-5-2 Quantity
RoHS
Compliant
Non RoHS
Compliant
HCPL-0600
HCPL-0601
HCPL-0611
-000E No option
SO-8
X 100 per tube
-500E #500 X X 1500 per reel
-060E #060 X X 100 per tube
-560E #560 X X X 1500 per reel
HCPL-0630
HCPL-0631
HCPL-0661
-000E No option
SO-8
X 100 per tube
-500E #500 X X 1500 per reel
HCNW137
HCNW2601
HCNW2611
-000E No option
400 mil
DIP-8
X X 42 per tube
-300E #300 X X X X 42 per tube
-500E #500 X X X X X 750 per reel
To order, choose a part number from the part number column and combine with the desired option from the option
column to form an order entry. Combination of Option 020 and Option 060 is not available.
Example 1:
HCPL-2611-560E to order product of 300mil DIP Gull Wing Surface Mount package in Tape and Reel packag
ing with IEC/EN/DIN EN 60747-5-2 Safety Approval in RoHS compliant.
Example 2:
HCPL-2630 to order product of 300mil DIP package in tube packaging and non RoHS compliant.
Option datasheets are available. Contact your Avago sales representative or authorized distributor for information.
Notes:
The notation ‘#XXX’ is used for existing products, while (new) products launched since 15th July 2001 and RoHS compliant option will use ‘-XXXE‘.
5
Package Outline Drawings
8-pin DIP Package** (6N137, HCPL-2601/11/30/31, HCPL-4661)
8-pin DIP Package with Gull Wing Surface Mount Option 300
(6N137, HCPL-2601/11/30/31, HCPL-4661)
**JEDEC Registered Data (for 6N137 only).
1.080 ± 0.320
(0.043 ± 0.013) 2.54 ± 0.25
(0.100 ± 0.010)
0.51 (0.020) MIN.
0.65 (0.025) MAX.
4.70 (0.185) MAX.
2.92 (0.115) MIN.
5° TYP. 0.254 + 0.076
- 0.051
(0.010+ 0.003)
- 0.002)
7.62 ± 0.25
(0.300 ± 0.010)
6.35 ± 0.25
(0.250 ± 0.010)
9.65 ± 0.25
(0.380 ± 0.010)
1.78 (0.070) MAX.
1.19 (0.047) MAX.
A XXXXZ
YYWW
DATE CODE
DIMENSIONS IN MILLIMETERS AND (INCHES).
5678
4321
OPTION CODE*
UL
RECOGNITION
UR
TYPE NUMBER
*MARKING CODE LETTER FOR OPTION NUMBERS
"L" = OPTION 020
"V" = OPTION 060
OPTION NUMBERS 300 AND 500 NOT MARKED.
NOTE: FLOATING LEAD PROTRUSION IS 0.25 mm (10 mils) MAX.
3.56 ± 0.13
(0.140 ± 0.005)
0.635 ± 0.25
(0.025 ± 0.010) 12° NOM.
9.65 ± 0.25
(0.380 ± 0.010)
0.635 ± 0.130
(0.025 ± 0.005)
7.62 ± 0.25
(0.300 ± 0.010)
5
6
7
8
4
3
2
1
9.65 ± 0.25
(0.380 ± 0.010)
6.350 ± 0.25
(0.250 ± 0.010)
1.016 (0.040)
1.27 (0.050)
10.9 (0.430)
2.0 (0.080)
LAND PATTERN RECOMMENDATION
1.080 ± 0.320
(0.043 ± 0.013)
1.780
(0.070)
MAX.
1.19
(0.047)
MAX.
2.54
(0.100)
BSC
DIMENSIONS IN MILLIMETERS (INCHES).
LEAD COPLANARITY = 0.10 mm (0.004 INCHES).
0.254 + 0.076
- 0.051
(0.010+ 0.003)
- 0.002)
NOTE: FLOATING LEAD PROTRUSION IS 0.25 mm (10 mils) MAX.
3.56 ± 0.13
(0.140 ± 0.005)
6
Small-Outline SO-8 Package (HCPL-0600/01/11/30/31/61)
8-Pin Widebody DIP Package (HCNW137, HCNW2601/11)
XXX
YWW
8765
4321
5.994 ± 0.203
(0.236 ± 0.008)
3.937 ± 0.127
(0.155 ± 0.005)
0.406 ± 0.076
(0.016 ± 0.003) 1.270
(0.050)BSC
5.080 ± 0.127
(0.200 ± 0.005)
3.175 ± 0.127
(0.125 ± 0.005) 1.524
(0.060)
45° X 0.432
(0.017)
0.228 ± 0.025
(0.009 ± 0.001)
TYPE NUMBER
(LAST 3 DIGITS)
DATE CODE
0.305
(0.012)MIN.
TOTAL PACKAGE LENGTH (INCLUSIVE OF MOLD FLASH)
5.207 ± 0.254 (0.205 ± 0.010)
DIMENSIONS IN MILLIMETERS (INCHES).
LEAD COPLANARITY = 0.10 mm (0.004 INCHES) MAX.
NOTE: FLOATING LEAD PROTRUSION IS 0.15 mm (6 mils) MAX.
0.203 ± 0.102
(0.008 ± 0.004)
PIN ONE
0 ~ 7°
*
*
7.49 (0.295)
1.9 (0.075)
0.64 (0.025)
LAND PATTERN RECOMMENDATION
7
8-Pin Widebody DIP Package with Gull Wing Surface Mount Option 300
(HCNW137, HCNW2601/11)
Solder Reow Temperature Prole
1.00 ± 0.15
(0.039 ± 0.006)
7° NOM.
12.30 ± 0.30
(0.484 ± 0.012)
0.75 ± 0.25
(0.030 ± 0.010)
11.00
(0.433)
5
6
7
8
4
3
2
1
11.15 ± 0.15
(0.442 ± 0.006)
9.00 ± 0.15
(0.354 ± 0.006)
1.3
(0.051)
13.56
(0.534)
2.29
(0.09)
LAND PATTERN RECOMMENDATION
1.78 ± 0.15
(0.070 ± 0.006)
4.00
(0.158)MAX.
1.55
(0.061)
MAX.
2.54
(0.100)
BSC
DIMENSIONS IN MILLIMETERS (INCHES).
LEAD COPLANARITY = 0.10 mm (0.004 INCHES).
NOTE: FLOATING LEAD PROTRUSION IS 0.25 mm (10 mils) MAX.
0.254 + 0.076
- 0.0051
(0.010+ 0.003)
- 0.002)
MAX.
0
TIME (SECONDS)
TEMPERATURE (°C)
200
100
50 150100 200 250
300
0
30
SEC.
50 SEC.
30
SEC.
160 °C
140 °C
150 °C
PEAK
TEMP.
245 °C
PEAK
TEMP.
240 °CPEAK
TEMP.
230 °C
SOLDERING
TIME
200 °C
PREHEATING TIME
150 °C, 90 + 30 SEC.
2.5 C ± 0.5 °C/SEC.
3°C+1°C/–0.5 °C
TIGHT
TYPICAL
LOOSE
ROOM
TEMPERATURE
PREHEATING RATE 3 °C+1°C/–0.5 °C/SEC.
REFLOW HEATING RATE 2.5 °C ± 0.5 °C/SEC.
NOTE: NON-HALIDE FLUX SHOULD BE USED.
8
Regulatory Information
The 6N137, HCPL-26XX/06XX/46XX, and HCNW137/26XX have been approved by the following organizations:
Recommended Pb-free IR Prole
Insulation and Safety Related Specications
8-pin DIP Widebody
(300 Mil) SO-8 (400 Mil)
Parameter Symbol Value Value Value Units Conditions
Minimum External L(101) 7.1 4.9 9.6 mm Measured from input terminals
Air Gap (External to output terminals, shortest
Clearance) distance through air.
Minimum External L(102) 7.4 4.8 10.0 mm Measured from input terminals
Tracking (External to output terminals, shortest
Creepage) distance path along body.
Minimum Internal 0.08 0.08 1.0 mm Through insulation distance,
Plastic Gap conductor to conductor, usually
(Internal Clearance) the direct distance between the
photoemitter and photodetector
inside the optocoupler cavity.
Minimum Internal NA NA 4.0 mm Measured from input terminals
Tracking (Internal to output terminals, along
Creepage) internal cavity.
Tracking Resistance CTI 200 200 200 Volts DIN IEC 112/VDE 0303 Part 1
(Comparative
Tracking Index)
Isolation Group IIIa IIIa IIIa Material Group
(DIN VDE 0110, 1/89, Table 1)
Option 300 - surface mount classication is Class A in accordance with CECC 00802.
UL
Recognized under UL 1577, Component Recognition
Program, File E55361.
CSA
Approved under CSA Component Acceptance Notice
#5, File CA 88324.
IEC/EN/DIN EN 60747-5-2
Approved under
IEC 60747-5-2:1997 + A1:2002
EN 60747-5-2:2001 + A1:2002
DIN EN 60747-5-2 (VDE 0884 Teil 2):2003-01
(Option 060 and HCNW only)
217 °C
RAMP-DOWN
6°C/SEC. MAX.
RAMP-UP
3°C/SEC. MAX.
150 - 200 °C
* 260 +0/-5 °C
t 25 °C to PEAK
60 to 150 SEC.
15 SEC.
TIME WITHIN 5 °C of ACTUAL
PEAK TEMPERATURE
tp
ts
PREHEAT
60 to 180 SEC.
tL
TL
Tsmax
Tsmin
25
Tp
TIME
TEMPERATURE
NOTES:
THE TIME FROM 25 °C to PEAK
TEMPERATURE = 8 MINUTES MAX.
Tsmax = 200 °C, Tsmin = 150 °C
NOTE: NON-HALIDE FLUX SHOULD BE USED.
* RECOMMENDED PEAK TEMPERATURE FOR
WIDEBODY 400mils PACKAGE IS 245 °C
9
IEC/EN/DIN EN 60747-5-2 Insulation Related Characteristics
(HCPL-06xx Option 060 Only)
Description Symbol Characteristic Units
Installation classication per DIN VDE 0110/1.89, Table 1
for rated mains voltage ≤ 150 V rms I-IV
for rated mains voltage ≤ 300 V rms I-III
for rated mains voltage ≤ 600 V rms I-III
Climatic Classication 55/85/21
Pollution Degree (DIN VDE 0110/1.89) 2
Maximum Working Insulation Voltage VIORM 567 V peak
Input to Output Test Voltage, Method b*
VIORM x 1.875 = VPR, 100% Production Test with tm = 1 sec, VPR 1063 V peak
Partial Discharge < 5 pC
Input to Output Test Voltage, Method a*
VIORM x 1.5 = VPR, Type and Sample Test, VPR 851 V peak
tm = 60 sec, Partial Discharge < 5 pC
Highest Allowable Overvoltage
(Transient Overvoltage, tini = 10 sec) VIOTM 6000 V peak
Safety Limiting Values
(Maximum values allowed in the event of a failure)
Case Temperature TS 150 °C
Input Current** IS,INPUT 150 mA
Output Power** PS,OUTPUT 600 mW
Insulation Resistance at TS, VIO = 500 V RS ≥109 Ω
*Refer to the front of the optocoupler section of the current catalog, under Product Safety Regulations section, IEC/EN/DIN EN 60747-5-2, for a
detailed description.
Note: Isolation characteristics are guaranteed only within the safety maximum ratings which must be ensured by protective circuits in applica-
tion.
10
IEC/EN/DIN EN 60747-5-2 Insulation Related Characteristics
(HCPL-26xx; 46xx; 6N13x Option 060 Only)
Description Symbol Characteristic Units
Installation classication per DIN VDE 0110/1.89, Table 1
for rated mains voltage ≤ 300 V rms I-IV
for rated mains voltage ≤ 450 V rms I-III
Climatic Classication 55/85/21
Pollution Degree (DIN VDE 0110/1.89) 2
Maximum Working Insulation Voltage VIORM 630 V peak
Input to Output Test Voltage, Method b*
VIORM x 1.875 = VPR, 100% Production Test with tm = 1 sec, VPR 1181 V peak
Partial Discharge < 5 pC
Input to Output Test Voltage, Method a*
VIORM x 1.5 = VPR, Type and sample test, VPR 945 V peak
tm = 60 sec, Partial Discharge < 5 pC
Highest Allowable Overvoltage*
(Transient Overvoltage, tini = 10 sec) VIOTM 6000 V peak
Safety Limiting Values
(Maximum values allowed in the event of a failure,
also see Figure 16, Thermal Derating curve.)
Case Temperature TS 175 °C
Input Current IS,INPUT 230 mA
Output Power PS,OUTPUT 600 mW
Insulation Resistance at TS, VIO = 500 V RS ≥109 Ω
*Refer to the front of the optocoupler section of the current catalog, under Product Safety Regulations section, IEC/EN/DIN EN 60747-5-2, for a
detailed description.
Note: Isolation characteristics are guaranteed only within the safety maximum ratings which must be ensured by protective circuits in applica-
tion.
IEC/EN/DIN EN 60747-5-2 Insulation Related Characteristics (HCNW137/2601/2611 Only)
Description Symbol Characteristic Units
Installation classication per DIN VDE 0110/1.89, Table 1
for rated mains voltage ≤600 V rms I-IV
for rated mains voltage ≤1000 V rms I-III
Climatic Classication (DIN IEC 68 part 1) 55/100/21
Pollution Degree (DIN VDE 0110/1.89) 2
Maximum Working Insulation Voltage VIORM 1414 V peak
Input to Output Test Voltage, Method b*
VIORM x 1.875 = VPR, 100% Production Test with tm = 1 sec, VPR 2651 V peak
Partial Discharge < 5 pC
Input to Output Test Voltage, Method a*
VIORM x 1.5 = VPR, Type and sample test, VPR 2121 V peak
tm = 60 sec, Partial Discharge < 5 pC
Highest Allowable Overvoltage*
(Transient Overvoltage, tini = 10 sec) VIOTM 8000 V peak
Safety Limiting Values
(Maximum values allowed in the event of a failure,
also see Figure 16, Thermal Derating curve.)
Case Temperature TS 150 °C
Input Current IS,INPUT 400 mA
Output Power PS,OUTPUT 700 mW
Insulation Resistance at TS, VIO = 500 V RS ≥109 Ω
*Refer to the front of the optocoupler section of the current catalog, under Product Safety Regulations section, IEC/EN/DIN EN 60747-5-2, for a
detailed description.
Note: Isolation characteristics are guaranteed only within the safety maximum ratings which must be ensured by protective circuits in applica-
tion.
11
Absolute Maximum Ratings* (No Derating Required up to 85°C)
Parameter Symbol Package** Min. Max. Units Note
Storage Temperature TS -55 125 °C
Operating Temperature† TA -40 85 °C
Average Forward Input Current IF Single 8-Pin DIP 20 mA 2
Single SO-8
Widebody
Dual 8-Pin DIP 15 1, 3
Dual SO-8
Reverse Input Voltage VR 8-Pin DIP, SO-8 5 V 1
Widebody 3
Input Power Dissipation PI Widebody 40 mW
Supply Voltage VCC 7 V
(1 Minute Maximum)
Enable Input Voltage (Not to VE Single 8-Pin DIP VCC + 0.5 V
Exceed VCC by more than Single SO-8
500 mV) Widebody
Enable Input Current IE 5 mA
Output Collector Current IO 50 mA 1
Output Collector Voltage VO 7 V 1
Output Collector Power PO Single 8-Pin DIP 85 mW
Dissipation Single SO-8
Widebody
Dual 8-Pin DIP 60 1, 4
Dual SO-8
Lead Solder Temperature TLS 8-Pin DIP 260°C for 10 sec.,
(Through Hole Parts Only) 1.6 mm below seating plane
Widebody 260°C for 10 sec.,
up to seating plane
Solder Reow Temperature SO-8 and See Package Outline
Prole (Surface Mount Parts Only) Option 300 Drawings section
*JEDEC Registered Data (for 6N137 only).
**Ratings apply to all devices except otherwise noted in the Package column.
†0°C to 70°C on JEDEC Registration.
Recommended Operating Conditions
Parameter Symbol Min. Max. Units
Input Current, Low Level IFL* 0 250 µA
Input Current, High Level[1] IFH** 5 15 mA
Power Supply Voltage VCC 4.5 5.5 V
Low Level Enable Voltage† VEL 0 0.8 V
High Level Enable Voltage† VEH 2.0 VCC V
Operating Temperature TA -40 85 °C
Fan Out (at RL = 1 kΩ)[1] N 5 TTL Loads
Output Pull-up Resistor RL 330 4 k Ω
*The o condition can also be guaranteed by ensuring that VFL ≤0.8 volts.
**The initial switching threshold is 5 mA or less. It is recommended that 6.3 mA to 10 mA be used for best performance and to permit at least a
20% LED degradation guardband.
†For single channel products only.
12
Electrical Specications
Over recommended temperature (TA = -40°C to +85°C) unless otherwise specied. All Typicals at VCC = 5 V, TA = 25°C.
All enable test conditions apply to single channel products only. See note 5.
Parameter Sym. Package Min. Typ. Max. Units Test Conditions Fig. Note
High Level Output IOH* All 5.5 100 µA V
CC = 5.5 V, VE = 2.0 V, 1 1, 6,
Current V
O = 5.5 V, IF = 250 mA 19
Input Threshold ITH Single Channel 2.0 5.0 mA V
CC = 5.5 V, VE = 2.0 V, 2, 3 19
Current Widebody VO = 0.6 V,
Dual Channel 2.5 IOL (Sinking) = 13 mA
Low Level Output VOL* 8-Pin DIP 0.35 0.6 V VCC = 5.5 V, VE = 2.0 V, 2, 3, 1, 19
Voltage SO-8 IF = 5 mA, 4, 5
Widebody 0.4 IOL (Sinking) = 13 mA
High Level Supply ICCH Single Channel 7.0 10.0* mA VE = 0.5 V V
CC = 5.5 V 7
Current 6.5 VE = VCC IF = 0 mA
Dual Channel 10 15 Both
Channels
Low Level Supply ICCL Single Channel 9.0 13.0* mA VE = 0.5 V V
CC = 5.5 V 8
Current 8.5 VE = VCC IF = 10 mA
Dual Channel 13 21 Both
Channels
High Level Enable IEH Single Channel -0.7 -1.6 mA VCC = 5.5 V, VE = 2.0 V
Current
Low Level Enable IEL* -0.9 -1.6 mA VCC = 5.5 V, VE = 0.5 V 9
Current
High Level Enable VEH 2.0 V 19
Voltage
Low Level Enable VEL 0.8 V
Voltage
Input Forward VF 8-Pin DIP 1.4 1.5 1.75* V TA = 25°C IF = 10 mA 6, 7 1
Voltage SO-8 1.3 1.80
Widebody 1.25 1.64 1.85 TA = 25°C
1.2 2.05
Input Reverse BVR* 8-Pin DIP 5 V IR = 10 μA 1
Breakdown SO-8
Voltage Widebody 3 IR = 100 µA, TA = 25°C
Input Diode DVF/ 8-Pin DIP -1.6 mV/°C IF = 10 mA 7 1
Temperature ∆TA SO-8
Coecient Widebody -1.9
Input Capacitance CIN 8-Pin DIP 60 pF f = 1 MHz, VF = 0 V 1
SO-8
Widebody 70
*JEDEC registered data for the 6N137. The JEDEC Registration species 0°C to +70°C. HP species -40°C to +85°C.
13
Switching Specications (AC)
Over Recommended Temperature (TA = -40°C to +85°C), VCC = 5 V, IF
= 7.5 mA unless otherwise specied.
All Typicals at TA = 25°C, VCC = 5 V.
Parameter Sym. Package** Min. Typ. Max. Units Test Conditions Fig. Note
Propagation Delay tPLH 20 48 75* ns TA = 25°C RL = 350 Ω 8, 9, 1, 10,
Time to High 100 CL = 15 pF 10 19
Output Level
Propagation Delay tPHL 25 50 75* ns TA = 25°C 1, 11,
Time to Low 100 19
Output Level
Pulse Width |tPHL - tPLH| 8-Pin DIP 3.5 35 ns 8, 9, 13, 19
Distortion SO-8 10,
Widebody 40 11
Propagation Delay tPSK 40 ns 12, 13,
Skew 19
Output Rise tr 24 ns 12 1, 19
Time (10-90%)
Output Fall tf 10 ns 12 1, 19
Time (90-10%)
Propagation Delay tELH Single Channel 30 ns RL = 350 Ω, 13, 14
Time of Enable CL = 15 pF, 14
from VEH to VEL VEL = 0 V, VEH = 3 V
Propagation Delay tEHL Single Channel 20 ns 15
Time of Enable
from VEL to VEH
*JEDEC registered data for the 6N137.
**Ratings apply to all devices except otherwise noted in the Package column.
Parameter Sym. Device Min. Typ. Units Test Conditions Fig. Note
Logic High |CMH| 6N137 1,000 10,000 V/µs |VCM| = 10 V VCC = 5 V, IF = 0 mA, 15 1, 16,
Common HCPL-2630 5,000 10,000 |VCM| = 1 kV VO(MIN) = 2 V, 18, 19
Mode HCPL-0600/0630 RL = 350 Ω, TA = 25°C
Transient HCNW137
Immunity HCPL-2601/2631 10,000 15,000 |VCM| = 1 kV
HCPL-0601/0631
HCNW2601
HCPL-2611/4661 15,000 25,000 |VCM| = 1 kV
HCPL-0611/0661
HCNW2611
Logic Low |CML| 6N137 1,000 10,000 V/µs |VCM| = 10 V VCC = 5 V, IF = 7.5 mA, 15 1, 17,
Common HCPL-2630 5,000 10,000 |VCM| = 1 kV VO(MAX) = 0.8 V, 18, 19
Mode HCPL-0600/0630 RL = 350 Ω, TA = 25°C
Transient HCNW137
Immunity HCPL-2601/2631 10,000 15,000 |VCM| = 1 kV
HCPL-0601/0631
HCNW2601
HCPL-2611/4661 15,000 25,000 |VCM| = 1 kV
HCPL-0611/0661
HCNW2611
14
Package Characteristics
All Typicals at TA = 25°C.
Parameter Sym. Package Min. Typ. Max. Units Test Conditions Fig. Note
Input-Output II-O* Single 8-Pin DIP 1 µA 45% RH, t = 5 s, 20, 21
Insulation Single SO-8 VI-O = 3 kV dc, TA = 25°C
Input-Output VISO 8-Pin DIP, SO-8 3750 V rms RH ≤ 50%, t = 1 min, 20, 21
Momentary With- Widebody 5000 TA = 25°C 20, 22
stand Voltage** OPT 020† 5000
Input-Output RI-O 8-Pin DIP, SO-8 1012 Ω VI-O = 500 V dc 1, 20,
Resistance Widebody 1012 1013 TA = 25°C 23
1011 TA = 100°C
Input-Output CI-O 8-Pin DIP, SO-8 0.6 pF f = 1 MHz, TA = 25°C 1, 20,
Capacitance Widebody 0.5 0.6 23
Input-Input II-I Dual Channel 0.005 µA RH ≤ 45%, t = 5 s, 24
Insulation VI-I = 500 V
Leakage Current
Resistance RI-I Dual Channel 1011 Ω 24
(Input-Input)
Capacitance CI-I Dual 8-Pin DIP 0.03 pF f = 1 MHz 24
(Input-Input) Dual SO-8 0.25
*JEDEC registered data for the 6N137. The JEDEC Registration species 0°C to 70°C. Avago species -40°C to 85°C.
**The Input-Output Momentary Withstand Voltage is a dielectric voltage rating that should not be interpreted as an input-output continuous
voltage rating. For the continuous voltage rating refer to the IEC/EN/DIN EN 60747-5-2 Insulation Characteristics Table (if applicable), your equip-
ment level safety specication or Avago Application Note 1074 entitled “Optocoupler Input-Output Endurance Voltage.
†For 6N137, HCPL-2601/2611/2630/2631/4661 only.
Notes:
1. Each channel.
2. Peaking circuits may produce transient input currents up to 50 mA, 50 ns maximum pulse width, provided average current does not exceed 20 mA.
3. Peaking circuits may produce transient input currents up to 50 mA, 50 ns maximum pulse width, provided average current does not exceed 15 mA.
4. Derate linearly above 80°C free-air temperature at a rate of 2.7 mW/°C for the SOIC-8 package.
5. Bypassing of the power supply line is required, with a 0.1 µF ceramic disc capacitor adjacent to each optocoupler as illustrated in Figure 17. Total
lead length between both ends of the capacitor and the isolator pins should not exceed 20 mm.
6. The JEDEC registration for the 6N137 species a maximum IOH of 250 µA. Avago guarantees a maximum IOH of 100 µA.
7. The JEDEC registration for the 6N137 species a maximum ICCH of 15 mA. Avago guarantees a maximum ICCH of 10 mA.
8. The JEDEC registration for the 6N137 species a maximum ICCL of 18 mA. Avago guarantees a maximum ICCL of 13 mA.
9. The JEDEC registration for the 6N137 species a maximum IEL of –2.0 mA. Avago guarantees a maximum IEL of -1.6 mA.
10. The tPLH propagation delay is measured from the 3.75 mA point on the falling edge of the input pulse to the 1.5 V point on the rising edge of the
output pulse.
11. The tPHL propagation delay is measured from the 3.75 mA point on the rising edge of the input pulse to the 1.5 V point on the falling edge of the
output pulse.
12. tPSK is equal to the worst case dierence in tPHL and/or tPLH that will be seen between units at any given temperature and specied test conditions.
13. See application section titled “Propagation Delay, Pulse-Width Distortion and Propagation Delay Skew” for more information.
14. The tELH enable propagation delay is measured from the 1.5 V point on the falling edge of the enable input pulse to the 1.5 V point on the rising edge
of the output pulse.
15. The tEHL enable propagation delay is measured from the 1.5 V point on the rising edge of the enable input pulse to the 1.5 V point on the falling edge
of the output pulse.
16. CMH is the maximum tolerable rate of rise of the common mode voltage to assure that the output will remain in a high logic state (i.e., VO > 2.0 V).
17. CML is the maximum tolerable rate of fall of the common mode voltage to assure that the output will remain in a low logic state (i.e., VO < 0.8 V).
18. For sinusoidal voltages, (|dVCM | / dt)max = πfCMVCM(p-p).
19. No external pull up is required for a high logic state on the enable input. If the VE pin is not used, tying VE to VCC will result in improved CMR
performance. For single channel products only.
20. Device considered a two-terminal device: pins 1, 2, 3, and 4 shorted together, and pins 5, 6, 7, and 8 shorted together.
21. In accordance with UL1577, each optocoupler is proof tested by applying an insulation test voltage 4500 V rms for one second (leakage detection
current limit, II-O 5 µA). This test is performed before the 100% production test for partial discharge (Method b) shown in the IEC/EN/DIN EN 60747-
5-2 Insulation Characteristics Table, if applicable.
22. In accordance with UL 1577, each optocoupler is proof tested by applying an insulation test voltage ≥ 6000 V rms for one second (leakage detection
current limit, II-O 5 µA). This test is performed before the 100% production test for partial discharge (Method b) shown in the IEC/EN/DIN EN 60747-
5-2 Insulation Characteristics Table, if applicable.
23. Measured between the LED anode and cathode shorted together and pins 5 through 8 shorted together. For dual channel products only.
24. Measured between pins 1 and 2 shorted together, and pins 3 and 4 shorted together. For dual channel products only
15
I
OH
– HIGH LEVEL OUTPUT CURRENT – µA
-60
0
T
A
– TEMPERATURE – °C
100
10
6N137 fig 1
15
-20
5
20
V
CC
= 5.5 V
V
O
= 5.5 V
V
E
= 2.0 V*
I
F
= 250 µA
60-40 0 40 80
* FOR SINGLE
CHANNEL
PRODUCTS
ONLY
Figure 2. Typical output voltage vs. forward input current.
Figure 3. Typical input threshold current vs. temperature.
Figure 1. Typical high level output current vs.
temperature.
1
6
2
3
4
5
1 2 3 4 56
I
F
– FORWARD INPUT CURRENT – mA
R
L
= 350
R
L
= 1 K
R
L
= 4 K
00
V
CC
= 5 V
T
A
= 25 °C
V
O
– OUTPUT VOLTAGE – V
6N137 fig 2a
8-PIN DIP, SO-8
1
6
2
3
4
5
1 2 3 4 56
I
F
– FORWARD INPUT CURRENT – mA
R
L
= 350
R
L
= 1 K
R
L
= 4 K
00
V
CC
= 5 V
T
A
= 25 °C
V
O
– OUTPUT VOLTAGE – V
6N137 fig 2b
WIDEBODY
V
CC
= 5.0 V
V
O
= 0.6 V
6
3
-60 -20 20 60 100
T
A
– TEMPERATURE – °C
2
80400-40
0
I
TH
– INPUT THRESHOLD CURRENT – mA
R
L
= 350
1
4
5
R
L
= 1 K
R
L
= 4 K
6N137 fig 3b
WIDEBODY
VCC = 5.0 V
VO = 0.6 V
6
3
-60 -20 20 60 100
TA – TEMPERATURE – °C
2
80400-40
0
ITH – INPUT THRESHOLD CURRENT – mA
RL = 350
1
4
5
RL = 1 K
RL = 4 K
8-PIN DIP, SO-8
16
V
CC
= 5.0 V
V
E
= 2.0 V*
V
OL
= 0.6 V
70
60
-60 -20 20 60 100
T
A
– TEMPERATURE – °C
50
80400-40
20
I
OL
– LOW LEVEL OUTPUT CURRENT – mA
40
I
F
= 10-15 mA
I
F
= 5.0 mA
* FOR SINGLE
CHANNEL
PRODUCTS ONLY
6N137 fig 5
0.8
0.4
-60 -20 20 60 100
TA – TEMPERATURE – °C
0.2
80400-40
0
VOL – LOW LEVEL OUTPUT VOLTAGE – V
IO = 16 mA
0.1
0.5
0.7
IO = 6.4 mA
6N137 fig 4b
WIDEBODY
VCC = 5.5 V
VE = 2.0 V
IF = 5.0 mA
0.3
0.6
IO = 12.8 mA
IO = 9.6 mA
Figure 7. Typical temperature coecient of forward voltage vs. input current.
Figure 4. Typical low level output voltage vs. temperature. Figure 5. Typical low level output current vs. tem-
perature.
Figure 6. Typical input diode forward characteristic.
0.8
0.4
-60 -20 20 60 100
T
A
– TEMPERATURE – °C
0.2
80400-40
0
V
OL
– LOW LEVEL OUTPUT VOLTAGE – V
I
O
= 16 mA
0.1
0.5
0.7
I
O
= 6.4 mA
6N137 fig 4a
8-PIN DIP, SO-8
V
CC
= 5.5 V
V
E
= 2.0 V*
I
F
= 5.0 mA
0.3
0.6
I
O
= 12.8 mA
I
O
= 9.6 mA
* FOR SINGLE
CHANNEL
PRODUCTS ONLY
I
F
– FORWARD CURRENT – mA
1.1
0.001
V
F
– FORWARD VOLTAGE – V
1.0
6N137 fig 6a
1000
1.3
0.01
1.51.2 1.4
0.1
T
A
= 25 °C
10
100
8-PIN DIP, SO-8
I
F
+
V
F
1.6
dV
F
/dT – FORWARD VOLTAGE
TEMPERATURE COEFFICIENT – mV/°C
0.1 1 10 100
I
F
– PULSE INPUT CURRENT – mA
-1.9
-2.2
-2.1
-2.0
-1.8
-2.3
6N137 fig 7b
WIDEBODY
IF - FORWARD CURRENT - mA
1.2
0.001
VF - FORWARD VOLTAGE - V
1.0
1000
1.4
0.01
1.61.3 1.5
0.1
10
100
WIDEBODY
IF
+
-
VF
1.7
TA = 25
o
C
VCC = 5.0 V
IF = 7.5 mA
40
30
-20 20 60 100
TA - TEMPERATURE - oC
20
80400-40
PWD - PULSE WIDTH DISTORTION - ns
10
RL = 350
RL = 1 k
RL = 4 k
0
-60
-10
17
Figure 8. Test circuit for tPHL and tPLH.
Figure 9. Typical propagation delay vs. temperature. Figure 10. Typical propagation delay vs. pulse input
current.
Figure 11. Typical pulse width distortion vs. tempera-
ture.
Figure 12. Typical rise and fall time vs. temperature.
V
CC
= 5.0 V
T
A
= 25°C
105
90
5 9 13
I
F
– PULSE INPUT CURRENT – mA
75
15117
30
t
P
– PROPAGATION DELAY – ns
60
45
t
PLH
, R
L
= 4 K
t
PLH
, R
L
= 1 K
t
PLH
, R
L
= 350
t
PHL
, R
L
= 350
1 K
4 K
6N137 fig 10
6N137 fig 8a
OUTPUT V
MONITORING
NODE
O
+5 V
7
5
6
8
2
3
4
1
PULSE GEN.
Z = 50
t = t = 5 ns
O
f
I
F
L
R
R
M
CC
V
0.1µF
BYPASS
*C
L
GND
INPUT
MONITORING
NODE
r
SINGLE CHANNEL
6N137 fig 8b
OUTPUT V
MONITORING
NODE
O
+5 V
7
5
6
8
2
3
4
1
PULSE GEN.
Z = 50
t = t = 5 ns
O
f
I
F
L
R
R
M
CC
V
0.1µF
BYPASS
C
L
*
GND
INPUT
MONITORING
NODE
r
DUAL CHANNEL
6N137 fig 8c
1.5 V
t
PHL
t
PLH
I
F
INPUT
O
V
OUTPUT
I = 7.50 mA
F
I = 3.75 mA
F
*C
L
IS APPROXIMATELY 15 pF WHICH INCLUDES
PROBE AND STRAY WIRING CAPACITANCE.
V
CC
= 5.0 V
I
F
= 7.5 mA
100
80
-60 -20 20 60 100
T
A
– TEMPERATURE – °C
60
80400-40
0
t
P
– PROPAGATION DELAY – ns
40
20
t
PLH
, R
L
= 4 K
t
PLH
, R
L
= 1 K
t
PLH
, R
L
= 350
t
PHL
, R
L
= 350
1 K
4 K
6N137 fig 9
tr, tf – RISE, FALL TIME – ns
-60
0
TA – TEMPERATURE – °C
100
300
6N137 fig 12
-20
40
20 60-40 0 40 80
60
290
20
VCC = 5.0 V
IF = 7.5 mA
RL = 4 k
RL = 1 k
RL = 350 Ω, 1 k, 4 k
tRISE
tFALL
RL = 350
VCC = 5.0 V
IF = 7.5 mA
40
30
-20 20 60 100
TA - TEMPERATURE - oC
20
80400-40
PWD - PULSE WIDTH DISTORTION - ns
10
RL = 350
RL = 1 k
RL = 4 k
0
-60
-10
18
OUTPUT V
MONITORING
NODE
O
1.5 V
t
EHL
t
ELH
V
E
INPUT
O
V
OUTPUT
3.0 V
1.5 V
+5 V
7
5
6
8
2
3
4
1
PULSE GEN.
Z = 50
t = t = 5 ns
O
f
I
FL
R
CC
V
0.1 µF
BYPASS
*C
L
*C IS APPROXIMATELY 15 pF WHICH INCLUDES
PROBE AND STRAY WIRING CAPACITANCE.
L
GND
r
7.5 mA
INPUT VE
MONITORING NODE
6N137 fig 13
Figure 13. Test circuit for tEHL and tELH.
Figure 14. Typical enable propagation delay vs.
temperature.
Figure 15. Test circuit for common mode transient immunity and typical waveforms.
6N137 fig 15c
V
O
0.5 V
O
V (MIN.)
5 V
0 V SWITCH AT A: I = 0 mA
F
SWITCH AT B: I = 7.5 mA
F
CM
V
H
CM
CM
L
O
V (MAX.)
CM
V (PEAK)
V
O
tE – ENABLE PROPAGATION DELAY – ns
-60
0
TA – TEMPERATURE – °C
100
90
6N137 fig 14
120
-20
30
20 60-40 0 40 80
60
VCC = 5.0 V
VEH = 3.0 V
VEL = 0 V
IF = 7.5 mA
tELH, RL = 4 k
tELH, RL = 1 k
tEHL, RL = 350 Ω, 1 kΩ, 4 k
tELH, RL = 350
6N137 fig 15a
+5 V
7
5
6
8
2
3
4
1
CC
V
0.1 µF
BYPASS
GND
OUTPUT V
MONITORING
NODE
O
PULSE
GENERATOR
Z = 50
O
+
I
F
B
A
V
FF
CM
V
R
L
SINGLE CHANNEL
6N137 fig 15b
+5 V
7
5
6
8
2
3
4
1
CC
V
0.1 µF
BYPASS
GND
OUTPUT V
MONITORING
NODE
O
PULSE
GENERATOR
Z = 50
O
+
I
F
B
A
V
FF
CM
V
R
L
DUAL CHANNEL
19
Figure 16. Thermal derating curve, dependence of safety limiting value with case temperature per IEC/EN/DIN EN
60747-5-2.
Figure 17. Recommended printed circuit board layout.
OUTPUT POWER – P
S
, INPUT CURRENT – I
S
0
0
T
S
– CASE TEMPERATURE – °C
175
6N137 fig 16b
50
400
12525 75 100 150
600
800
200
100
300
500
700
P
S
(mW)
I
S
(mA)
HCNWXXXX
GND BUS (BACK)
V
CC
BUS (FRONT)
ENABLE
0.1µF
10 mm MAX.
(SEE NOTE 5)
OUTPUT
6N137 fig 17
NC
NC
SINGLE CHANNEL
DEVICE ILLUSTRATED.
OUTPUT POWER – PS, INPUT CURRENT – IS
0
0
TS – CASE TEMPERATURE – °C
200
6N137 fig 16a
50
400
12525 75 100 150
600
800
200
100
300
500
700
PS (mW)
IS (mA)
HCPL-2611 OPTION 060
175
20
6N137 fig 18b
V
CC1
5 V
GND 1
D1*
SHIELD
DUAL CHANNEL DEVICE
CHANNEL 1 SHOWN
8
7
5
390
0.1 µF
BYPASS
1
2
+
5 V
GND 2
V
CC2
2
470
1
I
F
V
F
6N137 fig 18a
*DIODE D1 (1N916 OR EQUIVALENT) IS NOT REQUIRED FOR UNITS WITH OPEN COLLECTOR OUTPUT.
V
CC1
5 V
GND 1
D1*
IF
VF
SHIELD
SINGLE CHANNEL DEVICE
8
6
5
390
0.1 µF
BYPASS
2
3
+
5 V
GND 2
V
CC2
2
470
1
7
V
E
Figure 18. Recommended TTL/LSTTL to TTL/LSTTL interface circuit.
21
Propagation Delay, Pulse-Width Distortion and Propagation
Delay Skew
Propagation delay is a gure of merit which describes
how quickly a logic signal propagates through a sys-
tem. The propagation delay from low to high (tPLH) is the
amount of time required for an input signal to propagate
to the output, causing the output to change from low to
high. Similarly, the propagation delay from high to low
(tPHL) is the amount of time required for the input signal
to propagate to the output causing the output to change
from high to low (see Figure 8).
Pulse-width distortion (PWD) results when tPLH and tPHL
dier in value. PWD is dened as the dierence be-
tween tPLH and tPHL and often determines the maximum
data rate capability of a transmission system. PWD can
be expressed in percent by dividing the PWD (in ns) by
the minimum pulse width (in ns) being transmitted. Typi-
cally, PWD on the order of 20-30% of the minimum pulse
width is tolerable; the exact gure depends on the par-
ticular application (RS232, RS422, T-l, etc.).
Propagation delay skew, tPSK, is an important parameter to
consider in parallel data applications where synchroniza-
tion of signals on parallel data lines is a concern. If the
parallel data is being sent through a group of optocou-
plers, dierences in propagation delays will cause the
data to arrive at the outputs of the optocouplers at dier-
ent times. If this dierence in propagation delays is large
enough, it will determine the maximum rate at which
parallel data can be sent through the optocouplers.
Propagation delay skew is dened as the dierence be-
tween the minimum and maximum propagation delays,
either tPLH or tPHL, for any given group of optocouplers
which are operating under the same conditions (i.e., the
same drive current, supply voltage, output load, and op-
erating temperature). As illustrated in Figure 19, if the in-
puts of a group of optocouplers are switched either ON
or OFF at the same time, tPSK is the dierence between
the shortest propagation delay, either tPLH or tPHL, and the
longest propagation delay, either tPLH or tPHL.
As mentioned earlier, tPSK can determine the maximum
parallel data transmission rate. Figure 20 is the timing
diagram of a typical parallel data application with both
the clock and the data lines being sent through opto-
couplers. The gure shows data and clock signals at the
inputs and outputs of the optocouplers. To obtain the
maximum data transmission rate, both edges of the
clock signal are being used to clock the data; if only one
edge were used, the clock signal would need to be twice
as fast.
Propagation delay skew represents the uncertainty of
where an edge might be after being sent through an
optocoupler. Figure 20 shows that there will be uncer-
tainty in both the data and the clock lines. It is important
that these two areas of uncertainty not overlap, other-
wise the clock signal might arrive before all of the data
outputs have settled, or some of the data outputs may
start to change before the clock signal has arrived. From
these considerations, the absolute minimum pulse width
that can be sent through optocouplers in a parallel appli-
cation is twice tPSK. A cautious design should use a slightly
longer pulse width to ensure that any additional uncer-
tainty in the rest of the circuit does not cause a problem.
The tPSK specied optocouplers oer the advantages of
guaranteed specications for propagation delays, pulse-
width distortion and propagation delay skew over the
recommended temperature, input current, and power
supply ranges.
Figure 19. Illustration of propagation delay skew - tPSK. Figure 20. Parallel data transmission example.
50%
1.5 V
IF
VO
50%I F
VO
tPSK
1.5 V
6N137 fig 19
6N137 fig 20
DATA
tPSK
INPUTS
CLOCK
DATA
OUTPUTS
CLOCK
tPSK
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Data subject to change. Copyright © 2005-2008 Avago Technologies Limited. All rights reserved. Obsoletes AV02-0170ENAV02-0170EN
AV02-0940EN - June 20, 2008