1
TM
File Number 3197.4
HS-6664RH
Radiation Hardened 8kx8 CMOS PROM
The Intersil HS-6664RH is a radiation hardened 64k CMOS
PROM, organized in an 8k word by 8-bit format. The chip is
manufactured using a radiation hardened CMOS process,
and utilizes synchronous circuit design techniques to
achieve high speed performance with very low power
dissipation.
On-chip address latches are provided, allowing easy
interfacing with microprocessors that use a multiplexed
address/data bus structure. The output enable control (G)
simplifies system interfacing by allowing output data bus
control in addition to the chip enable control (E). All bits are
manufactured storing a logical “0” and can be selectively
programmed for a logical “1” at any bit location.
Applications for the HS-6664RH CMOS PROM include low
power microprocessor based instrumentation and
communications systems, remote data acquisition and
processing systems, and processor control storage.
Specifications for Rad Hard QML devices are controlled
by the Defense Supply Center in Columbus (DSCC). The
SMD numbers listed here must be used when ordering.
Detailed Electrical Specifications for these devices are
contained in SMD 5962-95626. A “hot-link” is provided
on our homepage for downloading.
www.intersil.com/spacedefense/space.htm
Ordering Information
ORDERING NUMBER
INTERNAL
MKT. NUMBER
TEMP. RANGE
(oC)
5962F9562601QXC HS1-6664RH-8 -55 to 125
5962F9562601QYC HS9-6664RH-8 -55 to 125
5962F9562601VXC HS1-6664RH-Q -55 to 125
5962F9562601VYC HS9-6664RH-Q -55 to 125
HS1-6664RH/PROTO HS1-6664RH/PROTO -55 to 125
HS9-6664RH/PROTO HS9-6664RH/PROTO -55 to 125
Features
Electrically Screened to SMD # 5962-95626
QML Qualified per MIL-PRF-38535 Requirements
1.2 Micron Radiation Hardened Bulk CMOS
Total Dose . . . . . . . . . . . . . . . . . . . . . . 300 krad(Si) (Max)
Transient Output Upset . . . . . . . . . . . . . .>5x108 rad(Si)/s
LET >100 MEV-cm2/mg
Fast Access Time. . . . . . . . . . . . . . . . . . . . . . . 35ns (Typ)
Single 5V Power Supply
Single Pulse 10V Field Programmable
Synchronous Operation
On-Chip Address Latches
Three-State Outputs
NiCr Fuses
Low Standby Current . . . . . . . . . . . . . . <500μA (Pre-Rad)
Low Operating Current. . . . . . . . . . . . . . . . . . <15mA/MHz
Military Temperature Range. . . . . . . . . . . -55oC to 125oC
Data Sheet August 2000
[ /Title
(HS-
6664R
H)
/Subjec
t
(Radiat
ion
Harden
ed 8K
x 8
CMOS
PROM
)
/Autho
r ()
/Keyw
ords
(Intersi
l
Corpor
ation,
semico
nducto
r,
Radiati
on
Harden
ed,
RH,
Rad
Hard,
QML,
Satellit
e,
SMD,
Class
V,
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
1-888-INTERSIL or 321-724-7143 | Intersil and Design is a trademark of Intersil Corporation. | Copyright © Intersil Corporation 2000
2
Pinouts
28 LEAD CERAMIC (SBDIP)
CASE OUTLINE D28.6 MIL-STD-1835, CDIP2-T28
TOP VIEW
NC
A12
A7
A6
A5
A4
A3
A2
A1
A0
DQ0
DQ1
DQ2
GND
VDD
NC
A8
A9
A11
A10
DQ7
DQ6
DQ5
DQ4
DQ3
P
G
E
28
27
26
25
24
23
22
21
20
19
18
17
16
15
1
2
3
4
5
6
7
8
9
10
11
12
13
14
28 LEAD FLATPACK
CASE OUTLINE K28.A MIL-STD-1835, CDFP3-F28
TOP VIEW
1
2
3
4
5
6
7
8
9
10
11
12
13
14
28
27
26
25
24
23
22
21
20
19
18
17
16
15
NC
A12
A7
A6
A5
A4
A3
A2
A1
A0
DQ0
DQ1
DQ2
GND
VDD
NC
A8
A9
A11
A10
DQ7
DQ6
DQ5
DQ4
DQ3
P
G
E
P must be hardwired at all times to VDD, except during programming.
Functional Diagram
256x256
MATRIX
32 32 32 32 32 32 32 32
256
GATED ROW
DECODER
LATCHED
ADDRESS
REGISTER
8
MSB
A2
A3
A4
A5
A6
A7
A8
LSB
GATED COLUMN DECODER
PROGRAMMING, AND DATA
OUTPUT CONTROL
A
A
8
EE
8
LATCHED ADDRESS
REGISTER
E
E
A5A5
8
1 OF 8
A0 A10 A9 A11 A12
MSB LSB
P
E
G
Q0 - Q7
A1
NOTE: P must be hardwired at all times to VDD, except during programming.
TRUTH TABLE
E G MODE
0 0 Enabled
0 1 Output Disabled
1 X Disabled
HS-6664RH
Burn-In Circuits
HS1-6664RH 28 LEAD (8kx8 PROM DIP)
HS9-6664RH 28 LEAD (8kx8 PROM FLATPACK)
1
2
3
4
5
6
7
8
9
10
11
12
13
14
28
27
26
25
24
23
22
21
20
19
18
17
16
15
NC
A7
A6
A5
A4
A3
A2
A1
A0
DQ0
DQ1
DQ2
VSS
VDD
A8
A9
A11
A10
DQ7
DQ6
DQ5
DQ4
DQ3
P
G
E1
A12
NC
NC
NC
NC NC
VDDNC
NC
NC
NC
NC
NC
VSS = GND
STATIC CONFIGURATION
NOTES:
Power Supply:1. VDD = 5.5V (Min)
Resistors = 10kΩ ± 10%2.
HS1-6664RH 28 LEAD (8kx8 PROM DIP)
HS9-6664RH 28 LEAD (8kx8 PROM FLATPACK)
1
2
3
4
5
6
7
8
9
10
11
12
13
14
28
27
26
25
24
23
22
21
20
19
18
17
16
15
NC
A7
A6
A5
A4
A3
A2
A1
A0
DQ0
DQ1
DQ2
VSS
VDD
A8
A9
A11
A10
DQ7
DQ6
DQ5
DQ4
DQ3
P
G
E1
A12
LOAD
LOAD
LOAD
NC NC
VDDNC
LOAD
LOAD
LOAD
LOAD
LOAD
VSS = GND
F9
F10
F12
F0
F11
F0
F6
F5
F4
F3
F2
F1
F13
F8
F7
OUT VDD/2
10kΩ
LOAD:
DYNAMIC CONFIGURATION
NOTES:
Power Supply: VDD = 5.5V (Min)3.
VIH = VDD to VDD-1.0V4.
VIL = 0.0V to 0.8V5.
Resistors = 10kΩ ± 10%6.
F0 = 100kHz ± 10%, 50% Duty Cycle7.
F1 = F0/2; F2 = F1/2; F3 = F2/2; F4 = F3/2; F5 = F4/2; . . .8.
F13 = F12/2
Irradiation Circuit
HS1-6664RH 28 LEAD (8kx8 PROM DIP)
1
2
3
4
5
6
7
8
9
10
11
12
13
14
28
27
26
25
24
23
22
21
20
19
18
17
16
15
NC
A7
A6
A5
A4
A3
A2
A1
A0
DQ0
DQ1
DQ2
VSS
VDD
A8
A9
A11
A10
DQ7
DQ6
DQ5
DQ4
DQ3
P
G
E1
A12
NCNC
VDDNC
VDD = GND
NOTES:
Power Supply:9. VDD = 5.5V ± ±0.5V
All Resistors = 47kΩ ± 10%10.
3
HS-6664RH
4
Die Characteristics
DIE DIMENSIONS:
271milsx307milsx19mils ±1mils
INTERFACE MATERIALS:
Glassivation:
Type: SiO2
Thickness: 8kÅ ± 1kÅ
Top Metallization:
M1:6kÅ ±±1kÅ Si/Al/Cu
2kÅ ±±500Å TiW
M2:10kÅ ± 2kÅSi/Al/Cu
ASSEMBLY RELATED INFORMATION:
Substrate Potential:
VDD
ADDITIONAL INFORMATION:
Worst Case Current Density:
2x105 A/cm2
Transistor Count:
110, 874
Metallization Mask Layout
HS-6664RH
(2) A12
(3) A7
(7) A3
(6) A4
(5) A5
(4) A6
(28) VDD
(27) P
(26) NC
(25) A8
(24) A9
(23) A11
(22) G
VSS
VSS
VDD
A2 (8)
A1 (9)
A0 (10)
DQ0 (11)
DQ1 (12)
DQ2 (13)
GND (14)
DQ3 (15)
DQ4 (16)
DQ5 (17)
DQ6 (18)
DQ7 (19)
E (20)
A10 (21)
VDD
HS-6664RH
5
All Intersil semiconductor products are manufactured, assembled and tested under ISO9000 quality systems certification.
Intersil semiconductor products are sold by description only. Intersil Corporation reserves the right to make changes in circuit design and/or specifications at any time with-
out notice. Accordingly, the reader is cautioned to verify that data sheets are current before placing orders. Information furnished by Intersil is believed to be accurate and
reliable. However, no responsibility is assumed by Intersil or its subsidiaries for its use; nor for any infringements of patents or other rights of third parties which may result
from its use. No license is granted by implication or otherwise under any patent or patent rights of Intersil or its subsidiaries.
For information regarding Intersil Corporation and its products, see web site www.intersil.com
Sales Office Headquarters
NORTH AMERICA
Intersil Corporation
P. O. Box 883, Mail Stop 53-204
Melbourne, FL 32902
TEL: (321) 724-7000
FAX: (321) 724-7240
EUROPE
Intersil SA
Mercure Center
100, Rue de la Fusee
1130 Brussels, Belgium
TEL: (32) 2.724.2111
FAX: (32) 2.724.22.05
ASIA
Intersil Ltd.
8F-2, 96, Sec. 1, Chien-kuo North,
Taipei, Taiwan 104
Republic of China
TEL: 886-2-2515-8508
FAX: 886-2-2515-8369
HS-6664RH