RT8010/A
®
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Copyright 2012 Richtek Technology Corporation. All rights reserved. is a registered trademark of Richtek Technology Corporation.
Features
2.5V to 5.5V Input Range
Output V oltage (Adjustable Output From 0.6V to VIN)
``
``
` RT8010 : 1V, 1.2V, 1.5V, 1.6V, 1.8V, 2.5V and 3.3V
Fixed/Adjustable Output Voltage
``
``
` RT8010A Adjustable Output Voltage Only
1A Output Current
95% Efficiency
No Schottky Diode Required
1.5MHz Fixed-Frequency PWM Operation
Small 6-Lead WDFN and 16-Lead WQFN Package
RoHS Compliant and 100% Lead (Pb)-Free
Applications
Mobile Phones
Personal Information Applia nces
Wireless a nd DSL Mode ms
MP3 Players
Portable Instruments
1.5MHz, 1A, High Efficiency PWM Step-Down DC/DC Converter
General Description
The RT8010/A is a high efficiency Pulse-Width-Modulated
(PWM) step-down DC/DC converter. Capable of delivering
1A output current over a wide input voltage range from
2.5V to 5.5V, the RT8010/A is ideally suited for portable
electronic devices that are powered from 1-cell Li-ion
battery or from other power sources such as cellular
phones, PDAs and hand-held devices.
T wo operating modes are available including : PWM/Low-
Dropout autoswitch and shutdown modes. The Internal
synchronous rectifier with low RDS(ON) dra matically reduces
conduction loss at PWM mode. No external Schottky
diode is required in pra ctical a pplication.
The RT8010/A enters Low Dropout mode when normal
PWM cannot provide regulated output voltage by
continuously turning on the upper P-MOSFET. RT8010/A
enter shut-down mode and consumes less than 0.1μA
when EN pin is pulled low.
The switching ripple is easily smoothed-out by small
package filtering elements due to a fixed operating
frequency of 1.5MHz. This along with small W DF N-6L 2x2
and WQFN-16L 3x3 package provides small PCB area
a pplication. Other features include soft start, lower internal
reference voltage with 2% accuracy, over temperature
protection, and over current protection.
Ordering Information
Pin Configurations
(TOP VIEW)
WDFN-6L 2x2 (RT8010)
Marking Information
For marking information, conta ct our sales representative
directly or through a Richtek distributor located in your
area.
WQFN-16L 3x3 (RT8010A)
RT8010/A(- ) Package Type
QW : WDFN/WQFN (W-Type)
Lead Plating System
P : Pb Free
G : Green (Halogen Free and Pb Free)
Output Voltage
Default : Adjustable (RT8010/A)
Fixed (RT8010)
10 : 1.0V
12 : 1.2V
15 : 1.5V
16 : 1.6V
18 : 1.8V
25 : 2.5V
33 : 3.3V
WQFN-16L 3x3
WDFN-6L 2x2
Note :
Richtek products are :
` RoHS compliant and compatible with the current require-
ments of IPC/JEDEC J-STD-020.
` Suitable for use in SnPb or Pb-free soldering processes.
IC
VIN
FB/VOUT
GND
LX
EN 5
4
1
2
3
6
7
12
11
10
9
13141516
1
2
3
4
8765
FB/VOUT
GND
GND
GND VIN
VIN
VIN
VIN
GND
EN
IC
IC
IC
LX
LX
LX
17
RT8010/A
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Typical Application Circuit
Figure 1. Fixed Voltage Regulator
Figure 2. Adjustable Voltage Regulator
+= R2
R1
1 x VV REFOUT
with R2 = 300kΩ to 60kΩ so the IR2 = 2 μA to 10μA,
and (R1 x C1) should be in the range between 3x10-6 and 6x10-6 for component selection.
Figure 3
Layout note :
1. The distance that CIN connects to VIN is as close as possible (Under 2mm).
2. COUT should be placed near RT8010/A.
Layout Guide
4.7µF
10µF
VIN LX
IC
RT8010/A
EN VOUT
2.2µH
2.5V to 5.5V
VIN VOUT
CIN
L
6
4
3
2
5
COUT
GND
1
4.7µF
10µF
VIN LX
RT8010/A
EN FB
2.2µH
2.5V to 5.5V
VIN VOUT
CIN
L
6
4
3
2COUT
R1
R2
C1
IR2
IC 5
GND
1
L1
IC
EN
VIN
GND
LX
COUT
CIN
RT8010/A_FIX
CIN must be placed
to the VIN as close
as possible.
LX should be connected
to Inductor by wide and
short trace, keep
sensitive components
away from this trace.
Output capacitor
must be near
RT8010
1
2
34
5
6VOUT IC
EN
VIN
FB
GND
LX
RT8010/A_ADJ
CIN must be placed
to the VIN as close
as possible.
LX should be
connected to
Inductor by wide
and short trace,
keep sensitive
components away
from this trace.
Output
capacitor
must be near
RT8010/A
L1
COUT
CIN
1
2
34
5
6
R1
R2
RT8010/A
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Function Block Diagram
Functional Pin Description
Pin No.
RT8010 RT8010A
Pin Name Pin Function
1 6, 8, 16 IC Internal Connection. Leav e floating and do not make connection
to this p in.
2 7 EN
Chip Enable (Active High).
3 9, 10, 11, 12 VIN Power Input. (Pin 9 and Pin 10 must be connected with Pin 11).
4 13, 14, 15 LX Pin for Switching. (Pin 13 m ust be connected with Pin 14).
5 1, 2, 3, 5 GN D Ground.
6 4 FB/VOUT Feedback/Output Voltage.
7 (E xpo sed Pa d) 17 (Expos ed P ad) GND Ground. The exposed pad m ust be solder ed to a large PCB and
connected to G ND for maximum therm al diss ipation.
COMP
RC
RS1
RS2
EN VIN
LX
FB/VOUT
UVLO &
Power Good
Detector VREF
Slope
Compensation
Current
Sense
OSC &
Shutdown
Control
Current
Limit
Detector
Driver
Control
Logic
PWM
Comparator
Error
Amplifier
GND
RT8010/A
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Absolute Maximum Ratings (Note 1)
Supply Input Voltage------------------------------------------------------------------------------------------------- 6.5V
EN, FB Pin Voltage -------------------------------------------------------------------------------------------------- 0.3V to VIN
LX Pin Switch Voltage----------------------------------------------------------------------------------------------- 0.3V to (VIN + 0.3V)
<20ns ------------------------------------------------------------------------------------------------------------------- 4.5V to 7.5V
LX Pin Switch Current ----------------------------------------------------------------------------------------------- 2A
Power Dissipation, PD @ TA = 25°C
WDFN-6L 2x2 --------------------------------------------------------------------------------------------------------- 0.833W
WQFN-16L 3x3 ------------------------------------------------------------------------------------------------------- 1.47W
Pa ckage Thermal Re sistance (Note 2)
WDFN-6L 2x2, θJA ---------------------------------------------------------------------------------------------------- 120°C/W
WDFN-6L 2x2, θJC --------------------------------------------------------------------------------------------------- 20°C/W
WQFN-16L 3x3, θJA -------------------------------------------------------------------------------------------------- 68°C/W
WQFN-16L 3x3, θJC ------------------------------------------------------------------------------------------------- 7.5°C/W
Lead Temperature (Soldering, 10 sec.)-------------------------------------------------------------------------- 260°C
Storage T emperature Range --------------------------------------------------------------------------------------- 65°C to 150°C
Junction T emperature------------------------------------------------------------------------------------------------ 150°C
ESD Susceptibility (Note 3)
HBM (Human Body Model)----------------------------------------------------------------------------------------- 2kV
Electrical Characteristics
(VIN = 3.6V, VOUT = 2.5V, L = 2.2μH, CIN = 4.7μF, COUT = 10μF, TA = 25°C, IMAX = 1A unless otherwise specified)
Parameter Symbol Test Conditions Min Typ Max Unit
I nput V olt age Ra nge VIN 2.5 -- 5.5 V
Q ui es cent Current IQ I
OUT = 0mA, VFB = VREF + 5% - - 50 70 μA
S hutdown Current ISHDN EN = G ND - - 0.1 1 μA
Ref er enc e V olt a ge VREF For Adjustable Output Voltage 0.588 0.6 0.612 V
Adjustable Output Range VOUT (Note 5) VREF -- VIN 0.2V V
ΔVOUT VIN = 2.5V to 5. 5V, V OUT = 1 V
0A < IOUT < 1 A 3 -- 3
ΔVOUT VIN = 2.5V to 5. 5V, V OUT = 1. 2V
0A < IOUT < 1 A 3 -- 3
ΔVOUT VIN = 2.5V to 5. 5V, V OUT = 1. 5V
0A < IOUT < 1 A 3 -- 3
ΔVOUT VIN = 2.5V to 5. 5V, V OUT = 1. 6V
0A < IOUT < 1 A 3 -- 3
Output Voltage
Accuracy Fix
ΔVOUT VIN = 2.5V to 5. 5V, V OUT = 1. 8V
0A < IOUT < 1 A 3 -- 3
%
Recommended Operating Conditions (Note 4)
Supply Input Voltage------------------------------------------------------------------------------------------------- 2.5V to 5.5V
Junction T emperature Range--------------------------------------------------------------------------------------- 40°C to 125°C
Ambient T emperature Range--------------------------------------------------------------------------------------- 40°C to 85°C
RT8010/A
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Parameter Symbol Test Conditions Min Typ Max Unit
ΔVOUT VIN = VOUT + ΔV to 5.5V (Note 6)
VOUT = 2. 5V, 0A < IOUT < 1A 3 -- 3
Fix
ΔVOUT VIN = VOUT + ΔV to 5.5V (Note 6)
VOUT = 3. 3V, 0A < IOUT < 1A 3 -- 3
%
Outpu t Volt age
Accuracy
Adjustable ΔVOUT VIN = VOUT + ΔV to 5.5V (Note 6)
0A < IOUT < 1A 3 -- 3 %
FB I nput C ur re nt IFB V
FB = VIN 50 -- 50 nA
VIN = 3. 6V -- 0.28 --
P-M OSF ET RON R
DS(ON)_P IOUT = 200mA VIN = 2. 5V -- 0.38 -- Ω
VIN = 3. 6V -- 0.25 --
N- MOSFET R ON R
DS(ON)_N IOUT = 200mA VIN = 2. 5V -- 0.35 -- Ω
P-C hannel Current Lim it ILIM_P VIN = 2.5V to 5. 5 V 1.4 1.5 -- A
EN Hi gh-Level Input Voltage VEN_H V
IN = 2.5V to 5. 5V 1.5 -- --
EN Low-Level I nput Vol tage VEN_L V
IN = 2.5V to 5. 5V -- -- 0.4
V
U nder V oltag e Lock Out thr eshold UVLO - - 1. 8 - - V
Hysteresis -- 0.1 -- V
O scil lator Fr equency fOSC V
IN = 3.6V , I OUT = 100m A 1.2 1.5 1.8 MHz
Therm al S hutdow n Temperatu re TSD -- 160 --
°C
M ax. D uty Cycle 100 -- - - %
LX Leaka ge Cur r ent VIN = 3. 6 V, VLX = 0V o r VLX = 3.6 V 1 -- 1
μA
Note 1. Stresses beyond those listed Absolute Maximum Ratings may cause permanent damage to the device. These are
stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated in
the operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions may
affect device reliability.
Note 2. θJA is measured at TA = 25°C on a high effective thermal conductivity four-layer test board per JEDEC 51-7. θJC is
measured at the exposed pad of the package.
Note 3. Devices are ESD sensitive. Handling precaution recommended.
Note 4. The device is not guaranteed to function outside its operating conditions.
Note 5. Guarantee by design.
Note 6. ΔV = IOUT x PRDS(ON)
RT8010/A
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Typical Operating Characteristics
Efficiency vs. Output Current
0
10
20
30
40
50
60
70
80
90
100
0 0.1 0.2 0.3 0.4 0.5 0.6 0.7 0.8 0.9 1
Output Current (A)
Efficiency (%)
VOUT = 3.3V, COUT = 4.7 μF, L = 4.7μH
VIN = 3.6V
VIN = 4.2V
VIN = 5V
Efficiency vs. Output Current
0
10
20
30
40
50
60
70
80
90
100
0 0.1 0.2 0.3 0.4 0.5 0.6 0.7 0.8 0.9 1
Output Current (A)
Efficiency (%)
VOUT = 1.2V, COUT = 10μF, L = 2.2 μH
VIN = 5V
VIN = 3.3V
VIN = 2.5V
Efficiency vs. Output Current
0
10
20
30
40
50
60
70
80
90
100
0 0.1 0.2 0.3 0.4 0.5 0.6 0.7 0.8 0.9 1
Output Current (A)
Effi ciency (% )
VOUT = 1.2V, COUT = 4.7μF, L = 4.7μH
VIN = 5V
VIN = 3.3V
VIN = 2.5V
EN Pin Threshold vs. Input Voltage
0.60
0.65
0.70
0.75
0.80
0.85
0.90
0.95
1.00
1.05
1.10
1.15
1.20
2.5 2.8 3.1 3.4 3.7 4 4.3 4.6 4.9 5.2 5.5
In put Voltage (V)
EN Pi n Threshold (V)
VOUT = 1.2V, IOUT = 0A
Rising
Falling
UVLO Voltage v s. Temperature
1.2
1.3
1.4
1.5
1.6
1.7
1.8
1.9
2.0
-40 -25 -10 5 20 35 50 65 80 95 110 125
TemperatureC)
Input Voltage (V)
VOUT = 1.2V, IOUT = 0A
Rising
Falling
EN Pin Threshold vs. Temperature
0.4
0.5
0.6
0.7
0.8
0.9
1.0
1.1
1.2
1.3
1.4
1.5
1.6
-40 -25 -10 5 20 35 50 65 80 95 110 125
Temperatur e (°C)
EN Pin Threshol d (V
)
VIN = 3.6V, VOUT = 1.2V, IOUT = 0A
Rising
Falling
RT8010/A
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Output Current Limit vs. Input Voltage
1.5
1.6
1.7
1.8
1.9
2.0
2.1
2.2
2.3
2.4
2.5
2.6
2.5 2.8 3.1 3.4 3.7 4 4.3 4.6 4.9 5.2 5.5
In put Voltage (V)
Output Current Limit (A)
VOUT = 1.2V @ TA = 20°C
Frequency vs. Input Voltage
1.20
1.25
1.30
1.35
1.40
1.45
1.50
1.55
1.60
2.5 2.8 3.1 3.4 3.7 4 4.3 4.6 4.9 5.2 5.5
Input Voltage (V)
Fr equency (kHz)
VIN = 3.6V, VOUT = 1.2V, IOUT = 300mA
Output Voltage vs. Temperature
1.15
1.16
1.17
1.18
1.19
1.20
1.21
1.22
1.23
1.24
1.25
-40 -25 -10 5 20 35 50 65 80 95 110 125
TemperatureC)
Output Volt age (V)
VIN = 3.6V, IOUT = 0A
Frequency vs. Tempe rature
1.20
1.25
1.30
1.35
1.40
1.45
1.50
1.55
1.60
-40 -25 -10 5 20 35 50 65 80 95 110 125
Temperatur e (°C)
Frequency ( kH z) 1
VIN = 3.6V, VOUT = 1.2V, IOUT = 300mA
Output Voltage vs. Load Current
1.180
1.185
1.190
1.195
1.200
1.205
1.210
1.215
1.220
1.225
1.230
0 0.1 0.2 0.3 0.4 0.5 0.6 0.7 0.8 0.9 1
Load Current (A)
Output Voltage (V)
VIN = 5V
VIN = 3.6V
Output Current Limit vs. Te mperature
1.5
1.6
1.7
1.8
1.9
2.0
2.1
2.2
2.3
2.4
2.5
2.6
-40 -25 -10 5 20 35 50 65 80 95 110 125
Temperatur e (°C)
Output Current Limit (A
)
VIN = 5V
VIN = 3.6V
VIN = 3.3V
VOUT = 1.2V
RT8010/A
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Power On from EN
Time (100μs/Div)
VIN = 3.6V, VOUT = 1.2V, IOUT = 1A
VOUT
(1V/Div)
VEN
(2V/Div)
IIN
(500mA/Div)
Power On from EN
Time (100μs/Div)
VIN = 3.6V, VOUT = 1.2V, IOUT = 10mA
VOUT
(1V/Div)
VEN
(2V/Div)
IIN
(500mA/Div)
Power On from VIN
Time (250μs/Div)
VEN = 3V, VOUT = 1.2V, ILX = 1A
VOUT
(1V/Div)
VIN
(2V/Div)
ILX
(1A/Div)
Power Off from EN
Time (100μs/Div)
VIN = 3.6V, VOUT = 1.2V, ILX = 1A
VOUT
(1V/Div)
VEN
(2V/Div)
ILX
(1A/Div)
Load Transient Response
Time (50μs/Div)
VIN = 3.6V, VOUT = 1.2V
IOUT = 50mA to 1A
VOUT ac
(50mV/Div)
IOUT
(500mA/Div)
Load Transient Response
Time (50μs/Div)
VIN = 3.6V, VOUT = 1.2V
IOUT = 50mA to 0.5A
VOUT ac
(50mV/Div)
IOUT
(500mA/Div)
RT8010/A
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Output Ripple Voltage
Time (500ns/Div)
VIN = 5V, VOUT = 1.2V
IOUT = 1A
VOUT
(10mV/Div)
VLX
(2V/Div)
Output Ripple Voltage
Time (500ns/Div)
VIN = 3.6V, VOUT = 1.2V
IOUT = 1A
VOUT
(10mV/Div)
VLX
(2V/Div)
Load Transient Response
Time (50μs/Div)
VIN = 5V, VOUT = 1.2V
IOUT = 50mA to 1A
VOUT ac
(50mV/Div)
IOUT
(500mA/Div)
Load Transient Response
Time (50μs/Div)
VIN = 5V, VOUT = 1.2V
IOUT = 50mA to 0.5A
VOUT ac
(50mV/Div)
IOUT
(500mA/Div)
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Applications Information
The ba sic RT8010/A a pplication circuit is shown in T ypical
Application Circuit. External component selection is
determined by the maximum load current and begins with
the selection of the inductor value and operating frequency
followed by CIN and COUT.
Inductor Selection
For a given input and output voltage, the inductor value
and operating frequency determine the ripple current. The
ripple current ΔIL increa ses with higher VIN and decrea ses
with higher inductance.
Having a lower ripple current reduces the ESR losses in
the output capacitors and the output voltage ripple. Highest
efficiency operation is achieved at low frequency with small
ripple current. This, however, requires a large inductor .
A rea sonable starting point for selecting the ripple current
is ΔIL = 0.4(IMAX). The largest ripple current occurs at the
highest VIN. To guarantee that the ripple current stays
below a specified maximum, the inductor value should be
chosen a ccording to the following equation :
Inductor Core Selection
Once the value for L is known, the type of inductor must
be selected. High eff iciency converters generally cannot
afford the core loss found in low cost powdered iron cores,
forcing the use of more expensive ferrite or mollypermalloy
cores. Actual core loss is independent of core size for a
fixed inductor value but it is very dependent on the
inductance selected. As the inductance increases, core
losses decrease. Unfortunately, increased inductance
requires more turns of wire and theref ore copper losse s
will increase.
Ferrite designs have very low core losses and are preferred
at high switching frequencies, so design goals can
concentrate on copper loss and preventing saturation.
Ferrite core material saturates hard, which mea ns that
inductance collapses abruptly when the peak design
current is exceeded. This results in a n abrupt increa se in
inductor ripple current and consequent output voltage ripple.
Do not allow the core to saturate!
Different core materi als and sha pes will change the size/
current and price/current relationship of a n inductor.
T oroid or shielded pot cores in ferrite or permalloy materials
are small and don't radiate energy but generally cost more
than powdered iron core inductors with similar
chara cteristics. The choice of which style inductor to use
mainly depends on the price vs size requirements and
any radiated field/EMI requirements.
CIN and COUT Selection
The input capacitance, CIN, is needed to filter the
trapezoidal current at the source of the top MOSFET. To
prevent large ripple voltage, a low ESR input capacitor
sized for the maximum RMS current should be used. RMS
current is given by :
This formula has a maximum at VIN = 2VOUT, where
IRMS = IOUT/2. This simple worst-case condition is
commonly used for design because even significant
deviations do not offer much relief. Note that ripple current
ratings from ca p acitor ma nufa cturers are often based on
only 2000 hours of life which makes it advisable to further
derate the capacitor, or choose a capacitor rated at a higher
temperature tha n required. Several capacitors may also
be paralleled to meet size or height requirements in the
design.
The selection of COUT is determined by the Effective Series
Resistance (ESR) that is required to minimize voltage
ripple and load step transients, as well as the amount of
bulk capacitance that is necessary to ensure that the
control loop is stable. Loop stability can be checked by
viewing the load tra nsient response a s described in a later
section. The output ri pple, ΔVOUT, is determined by :
⎡⎤
Δ×
⎢⎥
×
⎣⎦
OUT OUT
LIN
VV
I = 1
fL V
⎡⎤
×−
⎢⎥
×Δ
⎣⎦
OUT OUT
L(MAX) IN(MAX)
VV
L = 1
fI V
OUT IN
RMS OUT(MAX) IN OUT
VV
I = I 1
VV
⎡⎤
Δ≤Δ
⎢⎥
⎣⎦
OUT L OUT
1
V I ESR+8fC
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The output ripple is highest at maximum input voltage
since ΔIL increa ses with input voltage. Multiple ca pacitors
placed in parallel may be needed to meet the ESR and
RMS current handling requirements. Dry tantalum, special
polymer, aluminum electrolytic and cera mic capacitors are
all available in surfa ce mount packages. Special polymer
ca pacitors offer very low ESR but have lower ca pa citance
density than other types. Tantalum capacitors have the
highest capacitance density but it is important to only
use types that have been surge tested for use in switching
power supplies. Aluminum electrolytic capacitors have
significantly higher ESR but can be used in cost-sensitive
a pplications provided that consideration is given to ripple
current ratings and long term reliability . Ceramic ca pacitors
have excellent low ESR characteristics but can have a
high voltage coefficient and audible piezoelectric effects.
The high Q of ceramic capacitors with trace inductance
ca n also lea d to significa nt ringing.
Using Ceramic In put and Output Cap acitors
Higher values, lower cost ceramic capacitors are now
becoming available in smaller ca se sizes. Their high ripple
current, high voltage rating and low ESR make them ideal
for switching regulator applications. However , care must
be taken when these ca pacitors are used at the input and
output. When a ceramic capacitor is used at the input
a nd the power is supplied by a wall ada pter through long
wires, a load ste p at the output ca n induce ringing at the
input, VIN. At best, this ringing can couple to the output
and be mistaken as loop instability. At worst, a sudden
inrush of current through the long wires can potentially
cause a voltage spike at VIN large enough to da mage the
part.
Output Voltage Programming
The resistive divider allows the FB pin to sense a fra ction
of the output voltage a s shown in Figure 4.
Figure 4. Setting the Output Voltage
where VREF is the internal reference voltage (0.6V typ.)
For adjustable voltage mode, the output voltage is set by
an external resistive divider according to the following
equation :
Efficiency Considerations
The efficiency of a switching regulator is equal to the output
power divided by the input power times 100%. It is often
useful to analyze individual losses to determine what is
limiting the efficiency and which change would produce
the most improvement. Ef ficiency ca n be expressed as :
Efficiency = 100% (L1+ L2+ L3+ ...)
where L1, L2, etc. are the individual losses a s a percentage
of input power. Although all dissipative elements in the
circuit produce losses, two main sources usually a ccount
for most of the losses : VIN quiescent current and I2R
losses.
The VIN quiescent current loss dominates the efficiency
loss at very low load currents whereas the I2R loss
dominates the efficiency loss at medium to high load
currents. In a typical efficiency plot, the efficiency curve
at very low load currents can be misleading since the
a ctual power lost is of no consequence.
1. The VIN quiescent current a ppears due to two factors
including : the DC bias current as given in the electrical
characteristics and the internal main switch and
synchronous switch gate charge currents. The gate charge
current results from switching the gate ca pacitance of the
internal power MOSFET switche s. Ea ch ti me the gate is
switched from high to low to high again, a packet of charge
ΔQ moves from VIN to ground.
The resulting ΔQ/Δt is the current out of VIN that is typically
larger tha n the DC bia s current. In continuous mode,
IGATECHG = f (QT + QB)
where QT and QB are the gate charges of the internal top
and bottom switches. Both the DC bias a nd gate charge
losses are proportional to VIN and thus their effects will
be more pronounced at higher supply voltages.
RT8010/A
GND
FB
R1
R2
VOUT
⎛⎞
=⎜⎟
⎝⎠
OUT REF R1
VV1+
R2
RT8010/A
12 DS8010/A-09 September 2012www.richtek.com
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Copyright 2012 Richtek Technology Corporation. All rights reserved. is a registered trademark of Richtek Technology Corporation.
Checking Tran sient Re spon se
The regulator loop response can be checked by looking
at the load tra nsient response. Switching regulators ta ke
several cycles to respond to a step in load current. When
a load step occurs, VOUT immediately shifts by an a mount
equal to ΔILOAD (ESR), where ESR is the effective series
resistance of COUT. ΔILOAD also begins to charge or
discharge COUT generating a feedba ck error signal used
by the regulator to return VOUT to its steady-state value.
During this recovery time, VOUT can be monitored for
overshoot or ringing that would indicate a stability problem.
Layout Considerations
Follow the PCB layout guidelines for optimal performance
of RT8010/A.
`For the main current paths as indicated in bold lines in
Figure 6, keep their tra c es short a nd wide.
`Put the input ca pacitor as close a s possible to the device
pins (VIN and GND).
`LX node is with high frequency voltage swing and should
be kept small area. Keep analog components away from
LX node to prevent stray ca pacitive noise pick-up.
2. I2R losses are calculated from the resistances of the
internal switches, RSW and external inductor RL. In
continuous mode, the average output current flowing
through inductor L is chopped between the main switch
a nd the synchronous switch. Thus, the series resista nce
looking into the LX pin is a function of both top and bottom
MOSFET RDS(ON) a nd the Duty Cycle (DC) a s f ollows :
RSW = RDS(ON)TOP x DC + RDS(ON)BOT x (1 DC)
The RDS(ON) for both the top and bottom MOSFET s can be
obtained from the Typical Performance Characteristics
curves. Thus, to obtain I2R losses, simply add RSW to RL
and multiply the result by the square of the average output
current.
Other losses including CIN and COUT ESR dissipative
losses and inductor core losses generally account for less
than 2% of the total loss.
Thermal Considerations
The maximum power dissipation depends on the thermal
resistance of IC package, PCB layout, the rate of
surroundings airflow and temperature difference between
junction to a mbient. The maximum power dissipation can
be calculated by following formula :
PD(MAX) = (TJ(MAX) TA) / θJA
Where TJ(MAX) is the maximum operation junction
temperature, TA is the ambient temperature and the θJA is
the junction to ambient thermal resistance.
For recommended operating conditions specification,
where TJ(MAX) is the maximum junction temperature of the
die and TA is the maximum ambient temperature. The
junction to ambient thermal resistance θJA is layout
dependent. For WDFN-6L 2x2 packages, the thermal
resistance θJA is 120°C/W on the standard JEDEC 51-7
four layers thermal test board.
The maximum power dissipation at TA = 25°C can be
calculated by following formula :
PD(MAX) = (125°C 25°C) / 120°C/W = 0.833W for
W D F N-6L 2x2 pack ages
The maximum power dissipation depends on operating
ambient temperature for fixed TJ(MAX) and thermal
resistance θJA.
The Figure 5 of derating curves allows the designer to
see the effect of rising ambient temperature on the
maximum power allowed.
Figure 5. Derating Curve of Maximum Power Dissipation
0.0
0.2
0.4
0.6
0.8
1.0
1.2
1.4
1.6
0 25 50 75 100 125
Ambient Tem peratu re ( °C )
Maximum Power Di ssipati on (W) 1
Four Layers PCB
WDFN-6L 2x2
WQFN-16L 3x3
RT8010/A
13
DS8010/A-09 September 2012 www.richtek.com
©
Copyright 2012 Richtek Technology Corporation. All rights reserved. is a registered trademark of Richtek Technology Corporation.
`Connect feedback network behind the output capacitors.
Keep the loop area small. Place the feedback
components near the RT8010/A.
`An exa mple of 2-layer PCB layout is shown in Figure 7
to Figure 8 for reference.
Figure 6. EVB Schematic
Table 1. Recommended Inductors
Table 2. Recommended Capacitors for CIN and COUT
Supplier Inductance
(μH) Current Rating (mA) DCR
(mΩ) Dimensions
(mm) Series
TAIYO YUDEN 2.2 1480 60 3.00 x 3.00 x 1.50 NR 3015
GOTREND 2.2 1500 58 3.85 x 3.85 x 1.80 GTSD32
Sumida 2.2 1500 75 4.50 x 3.20 x 1.55 CDRH2D14
Sumida 4.7 1000 135 4.50 x 3.20 x 1.55 CDRH2D14
TAIYO YUDEN 4.7 1020 120 3.00 x 3.00 x 1.50 NR 3015
GOTREND 4.7 1100 146 3.85 x 3.85 x 1.80 GTSD32
Supplier Capacitance
(μF) Package Part Number
TDK 4.7 0603 C1608JB0J475M
MURATA 4.7 0603 GRM188R60J475KE19
TAIYO YUDEN 4.7 0603 JMK107BJ475RA
TAIYO YUDEN 10 0603 JMK107BJ106MA
TDK 10 0805 C2012JB0J106M
MURATA 10 0805 GRM219R60J106ME19
MURATA 10 0805 GRM219R60J106KE19
TAIYO YUDEN 10 0805 JMK212BJ106RD
Figure 8. Bottom Layer
Figure 7. Top Layer
LX
GND
RT8010/A
EN
FB/VOUT
L1
C3
VIN VOUT
C1
R1
R2
VIN
VIN
3
25
4
6
C2
IC
1
R3
RT8010/A
14 DS8010/A-09 September 2012www.richtek.com
©
Copyright 2012 Richtek Technology Corporation. All rights reserved. is a registered trademark of Richtek Technology Corporation.
Outline Dimension
Dim ensions In Millimeters Dimensio ns In Inches
Symbol Min Max Min Max
A 0.700 0.800 0.028 0.031
A1 0.000 0.050 0.000 0.002
A3 0.175 0.250
0.007 0.010
b 0.200 0.350 0.008 0.014
D 1.950 2.050 0.077 0.081
D2 1.000 1.450 0.039 0.057
E 1.950 2.050 0.077 0.081
E2 0.500 0.850 0.020 0.033
e 0.650 0.026
L 0.300 0.400
0.012 0.016
W-Type 6L DFN 2x2 Package
D
1
E
A3
A
A1
eb
L
D2
E2
SEE DETAIL A
11
2
2
Note : The configuration of the Pin #1 identifier is optional,
but must be located within the zone indicated.
DETAIL A
Pin #1 ID a nd T ie Bar M ark Options
RT8010/A
15
DS8010/A-09 September 2012 www.richtek.com
Richtek Technology Corporation
5F, No. 20, Taiyuen Street, Chupei City
Hsinchu, Taiwan, R.O.C.
Tel: (8863)5526789
Richtek products are sold by description only. Richtek reserves the right to change the circuitry and/or specifications without notice at any time. Customers should
obtain the latest relevant information and data sheets before placing orders and should verify that such information is current and complete. Richtek cannot
assume responsibility for use of any circuitry other than circuitry entirely embodied in a Richtek product. Information furnished by Richtek is believed to be
accurate and reliable. However, no responsibility is assumed by Richtek or its subsidiaries for its use; nor for any infringements of patents or other rights of third
parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of Richtek or its subsidiaries.
A
A1 A3
D
E
1
D2
E2
L
b
e
SEE DETAIL A
Dim ensions In Millimeters Dimensio ns In Inches
Symbol Min Max Min Max
A 0.700 0.800 0.028 0.031
A1 0.000 0.050 0.000 0.002
A3 0.175 0.250 0.007 0.010
b 0.180 0.300 0.007 0.012
D 2.950 3.050 0.116 0.120
D2 1.300 1.750 0.051 0.069
E 2.950 3.050 0.116 0.120
E2 1.300 1.750 0.051 0.069
e 0.500 0.020
L 0.350 0.450
0.014 0.018
W-Type 16L QFN 3x3 Package
Note : The configuration of the Pin #1 identifier is optional,
but must be located within the zone indicated.
DETAIL A
Pin #1 ID a nd T ie Bar M ark Options
1
1
22