Features
•Over temperature protection (with auto-restart)
•Short-circuit protection (current limit)
•Active clamp
•E.S.D protection
•Status feedback
•Open load detection
•Logic ground isolated from power ground
IPS521G
Data Sheet No.PD 60157-H
Description
The IPS521G is a fully protected five terminal high side
switch with built in short circuit, over-temperature, ESD
protection, inductive load capability and diagnostic
feedback. The output current is controlled when it
reaches Ilim value. The current limitation is activated
until the thermal protection acts. The over-tempera-
ture protection turns off the high side switch if the
junction temperature exceeds Tshutdown. It will au-
tomatically restart after the junction has cooled 7oC
below Tshutdown. A diagnostic pin is provided for
status feedback of short-circuit, over-temperature
and open load detection. The double level shifter
circuitry allows large offsets between the logic ground
and the load ground.
Package
Product Summary
Rds(on) 100mΩ (max)
V clamp 50V
I Limit 10A
V open load 3V
Typical Connection
FULLY PROTECTED HIGH SIDE POWER MOSFET SWITCH
8 Lead SOIC
Load
Logic
signal
control
Logic
Log i c G n d Load Gnd
Vcc
Out
Gnd
In
Dg
+ 5 v
Status
feedback
+ VCC
Output pull-up resistor
Rdg
Rin
15K
Truth Table
Op. Conditions
Normal
Normal
Open load
Open load
Over current
Over current
Over-temperature
Over-temperature
In
H
L
H
L
H
L
H
L
Out
H
L
H
H
L
L (cycling)
L
L (limiting)
Dg
H
L
H
H
L
L
L
L
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IPS521G
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(1) Limited by junction temperature (pulsed current limited also by internal wiring)
Symbol Parameter Min. Typ. Max. Units Test Conditions
Rth1 Thermal resistance with standard footprint — a
Rth2 Thermal resistance with 1" square footprint —& a
Thermal Characteristics
8 Lead SOIC
oC/W
Absolute Maximum Ratings
Absolute maximum ratings indicate sustained limits beyond which damage to the device may occur. All voltage parameters
are referenced to GROUND lead. (Tj = 25oC unless otherwise specified).
Symbol Parameter Min. Max. Units Test Conditions
Vout Maximum output voltage Vcc-50 Vcc+0.3
Voffset Maximum logic g round to load ground offset V cc-50 Vcc+0.3
Vin Maximum Input voltage -0.3 5.5
Iin, max Maximum positive IN current -5 10 mA
Vdg Maximum diagnostic output voltage -0.3 5.5 V
Idg, max Maximum diagnostic output current -1 10 mA
Isd cont. Diode max. permanent current (1)
(r th = 125oC/W) — 1.4
Isd pulsed Diode max. pulsed current (1) —10
ESD1 Electrostatic discharge voltage (Human Body) — 4 C=100pF, R=1500Ω,
ESD2 Electrostatic discharge voltage (Machine Model) — 0.5 C=200pF, R=0Ω, L=10µH
Pd Maximum power dissipation(1)
(rth=125oC/W) — 1 W
Tj max. Max. storage & operating junction temp. -40
+150
Vcc max. Maximum Vcc voltage
—
50 V
V
A
kV
oC
Recommended Operating Conditions
These values are given for a quick design. For operation outside these conditions, please consult the application notes.
Symbol Parameter Min. Max. Units
Vcc Continuous Vcc voltage 5.5 35
VIH High level input voltage 4 5.5
VIL Low level input voltage -0.3 0.9
Iout Continuous output current
Tc=85oC (TAmbient = 85oC, Tj = 125oC, Rth = 100oC/W) — 1. 6 A
Rin Recommended resistor in series with IN pin 4 6
Rdg Recommended resistor in series with DG pin 10 20
V
kΩ
IPS521G
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Symbol Parameter Min. Typ. Max. Units Test Conditions
Rds(on) ON state resistance Tj = 25oC — 80 100
@Tj=25oC
Rds(on) ON state resistance @ Vcc = 6V — 80 100
(Vcc=6V)
Rds(on) ON state resistance Tj = 150oC—
125 160 Vin = 5V, Iout = 5A
@Tj=150oC
Vcc oper. Operating voltage range 5.5 —35
V clamp 1 Vcc to OUT clamp voltage 1 50 55 —Id = 10mA (see Fig.1 & 2)
V clamp 2 Vcc to OUT clamp voltage 2 — 56 65
VfBody diode forward voltage — 0.9 1.2 Id = 2.5A, Vin = 0V
Icc off Supply current when OFF — 13 50 µAV
in = 0V, Vout = 0V
Icc on Supply current when ON — 0.6 2 mA Vin = 5V
Icc ac Ripple current when ON (AC RMS) —20—
µAV
in = 5V
Vdgl Low level diagnostic output voltage — 0.4 — V Idg = 1.6 mA
Ioh Output leakage current — 50 120 Vout = 6V
Iol Output leakage current 0 — 25 Vout = 0V
Idg
leakage Diagnostic output leakage current — — 10 Vdg = 5.5V
Vih IN high threshold voltage — 2.2 3
Vil IN low threshold voltage 1 1.9 —
Iin, on On state IN positive current —70 200 µAVin = 5V
In hyst. Input hysteresis 0.1 0.25 0. 5 V
Static Electrical Characteristics
(Tj = 25oC, Vcc = 14V unless otherwise specified.)
mΩ
Vin = 5V, Iout = 5A
Id = Isd (see Fig.1 & 2)
V
Vin = 5V, Iout = 2.5A
µA
V
Switching Electrical Characteristics
Vcc = 14V, Resistive Load = 2.8Ω, Tj = 25oC, (unless otherwise specified).
Symbol Parameter Min. Typ. Max. Units Test Conditions
Tdon Turn-on delay time a10 40
Tr1 Rise time to Vout = Vcc - 5V a25 60
Tr2 Rise time Vcc - 5V to Vout = 90% of Vcc —130 200
dV/dt (on) Turn ON d V/dt a0.7 2 V/µs
Eon Turn ON energy — 1500 — µJ
Tdoff Turn-off delay time — 35 70
TfFall time to Vout = 10% of Vcc —16 50
dV/dt (off) Turn OFF d V/dt a0.9 3 V/µs
Eoff Turn OFF energy —250 —µJ
Tdiag Vout to Vdiag propagation delay — 5 15 µs See figure 6
See figure 3
µs
µsSee figure 4
IPS521G
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Lead Assignments
8 Lead SOIC
1
GND IN DG OUT
Vcc Vcc Vcc Vcc
Symbol P arameter Min. Typ. Max. Units Test Conditions
Ilim Internal current limit 71014AV
out = 0V
Tsd+ Over-temp. positive going threshold — 165 — oC See fig. 2
Tsd- Over-temp. negative going threshold — 158 —oCSee fig. 2
Vsc Short-circuit detection voltage (3) 2 3 4 V See fig. 2
Vopen load Open load detection threshold 2 3 4 V
Protection Characteristics
(3) Referenced to Vcc
Functional Block Diagram
2.2 V
2.7 V
+
-
Level
shift driver
Charge
pump
10 A
VCC
IN
50V
Over
Current
limit
VOUTGND
DG
7 V
7 V
62 V
40Ω
200 KΩ
+
-
Open l oad 3 V
-
+
3 V
T
j
158°C
temperature 165°C
Short-circuit
All values are typical
IPS521G
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Figure 1 - Active clamp waveforms Figure 2 - Protection timing diagram
Tsd+
(160 °)
Vin
Iout
Ilim.
T
5 V
0 V
Tsd-
T shutdown
limiting cycling
Ids
Out
Vin
T clamp
V clamp
( + Vcc )
( see Appl . Notes to evaluat e power dissipation )
0 V
Iout
Figure 4 - Switching times definition (turn-off)
Vin
Vout
90%
10%
Td off
Tf
d V /dt of f
Figure 3 - Switching times definition (turn-on)
Turn on energy with a resistive or an
inductive load
Vin
Vout
Vcc - 5V
90%
Vcc
10%
Td on Tr 1 Tr 2
dV/dt on
Iout1 Iout2
Eon2
Resistive load
Inductive lo ad
Eon1
E1(t)
E2 (t)
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Figure 6 - Diagnostic delay definitions
Figure 5 - Active clamp test circuit
Rem : V load is negative dur ing demagne t ization
14 V
IN
5 v
0 v
+
-
Vout
Iout
Vin L
R
Gnd
Dg Vcc
Out
Vdiag
Vout
Vcc -Vsc
Vcc
Vol
Vin
T diag
Diag on blanking Diag off blanking
Figure 7 - Rds(on) (mΩ) Vs Vcc (V)
0
50
100
0 5 10 15 20 25 30 35
Figure 8 - Normalized Rds(on) (mΩ) Vs Tj (oC)
50%
100%
150%
200%
-50 0 50 100 150
IPS521G
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Figure 9 - Rds(on) (mΩ) Vs Iout (A)
0
50
100
0246810
Figure 10 - Max. Iout (A) Vs Load Inductance (uH)
0.1
1
10
Figure 11 - Max load current (A) Vs Tamb (oC)
0
1
2
3
4
5
25 50 75 100 125 150
1inch² footprint
Rt hja= 60°C/W
Std. footprint
Rt hja= 100°C/W
Figure 12 - Transient Thermal Impedance (oC/W)
Vs Time (s)
0,01
0,1
1
10
10 0 rth SO8 std
footprint
IPS521G
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0
5
10
15
-50 0 50 100 150
Figure 13 - Ilim (A) Vs Tj (oC) Figure 14 - Eon, Eoff (µJ) Vs Iout (A)
Re si stive loa d
0
500
1000
1500
2000
2500
3000
3500
01234567
Eon
Eoff
Figure 16 - Diag Blanking time (µS) Vs Iout (A)
(resistive load - see Fig. 6)
0
25
50
75
100
125
150
0123
Dia
g
on blankin
g
Dia
g
off blankin
g
Figure 15 - Eon (µJ) Vs Load Inductance (µH)
(see Fig. 3)
0.1
1
10
100
1000
10000
1E+01
1E+02
1E+03
1E+04
1E+05
1E+06
I=Imax vs Induct.(see fi
g
.10)
I=1.5A
IPS521G
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4/11/2000
1.00E-06
1.00E-05
1.00E-04
1.00E-03
0 5 10 15 20 25 30 35
Figure 17 - Icc (mA) Vs Vcc (V)
Case Outline - 8 Lead SOIC
(MS-012AA) 01-0021 09
