LM99 www.ti.com SNIS129D - JANUARY 2003 - REVISED MARCH 2013 LM99 1C Accurate, High Temperature, Remote Diode Temperature Sensor with TwoWire Interface Check for Samples: LM99 FEATURES DESCRIPTION * The LM99 is an 11-bit remote diode temperature sensor with a 2-wire System Management Bus (SMBus) serial interface. The LM99 accurately measures: (1) its own temperature and (2) the temperature of a remote diode-connected transistor such as the 2N3904 or a thermal diode commonly found on Graphics Processor Units (GPU), Computer Processor Units (CPU or other ASICs. The LM99 remote diode temperature sensor shifts the temperature from the remote sensor down 16C and operates on that shifted temperature: 1 2 * * * * * * * Accurately Senses the Temperature of Remote Diodes Offset Register Allows Use of a Variety of Thermal Diodes On-board Local Temperature Sensing 10 Bit Plus Sign Remote Diode Temperature Data Format, 0.125 C Resolution T_CRIT_A Output Useful for System Shutdown ALERT Output Supports SMBus 2.0 Protocol SMBus 2.0 Compatible Interface, Supports TIMEOUT 8-Pin VSSOP Package APPLICATIONS * * * * Graphics Processor Thermal Management Computer Processor Thermal Management Electronic Test Equipment Office Electronics KEY SPECIFICATIONS * * * * Supply Voltage 3.0 V to 3.6 V Supply Current 0.8 mA (typ) Local Temp Accuracy (Includes Quantization error) - TA = 25C to 125C 3.0C (Max) Remote Diode Temp Accuracy (Includes Quantization Error) - TA = 30C to 50C, TD = 120C to 140C 1.0C (Max) - TA = 0C to 85C, TD = 25C to 140C 3.0C (Max) TACTUAL DIODE JUNCTION = TLM99 + 16C The local temperature reading requires no offset. The LM99 has an Offset Register which provides a means for precise matching to various thermal diodes. The LM99 and LM99-1 have the same functions but different SMBus slave addresses. This allows for one of each to be on the same bus at the same time. Activation of the ALERT output occurs when any temperature goes outside a preprogrammed window set by the HIGH and LOW temperature limit registers or exceeds the T_CRIT temperature limit. Activation of the T_CRIT_A occurs when any temperature exceeds the T_CRIT programmed limit. 1 2 Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet. All trademarks are the property of their respective owners. PRODUCTION DATA information is current as of publication date. Products conform to specifications per the terms of the Texas Instruments standard warranty. Production processing does not necessarily include testing of all parameters. Copyright (c) 2003-2013, Texas Instruments Incorporated LM99 SNIS129D - JANUARY 2003 - REVISED MARCH 2013 www.ti.com Simplified Block Diagram 3.0V-3.6V Fault Queue 10-Bit Plus Sign '-6 Converter Temperature Sensor Circuitry D+ D- Programable Level Filter S Q ALERT R Fault Queue Local/Remote Diode Selector T_Crit_A Fault Queue Control Logic One Shot Register Remote Offset Registers Local/Remote Temperature Registers HIGH Limit Registers LOW Limit Registers T_CRIT Limit Configuration Conversion & Hysteresis Rate and Status Registers Registers Registers Two-Wire Serial Interface SMBData SMBClock Connection Diagram Figure 1. VSSOP-8 TOP VIEW PIN DESCRIPTIONS Label 2 Pin # Function Typical Connection VDD 1 Positive Supply Voltage Input DC Voltage from 3.0 V to 3.6 V. VDD should be bypassed with a 0.1 F capacitor in parallel with 100 pF to ground. The 100 pF capacitor should be placed as close as possible to the power supply pin. A bulk capacitance of approximately 10 F needs to be in the vicinity of the LM99 VDD. D+ 2 Diode Current Source To Diode Anode. Connected to the collector and base of the remote discrete diode-connected transistor. Connect a 2.2 nF capacitor between pins 2 and 3. D- 3 Diode Return Current Sink To Diode Cathode. Connects to the emitter of the remote diode-connected transistor. Connect a 2.2 nF capacitor between pins 2 and 3. T_CRIT_A 4 T_CRIT Alarm Output, OpenDrain, Active-Low Pull-Up Resistor, Controller Interrupt or Power Supply Shutdown Control GND 5 Power Supply Ground Ground ALERT 6 Interrupt Output, Open-Drain, Active-Low Pull-Up Resistor, Controller Interrupt or Alert Line SMBData 7 SMBus Bi-Directional Data Line, From and to Controller, Pull-Up Resistor Open-Drain Output SMBCLK 8 SMBus Input From Controller, Pull-Up Resistor Submit Documentation Feedback Copyright (c) 2003-2013, Texas Instruments Incorporated Product Folder Links: LM99 LM99 www.ti.com SNIS129D - JANUARY 2003 - REVISED MARCH 2013 Typical Application Graphics Card Power Supply VDD Shutdown Control +3.3 VDC 10 uF +3.3 VDC 0.1 uF 5.1 k Pull-ups 100 pF 1 VDD 4 Graphics Processor T_CRIT_A 6 2 ALERT D+ +3.3 VDC 2.2 nF LM99 3 SMBus Master and Control Circuitry D1.5 k Pull-ups SMBCLK SMBData 8 7 GND 5 Thermal Diode-Connected Transistor These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam during storage or handling to prevent electrostatic damage to the MOS gates. Submit Documentation Feedback Copyright (c) 2003-2013, Texas Instruments Incorporated Product Folder Links: LM99 3 LM99 SNIS129D - JANUARY 2003 - REVISED MARCH 2013 www.ti.com Absolute Maximum Ratings (1) Supply Voltage -0.3 V to 6.0 V Voltage at SMBData, SMBCLK, ALERT, T_CRIT_A -0.5 V to 6.0 V Voltage at Other Pins -0.3 V to (VDD + 0.3 V) D- Input Current 1 mA Input Current at All Other Pins (2) 5 mA Package Input Current (2) 30 mA SMBData, ALERT, T_CRIT_A Output Sink Current 10 mA -65C to +150C Storage Temperature Soldering Information, Lead Temperature VSSOP-8 Packages (3) ESD Susceptibility (4) Human Body Model Vapor Phase (60 seconds) 215C Infrared (15 seconds) 220C 2000 V Machine Model (1) (2) (3) (4) 200 V Absolute Maximum Ratings indicate limits beyond which damage to the device may occur. DC and AC electrical specifications do not apply when operating the device beyond its rated operating conditions. When the input voltage (VI) at any pin exceeds the power supplies (VI < GND or VI > VDD), the current at that pin should be limited to 5 mA. Parasitic components and or ESD protection circuitry are shown in the figure below for the LM99's pins. The nominal breakdown voltage of D3 is 6.5 V. Care should be taken not to forward bias the parasitic diode, D1, present on pins: D+, D-. Doing so by more than 50 mV may corrupt a temperature measurement. See http://www.ti.com/packaging for other recommendations and methods of soldering surface mount devices. Human body model, 100 pF discharged through a 1.5 k resistor. Machine model, 200 pF discharged directly into each pin. Operating Ratings Operating Temperature Range Electrical Characteristics Temperature Range 0C to +125C (1) TMIN TA TMAX LM99 0C TA +85C Supply Voltage Range (VDD) +3.0 V to +3.6 V (1) Thermal resistance junction-to-ambient when attached to a printed circuit board with 2 oz. foil: -- VSSOP-8 = 210C/W Temperature-to-Digital Converter Characteristics Unless otherwise noted, these specifications apply for VDD = +3.0 Vdc to +3.6 Vdc. Boldface limits apply for TA = TJ = TMIN TA TMAX; all other limits TA = TJ = +25C, unless otherwise noted. Parameter Conditions Typical (1) Limits (2) Units (Limit) 1 Temperature Error Using Local Diode TA = +25C to +125C (3) 3 C (max) Temperature Error Using Remote Diode Connected Transistor (TD is the Remote Diode Junction Temperature) TD = TLM99 + 16C TA = +30C to +50C and TD = +120C to +140C 1 C (max) TA = +0C to +85C and TD = +25C to +140C 3 Remote Diode Measurement Resolution Local Diode Measurement Resolution 11 Bits 0.125 C 8 Bits 1 Conversion Time of All Temperatures at the Fastest Setting (1) (2) (3) (4) 4 See (4) C (max) 31.25 C 34.4 ms (max) Typicals are at TA = 25C and represent most likely parametric normal. Limits are ensured to AOQL (Average Outgoing Quality Level). Local temperature accuracy does not include the effects of self-heating. The rise in temperature due to self-heating is the product of the internal power dissipation of the LM99 and the thermal resistance. See Note 1 of the Operating Ratings table for the thermal resistance to be used in the self-heating calculation. This specification is provided only to indicate how often temperature data is updated. The LM99 can be read at any time without regard to conversion state (and will yield last conversion result). Submit Documentation Feedback Copyright (c) 2003-2013, Texas Instruments Incorporated Product Folder Links: LM99 LM99 www.ti.com SNIS129D - JANUARY 2003 - REVISED MARCH 2013 Temperature-to-Digital Converter Characteristics (continued) Unless otherwise noted, these specifications apply for VDD = +3.0 Vdc to +3.6 Vdc. Boldface limits apply for TA = TJ = TMIN TA TMAX; all other limits TA = TJ = +25C, unless otherwise noted. Typical (1) Limits (2) Units (Limit) SMBus Inactive, 16 Hz conversion rate 0.8 1.7 mA (max) Shutdown 315 A 0.7 V Parameter Quiescent Current (5) Conditions D- Source Voltage (VD+ - VD-) = + 0.65 V; high level Diode Source Current 160 Low level 315 13 A (max) 110 A (min) 20 A (max) 7 A (min) ALERT and T_CRIT_A Output Saturation Voltage IOUT = 6.0 mA 0.4 V (max) Power-On-Reset (POR) Threshold Measure on VDD input, falling edge 2.4 1.8 V (max) V (min) Local and Remote HIGH Default Temperature settings See (6) Add 16C for true Remote Temperature. +70 C Local and Remote LOW Default Temperature settings See (6) Add 16C for true Remote Temperature. 0 C Local T_CRIT Default Temperature Setting See (6) +85 C Remote T_CRIT Default Temperature Setting See (6) Add 16C for 126C true Remote T_CRIT Setting +110 C (5) (6) Quiescent current will not increase substantially with an SMBus. Default values set at power up. Logic Electrical Characteristics DIGITAL DC CHARACTERISTICS Unless otherwise noted, these specifications apply for VDD = +3.0 to 3.6 Vdc. Boldface limits apply for TA = TJ = TMIN to TMAX; all other limits TA = TJ = +25C, unless otherwise noted. Symbol Parameter Conditions Typical (1) Limits (2) Units (Limit) SMBData, SMBCLK INPUTS VIN(1) Logical "1" Input Voltage 2.1 V (min) VIN(0) Logical "0"Input Voltage 0.8 V (max) VIN(HYST) SMBData and SMBCLK Digital Input Hysteresis 400 mV IIN(1) Logical "1" Input Current VIN = VDD 0.005 10 A (max) IIN(0) Logical "0" Input Current VIN = 0 V -0.005 10 A (max) CIN Input Capacitance 5 pF ALL DIGITAL OUTPUTS IOH High Level Output Current VOH = VDD 10 A (max) VOL SMBus Low Level Output Voltage IOL = 4 mA IOL = 6 mA 0.4 0.6 V (max) (1) (2) Typicals are at TA = 25C and represent most likely parametric normal. Limits are ensured to AOQL (Average Outgoing Quality Level). Submit Documentation Feedback Copyright (c) 2003-2013, Texas Instruments Incorporated Product Folder Links: LM99 5 LM99 SNIS129D - JANUARY 2003 - REVISED MARCH 2013 www.ti.com SMBus Digital Switching Characteristics Unless otherwise noted, these specifications apply for VDD = +3.0 Vdc to +3.6 Vdc, CL (load capacitance) on output lines = 80 pF. Boldface limits apply for TA = TJ = TMIN to TMAX; all other limits TA = TJ = +25C, unless otherwise noted. The switching characteristics of the LM99 fully meet or exceed the published specifications of the SMBus version 2.0. The following parameters are the timing relationships between SMBCLK and SMBData signals related to the LM99. They adhere to but are not necessarily the SMBus bus specifications. Symbol Parameter Typical (1) Conditions Limits (2) Units (Limit) 100 10 kHz (max) kHz (min) 4.7 25 s (min) ms (max) fSMB SMBus Clock Frequency tLOW SMBus Clock Low Time from VIN(0)max to VIN(0)max tHIGH SMBus Clock High Time from VIN(1)min to VIN(1)min tR,SMB SMBus Rise Time See (3) 1 s (max) tF,SMB SMBus Fall Time See (4) 0.3 s (max) tOF Output Fall Time CL = 400 pF, IO = 3 mA (4) tTIMEOUT 4.0 s (min) 250 ns (max) SMBData and SMBCLK Time Low for Reset of Serial Interface (5) 25 35 ms (min) ms (max) tSU;DAT Data In Setup Time to SMBCLK High 250 ns (min) tHD;DAT Data Out Stable after SMBCLK Low 300 900 ns (min) ns (max) tHD;STA Start Condition SMBData Low to SMBCLK Low (Start condition hold before the first clock falling edge) 100 ns (min) tSU;STO Stop Condition SMBCLK High to SMBData Low (Stop Condition Setup) 100 ns (min) tSU;STA SMBus Repeated Start-Condition Setup Time, SMBCLK High to SMBData Low 0.6 s (min) tBUF SMBus Free Time Between Stop and Start Conditions 1.3 s (min) (1) (2) (3) (4) (5) Typicals are at TA = 25C and represent most likely parametric normal. Limits are ensured to AOQL (Average Outgoing Quality Level). The output rise time is measured from (VIN(0)max + 0.15 V) to (VIN(1)min - 0.15 V). The output fall time is measured from (VIN(1)min - 0.15 V) to (VIN(1)min + 0.15 V). Holding the SMBData and/or SMBCLK lines Low for a time interval greater than tTIMEOUT will reset the LM99's SMBus state machine, therefore setting SMBData and SMBCLK pins to a high impedance state. tLOW tR tF VIH SMBCLK VIL tBUF tHD;STA tHIGH tHD;DAT tSU;STA tSU;DAT tSU;STO VIH SMBDAT VIL S P P Figure 2. SMBus Communication 6 Submit Documentation Feedback Copyright (c) 2003-2013, Texas Instruments Incorporated Product Folder Links: LM99 LM99 www.ti.com Pin Name SNIS129D - JANUARY 2003 - REVISED MARCH 2013 PIN # D1 D2 D3 D4 D5 D6 D7 R1 x x x x x SNP VDD 1 D+ 2 x (1) x D- 3 x x T_CRIT_ A 4 x x x ALERT 6 x x x SMBData 7 x x x SMBCLK 8 (1) ESD CLAMP x x x x x Note: An "x" indicates that the diode exists. V+ D1 D3 D4 D6 I/O D2 SNP ESD Clamp R1 D5 D7 GND Figure 3. ESD Protection Input Structure Submit Documentation Feedback Copyright (c) 2003-2013, Texas Instruments Incorporated Product Folder Links: LM99 7 LM99 SNIS129D - JANUARY 2003 - REVISED MARCH 2013 www.ti.com FUNCTIONAL DESCRIPTION The LM99 temperature sensor incorporates a delta VBE based temperature sensor using a Local or Remote diode and a 10-bit plus sign ADC (Delta-Sigma Analog-to-Digital Converter). The LM99 is compatible with the serial SMBus version 2.0 two-wire interface. Digital comparators compare the measured Local Temperature (LT) to the Local High (LHS), Local Low (LLS) and Local T_CRIT (LCS) user-programmable temperature limit registers. The measured Remote Temperature (RT) is digitally compared to the Remote High (RHS), Remote Low (RLS) and Remote T_CRIT (RCS) user-programmable temperature limit registers. Activation of the ALERT output indicates that a comparison is greater than the limit preset in a T_CRIT or HIGH limit register or less than the limit preset in a LOW limit register. The T_CRIT_A output responds as a true comparator with built in hysteresis. The hysteresis is set by the value placed in the Hysteresis register (TH). Activation of T_CRIT_A occurs when the temperature is above the T_CRIT setpoint. T_CRIT_A remains activated until the temperature goes below the setpoint calculated by T_CRIT - TH. The hysteresis register impacts both the remote temperature and local temperature readings. The LM99 may be placed in a low power consumption (Shutdown) mode by setting the RUN/STOP bit found in the Configuration register. In the Shutdown mode, the LM99's SMBus interface remains while all circuitry not required is turned off. The Local temperature reading and setpoint data registers are 8-bits wide. The format of the 11-bit remote temperature data is a 16-bit left justified word. Two 8-bit registers, high and low bytes, are provided for each setpoint as well as the temperature reading. Two offset registers (RTOLB and RTOHB) can be used to compensate for non-ideality error, discussed further in DIODE NON-IDEALITY. The remote temperature reading reported is adjusted by subtracting from, or adding to, the actual temperature reading the value placed in the offset register. CONVERSION SEQUENCE The LM99 takes approximately 31.25 ms to convert the Local Temperature (LT), Remote Temperature (RT), and to update all of its registers. Only during the conversion process the busy bit (D7) in the Status register (02h) is high. These conversions are addressed in a round-robin sequence. The conversion rate may be modified by the Conversion Rate Register (04h). When the conversion rate is modified a delay is inserted between conversions; however, the actual conversion time remains at 31.25 ms. Different conversion rates will cause the LM99 to draw different amounts of supply current as shown in Figure 4. 2000 SUPPLY CURRENT (PA 1800 1600 140 0 1200 1000 800 600 400 0.01 0.1 1.0 10 100 CONVERSION RATE (Hz) Figure 4. Conversion Rate Effect on Power Supply Current THE ALERT OUTPUT The LM99's ALERT pin is an active-low open-drain output that is triggered by a temperature conversion that is outside the limits defined by the temperature setpoint registers. Reset of the ALERT output is dependent upon the selected method of use. The LM99's ALERT pin is versatile and will accommodate three different methods of use to best serve the system designer: as a temperature comparator, as a temperature-based interrupt flag, and as part of an SMBus ALERT system. The three methods of use are further described below. The ALERT and interrupt methods are different only in how the user interacts with the LM99. 8 Submit Documentation Feedback Copyright (c) 2003-2013, Texas Instruments Incorporated Product Folder Links: LM99 LM99 www.ti.com SNIS129D - JANUARY 2003 - REVISED MARCH 2013 Each temperature reading (LT and RT) is associated with a T_CRIT setpoint register (LCS, RCS), a HIGH setpoint register (LHS and RHS) and a LOW setpoint register (LLS and RLS). At the end of every temperature reading, a digital comparison determines whether that reading is above its HIGH or T_CRIT setpoint or below its LOW setpoint. If so, the corresponding bit in the STATUS REGISTER is set. If the ALERT mask bit is not high, any bit set in the STATUS REGISTER, with the exception of Busy (D7) and OPEN (D2), will cause the ALERT output to be pulled low. Any temperature conversion that is out of the limits defined by the temperature setpoint registers will trigger an ALERT. Additionally, the ALERT mask bit in the Configuration register must be cleared to trigger an ALERT in all modes. ALERT Output as a Temperature Comparator When the LM99 is implemented in a system in which it is not serviced by an interrupt routine, the ALERT output could be used as a temperature comparator. Under this method of use, once the condition that triggered the ALERT to go low is no longer present, the ALERT is de-asserted (Figure 5). For example, if the ALERT output was activated by the comparison of LT > LHS, when this condition is no longer true the ALERT will return HIGH. This mode allows operation without software intervention, once all registers are configured during set-up. In order for the ALERT to be used as a temperature comparator, bit D0 (the ALERT configure bit) in the FILTER and ALERT CONFIGURE REGISTER (xBF) must be set high. This is not the power on default default state. TEMPERATURE Remote High Limit RDTS Measurement LM99 ALERT Pin Status Register: RTDS High TIME Figure 5. ALERT Comparator Temperature Response Diagram ALERT Output as an Interrupt The LM99's ALERT output can be implemented as a simple interrupt signal when it is used to trigger an interrupt service routine. In such systems it is undesirable for the interrupt flag to repeatedly trigger during or before the interrupt service routine has been completed. Under this method of operation, during a read of the STATUS REGISTER the LM99 will set the ALERT mask bit (D7 of the Configuration register) if any bit in the STATUS REGISTER is set, with the exception of Busy (D7) and OPEN (D2). This prevents further ALERT triggering until the master has reset the ALERT mask bit, at the end of the interrupt service routine. The STATUS REGISTER bits are cleared only upon a read command from the master (see Figure 6) and will be re-asserted at the end of the next conversion if the triggering condition(s) persist(s). In order for the ALERT to be used as a dedicated interrupt signal, bit D0 (the ALERT configure bit) in the FILTER and ALERT CONFIGURE REGISTER (xBF) must be set low. This is the power-on default state. The following sequence describes the response of a system that uses the ALERT output pin as a interrupt flag: 1. Master Senses ALERT low 2. Master reads the LM99 STATUS REGISTER to determine what caused the ALERT 3. LM99 clears STATUS REGISTER, resets the ALERT HIGH and sets the ALERT mask bit (D7 in the Configuration register). 4. Master attends to conditions that caused the ALERT to be triggered. The fan is started, setpoint limits are adjusted, etc. 5. Master resets the ALERT mask (D7 in the Configuration register). Submit Documentation Feedback Copyright (c) 2003-2013, Texas Instruments Incorporated Product Folder Links: LM99 9 LM99 SNIS129D - JANUARY 2003 - REVISED MARCH 2013 www.ti.com TEMPERATURE RDTS Measurement Remote High Limit LM99 ALERT pin ALERT mask set in response to reading of status register by master End of Temperature conversion Status Register: RTDS High TIME Figure 6. ALERT Output as an Interrupt Temperature Response Diagram ALERT Output as an SMBus ALERT When the ALERT output is connected to one or more ALERT outputs of other SMBus compatible devices and to a master, an SMBus alert line is created. Under this implementation, the LM99's ALERT should be operated using the ARA (Alert Response Address) protocol. The SMBus 2.0 ARA protocol, defined in the SMBus specification 2.0, is a procedure designed to assist the master in resolving which part generated an interrupt and service that interrupt while impeding system operation as little as possible. The SMBus alert line is connected to the open-drain ports of all devices on the bus thereby AND'ing them together. The ARA is a method by which with one command the SMBus master may identify which part is pulling the SMBus alert line LOW and prevent it from pulling it LOW again for the same triggering condition. When an ARA command is received by all devices on the bus, the devices pulling the SMBus alert line LOW, first, send their address to the master and second, release the SMBus alert line after recognizing a successful transmission of their address. The SMBus 1.1 and 2.0 specification state that in response to an ARA (Alert Response Address) "after acknowledging the slave address the device must disengage its SMBALERT pulldown". Furthermore, "if the host still sees SMBALERT low when the message transfer is complete, it knows to read the ARA again". This SMBus "disengaging of SMBALERT" requirement prevents locking up the SMBus alert line. Competitive parts may address this "disengaging of SMBALERT" requirement differently than the LM99 or not at all. SMBus systems that implement the ARA protocol as suggested for the LM99 will be fully compatible with all competitive parts. The LM99 fulfills "disengaging of SMBALERT" by setting the ALERT mask bit (bit D7 in the Configuration register, at address 09h) after successfully sending out its address in response to an ARA and releasing the ALERT output pin. Once the ALERT mask bit is activated, the ALERT output pin will be disabled until enabled by software. In order to enable the ALERT the master must read the STATUS REGISTER, at address 02h, during the interrupt service routine and then reset the ALERT mask bit in the Configuration register to 0 at the end of the interrupt service routine. The following sequence describes the ARA response protocol. 1. Master Senses SMBus alert line low 2. Master sends a START followed by the Alert Response Address (ARA) with a Read Command. 3. Alerting Device(s) send ACK. 4. Alerting Device(s) send their Address. While transmitting their address, alerting devices sense whether their address has been transmitted correctly. (The LM99 will reset its ALERT output and set the ALERT mask bit once its complete address has been transmitted successfully.) 5. Master/slave NoACK 6. Master sends STOP 7. Master attends to conditions that caused the ALERT to be triggered. The STATUS REGISTER is read and fan started, setpoint limits adjusted, etc. 8. Master resets the ALERT mask (D7 in the Configuration register). The ARA, 000 1100, is a general call address. No device should ever be assigned this address. 10 Submit Documentation Feedback Copyright (c) 2003-2013, Texas Instruments Incorporated Product Folder Links: LM99 LM99 www.ti.com SNIS129D - JANUARY 2003 - REVISED MARCH 2013 Bit D0 (the ALERT configure bit) in the FILTER and ALERT CONFIGURE REGISTER (xBF) must be set low in order for the LM99 to respond to the ARA command. The ALERT output can be disabled by setting the ALERT mask bit, D7, of the Configuration register. The power on default is to have the ALERT mask bit and the ALERT configure bit low. TEMPERATURE Remote High Limit RDTS Measurement LM99 ALERT Pin ALERT mask set in response to ARA from master Status Register: RTDS High TIME Figure 7. ALERT Output as an SMBus ALERT Temperature Response Diagram T_CRIT_A OUTPUT and T_CRIT LIMIT T_CRIT_A is activated when any temperature reading is greater than the limit preset in the critical temperature setpoint register (T_CRIT), as shown in Figure 8. The Status Register can be read to determine which event caused the alarm. A bit in the Status Register is set high to indicate which temperature reading exceeded the T_CRIT setpoint temperature and caused the alarm, see STATUS REGISTER (SR). Local and remote temperature diodes are sampled in sequence by the A/D converter. The T_CRIT_A output and the Status Register flags are updated after every Local and Remote temperature conversion. T_CRIT_A follows the state of the comparison, it is reset when the temperature falls below the setpoint RCS-TH. The Status Register flags are reset only after the Status Register is read and if a temperature conversion(s) is/are below the T_CRIT setpoint, as shown in STATUS REGISTER (SR). Figure 8. T_CRIT_A Temperature Response Diagram POWER ON RESET DEFAULT STATES LM99 always powers up to these known default states. The LM99 remains in these states until after the first conversion. 1. Command Register set to 00h 2. Local Temperature set to 0C 3. Remote Diode Temperature set to 0C until the end of the first conversion. 4. Status Register set to 00h. 5. Configuration register set to 00h; ALERT enabled, Remote T_CRIT alarm enabled and Local T_CRIT alarm enabled 6. 85C Local T_CRIT temperature setpoint 7. 110C Remote T_CRIT temperature setpoint (126C Remote diode junction temperature) Submit Documentation Feedback Copyright (c) 2003-2013, Texas Instruments Incorporated Product Folder Links: LM99 11 LM99 SNIS129D - JANUARY 2003 - REVISED MARCH 2013 www.ti.com 8. 70C Local and Remote HIGH temperature setpoints 9. 0C Local and Remote LOW temperature setpoints 10. Filter and Alert Configure Register set to 00h; filter disabled, ALERT output set as an SMBus ALERT 11. Conversion Rate Register set to 8h; conversion rate set to 16 conv./sec. SMBus INTERFACE The LM99 operates as a slave on the SMBus, so the SMBCLK line is an input and the SMBData line is bidirectional. The LM99 never drives the SMBCLK line and it does not support clock stretching. According to SMBus specifications, the LM99 has a 7-bit slave address. All bits A6 through A0 are internally programmed and can not be changed by software or hardware. The LM99 and LM99-1 have the following slave addresses: Version A6 A5 A4 A3 A2 A1 A0 LM99 1 0 0 1 1 0 0 LM99-1 1 0 0 1 1 0 1 TEMPERATURE DATA FORMAT Temperature data can only be read from the Local and Remote Temperature registers; the setpoint registers (T_CRIT, LOW, HIGH) are read/write. Remote temperature data is represented by an 11-bit, two's complement word with an LSB (Least Significant Bit) equal to 0.125C. The data format is a left justified 16-bit word available in two 8-bit registers: Table 1. Actual vs. LM99 Remote Temperature Conversion Actual Remote Diode Temperature,C LM99 Remote Diode Temperature Register, C Binary Results in LM99 Remote Temperature Register Hex Remote Temperature Register 120 +104 0110 1000 0000 0000 6800h 125 +109 0110 1101 0000 0000 6D00h 126 +110 0110 1110 0000 0000 7100h 130 +114 0111 0010 0010 0000 7200h 135 +119 0111 0111 0000 0000 7700h 140 +124 0111 1100 0000 0000 7200h Table 2. Actual vs. Remote T_Crit Setpoint Actual Remote Diode T_Crit Setpoint,C Factory-Programmed Remote T_CRIT High Setpoint, C Binary Remote T_CRIT High Setpoint Value Hex Remote T_CRIT High Setpoint Value 126 +110 0110 1110 71h Local Temperature data is represented by an 8-bit, two's complement byte with an LSB (Least Significant Bit) equal to 1C: Local Temperature 12 Digital Output Binary Hex +125C 0111 1101 7Dh +25C 0001 1001 19h +1C 0000 0001 01h 0C 0000 0000 00h -1C 1111 1111 FFh -25C 1110 0111 E7h -55C 1100 1001 C9h Submit Documentation Feedback Copyright (c) 2003-2013, Texas Instruments Incorporated Product Folder Links: LM99 LM99 www.ti.com SNIS129D - JANUARY 2003 - REVISED MARCH 2013 OPEN-DRAIN OUTPUTS The SMBData, ALERT and T_CRIT_A outputs are open-drain outputs and do not have internal pull-ups. A "high" level will not be observed on these pins until pull-up current is provided by some external source, typically a pullup resistor. Choice of resistor value depends on many system factors but, in general, the pull-up resistor should be as large as possible. This will minimize any internal temperature reading errors due to internal heating of the LM99. The maximum resistance of the pull-up to provide a 2.1V high level, based on LM99 specification for High Level Output Current with the supply voltage at 3.0V, is 82 k (5%) or 88.7 k (1%). DIODE FAULT DETECTION The LM99 is equipped with operational circuitry designed to detect fault conditions concerning the remote diode. In the event that the D+ pin is detected as shorted to VDD or floating, the Remote Temperature High Byte (RTHB) register is loaded with +127C, the Remote Temperature Low Byte (RTLB) register is loaded with 0, and the OPEN bit (D2) in the status register is set. As a result, if the Remote T_CRIT setpoint register (RCS) is set to a value less than +127C the ALERT and T_Crit output pins will be pulled low, if the Alert Mask and T_Crit Mask are disabled. If the Remote HIGH Setpoint High Byte Register (RHSHB) is set to a value less than +127C then ALERT will be pulled low, if the Alert Mask is disabled. The OPEN bit itself will not trigger and ALERT. In the event that the D+ pin is shorted to ground or D-, the Remote Temperature High Byte (RTHB) register is loaded with -128C (1000 0000) and the OPEN bit (D2) in the status register will not be set. Since operating the LM99 at -128C is beyond it's operational limits, this temperature reading represents this shorted fault condition. If the value in the Remote Low Setpoint High Byte Register (RLSHB) is more than -128C and the Alert Mask is disabled, ALERT will be pulled low. Remote diode temperature sensors that have been previously released and are competitive with the LM99 output a code of 0C if the external diode is short-circuited. This change is an improvement that allows a reading of 0C to be truly interpreted as a genuine 0C reading and not a fault condition. COMMUNICATING WITH THE LM99 The data registers in the LM99 are selected by the Command Register. At power-up the Command Register is set to "00", the location for the Read Local Temperature Register. The Command Register latches the last location it was set to. Each data register in the LM99 falls into one of four types of user accessibility: 1. Read only 2. Write only 3. Read/Write same address 4. Read/Write different address A Write to the LM99 will always include the address byte and the command byte. A write to any register requires one data byte. Reading the LM99 can take place either of two ways: 1. If the location latched in the Command Register is correct (most of the time it is expected that the Command Register will point to one of the Read Temperature Registers because that will be the data most frequently read from the LM99), then the read can simply consist of an address byte, followed by retrieving the data byte. 2. If the Command Register needs to be set, then an address byte, command byte, repeat start, and another address byte will accomplish a read. The data byte has the most significant bit first. At the end of a read, the LM99 can accept either Acknowledge or No Acknowledge from the Master (No Acknowledge is typically used as a signal for the slave that the Master has read its last byte). It takes the LM99 31.25 ms to measure the temperature of the remote diode and internal diode. When retrieving all 10 bits from a previous remote diode temperature measurement, the master must insure that all 10 bits are from the same temperature conversion. This may be achieved by using one-shot mode or by setting the conversion rate and monitoring the busy bit such that no conversion occurs in between reading the MSB and LSB of the last temperature conversion. Submit Documentation Feedback Copyright (c) 2003-2013, Texas Instruments Incorporated Product Folder Links: LM99 13 LM99 SNIS129D - JANUARY 2003 - REVISED MARCH 2013 www.ti.com SMBus Timing Diagrams LM99 Timing Diagram Figure 9. Serial Bus Write to the internal Command Register followed by a the Data Byte Figure 10. Serial Bus Write to the Internal Command Register Figure 11. Serial Bus Read from a Register with the Internal Command Register preset to desired value. SERIAL INTERFACE RESET In the event that the SMBus Master is RESET while the LM99 is transmitting on the SMBData line, the LM99 must be returned to a known state in the communication protocol. This may be done in one of two ways: 1. When SMBData is LOW, the LM99 SMBus state machine resets to the SMBus idle state if either SMBData or SMBCLK are held low for more than 35 ms (tTIMEOUT). Note that according to SMBus specification 2.0 all devices are to timeout when either the SMBCLK or SMBData lines are held low for 25-35 ms. Therefore, to insure a timeout of all devices on the bus the SMBCLK or SMBData lines must be held low for at least 35 ms. 2. When SMBData is HIGH, have the master initiate an SMBus start. The LM99 will respond properly to an SMBus start condition at any point during the communication. After the start the LM99 will expect an SMBus Address address byte. 14 Submit Documentation Feedback Copyright (c) 2003-2013, Texas Instruments Incorporated Product Folder Links: LM99 LM99 www.ti.com SNIS129D - JANUARY 2003 - REVISED MARCH 2013 DIGITAL FILTER D2 D1 Filter 0 0 No Filter 0 1 Level 1 1 0 Level 1 1 1 Level 2 In order to suppress erroneous remote temperature readings due to noise, the LM99 incorporates a userconfigured digital filter. The filter is accessed in the FILTER and ALERT CONFIGURE REGISTER at BFh. The filter can be set according to the table shown. Level 2 sets maximum filtering. Filter Output Response to a Step Input depict the filter output to in response to a step input and an impulse input. Figure 14 depicts the digital filter in use in a Pentium 4 processor system. Note that the two curves, with filter and without, have been purposely offset so that both responses can be clearly seen. Inserting the filter does not induce an offset as shown. Filter Output Response to a Step Input Figure 12. Step Response Figure 13. Impulse Response 45 LM99 with Filter Off 43 TEMPERATURE (oC) 41 39 37 35 LM99 with Filter On 33 31 29 27 25 0 50 100 150 200 SAMPLE NUMBER The filter on and off curves were purposely offset to better show noise performance. Figure 14. Digital Filter Response in a Pentium 4 processor System Submit Documentation Feedback Copyright (c) 2003-2013, Texas Instruments Incorporated Product Folder Links: LM99 15 LM99 SNIS129D - JANUARY 2003 - REVISED MARCH 2013 www.ti.com FAULT QUEUE In order to suppress erroneous ALERT or T_CRIT triggering the LM99 incorporates a Fault Queue. The Fault Queue acts to insure a remote temperature measurement is genuinely beyond a HIGH, LOW or T_CRIT setpoint by not triggering until three consecutive out of limit measurements have been made, see Figure 15. The fault queue defaults off upon power-on and may be activated by setting bit D0 in the Configuration register (09h) to "1". ONE-SHOT REGISTER TEMPERATURE The One-Shot register is used to initiate a single conversion and comparison cycle when the device is in standby mode, after which the device returns to standby. This is not a data register and it is the write operation that causes the one-shot conversion. The data written to this address is irrelevant and is not stored. A zero will always be read from this register. RDTS Measurement Status Register: RTDS High n n+1 n+2 n+3 n+4 n+5 SAMPLE NUMBER Figure 15. Fault Queue Temperature Response Diagram LM99 Registers COMMAND REGISTER Selects which registers will be read from or written to. Data for this register should be transmitted during the Command Byte of the SMBus write communication. P7 P6 P5 P4 P3 P2 P1 P0 Command Select P0-P7: Command Select Command Select Address 16 Power On Default State Register Name Register Function Read Address <P7:P0> hex Write Address <P7:P0> hex <D7:D0> binary <D7:D0> decimal 00h NA 0000 0000 0 LT 01h NA 0000 0000 0 RTHB 02h NA 0000 0000 0 SR 03h 09h 0000 0000 0 C 04h 0Ah 0000 1000 8 (16 conv./sec) CR Conversion Rate 05h 0Bh 0100 0110 70 LHS Local HIGH Setpoint 06h 0Ch 0000 0000 0 LLS Local LOW Setpoint 07h 0Dh 0100 0110 70 RHSHB Remote HIGH Setpoint High Byte 08h 0Eh 0000 0000 0 RLSHB Remote LOW Setpoint High Byte NA 0Fh One Shot Submit Documentation Feedback Local Temperature Remote Temperature High Byte Status Register Configuration Writing to this register will initiate a one shot conversion Copyright (c) 2003-2013, Texas Instruments Incorporated Product Folder Links: LM99 LM99 www.ti.com SNIS129D - JANUARY 2003 - REVISED MARCH 2013 Command Select Address Read Address <P7:P0> hex Power On Default State Register Name Register Function Write Address <P7:P0> hex <D7:D0> binary <D7:D0> decimal 10h NA 0000 0000 0 RTLB 11h 11h 0000 0000 0 RTOHB Remote Temperature Offset High Byte 12h 12h 0000 0000 0 RTOLB Remote Temperature Offset Low Byte 13h 13h 0000 0000 0 RHSLB Remote HIGH Setpoint Low Byte 14h 14h 0000 0000 0 RLSLB Remote LOW Setpoint Low Byte 19h 19h 0110 1110 110 RCS Remote T_CRIT Setpoint 20h 20h 0101 0101 85 LCS Local T_CRIT Setpoint 21h 21h 0000 1010 10 TH B0h-BEh B0h-BEh BFh BFh 0000 0000 0 RDTF Remote Diode Temperature Filter FEh NA 0000 0001 1 RMID Read Manufacturer's ID FFh NA LM99 0011 0001 LM99-1 0011 0100 49 52 RDR Read Stepping or Die Revision Code Remote Temperature Low Byte T_CRIT Hysteresis Manufacturers Test Registers LOCAL and REMOTE TEMPERATURE REGISTERS (LT, RTHB, RTLB) Table 3. (Read Only Address 00h, 01h): BIT D7 D6 D5 D4 D3 D2 D1 D0 Value SIGN 64 32 16 8 4 2 1 For LT and RTHB D7-D0: Temperature Data. LSB = 1C. Two's complement format. Table 4. (Read Only Address 10h): BIT D7 D6 D5 D4 D3 D2 D1 D0 Value 0.5 0.25 0.125 0 0 0 0 0 For RTLB D7-D5: Temperature Data. LSB = 0.125C. Two's complement format. The maximum value available from the Local Temperature register is 127; the minimum value available from the Local Temperature register is -128. The maximum value available from the Remote Temperature register is 127.875; the minimum value available from the Remote Temperature registers is -128.875. Note that the remote diode junction temperature is actually 16C higher than the Remote Temperature Register value. STATUS REGISTER (SR) Table 5. (Read Only Address 02h): D7 D6 D5 D4 D3 D2 D1 D0 Busy LHIGH LLOW RHIGH RLOW OPEN RCRIT LCRIT Power up default is with all bits "0" (zero). D0: LCRIT: When set to "1" indicates a Local Critical Temperature alarm. D1: RCRIT: When set to "1" indicates a Remote Diode Critical Temperature alarm. D2: OPEN: When set to "1" indicates a Remote Diode disconnect. D3: RLOW: When set to "1" indicates a Remote Diode LOW Temperature alarm D4: RHIGH: When set to "1" indicates a Remote Diode HIGH Temperature alarm. D5: LLOW: When set to "1" indicates a Local LOW Temperature alarm. Submit Documentation Feedback Copyright (c) 2003-2013, Texas Instruments Incorporated Product Folder Links: LM99 17 LM99 SNIS129D - JANUARY 2003 - REVISED MARCH 2013 www.ti.com D6: LHIGH: When set to "1" indicates a Local HIGH Temperature alarm. D7: Busy: When set to "1" ADC is busy converting. CONFIGURATION REGISTER Table 6. (Read Address 03h / Write Address 09h): D7 D6 D5 D4 D3 ALERT mask RUN/STOP 0 Remote T_CRIT_A mask 0 D2 Local T_CRIT_A mask D1 D0 0 Fault Queue Power up default is with all bits "0" (zero) D7: ALERT mask: When set to "1" ALERT interrupts are masked. D6: RUN/STOP: When set to "1" SHUTDOWN is enabled. D5: is not defined and defaults to "0". D4: Remote T_CRIT_A mask: When set to "1" a diode temperature reading that exceeds T_CRIT_A setpoint will not activate the T_CRIT_A pin. D3: is not defined and defaults to "0". D2: Local T_CRIT_A mask: When set to "1" a Local temperature reading that exceeds T_CRIT_A setpoint will not activate the T_CRIT_A pin. D1: is not defined and defaults to "0". D0: Fault Queue: when set to "1" three consecutive remote temperature measurements outside the HIGH, LOW, or T_CRIT setpoints will trigger an "Outside Limit" condition resulting in setting of status bits and associated output pins.. CONVERSION RATE REGISTER Table 7. (Read Address 04h / Write Address 0Ah) Value Conversion Rate 00 62.5 mHz 01 125 mHz 02 250 mHz 03 500 mHz 04 1 Hz 05 2 Hz 06 4 Hz 07 8 Hz 08 16 Hz 09 32 Hz 10-255 Undefined LOCAL and REMOTE HIGH SETPOINT REGISTERS (LHS, RHSHB, and RHSLB) Table 8. (Read Address 05h, 07h / Write Address 0Bh, 0Dh): BIT D7 D6 D5 D4 D3 D2 D1 D0 Value SIGN 64 32 16 8 4 2 1 For LHS and RHSHB: HIGH setpoint temperature data. Power-on default is LHIGH = RHIGH = 70C. 1 LSB = 1C. Two's complement format. 18 Submit Documentation Feedback Copyright (c) 2003-2013, Texas Instruments Incorporated Product Folder Links: LM99 LM99 www.ti.com SNIS129D - JANUARY 2003 - REVISED MARCH 2013 Table 9. (RHSLB) (Read / Write Address 13h): BIT D7 D6 D5 D4 D3 D2 D1 D0 Value 0.5 0.25 0.125 0 0 0 0 0 For RHSLB: Remote HIGH Setpoint Low Byte temperature data. Power-on default is 0C. 1 LSB = 0.125C. Two's complement format. LOCAL and REMOTE LOW SETPOINT REGISTERS (LLS, RLSHB, and RLSLB) Table 10. (Read Address 06h, 08h, / Write Address 0Ch, 0Eh): BIT D7 D6 D5 D4 D3 D2 D1 D0 Value SIGN 64 32 16 8 4 2 1 For LLS and RLSHB: HIGH setpoint temperature data. Power-on default is LHIGH = RHIGH = 0C. 1 LSB = 1C. Two's complement format. Table 11. (Read / Write Address 14h): BIT D7 D6 D5 D4 D3 D2 D1 D0 Value 0.5 0.25 0.125 0 0 0 0 0 For RLSLB: Remote HIGH Setpoint Low Byte temperature data. Power-on default is 0C. 1 LSB = 0.125C. Two's complement format. REMOTE TEMPERATURE OFFSET REGISTERS (RTOHB and RTOLB) Table 12. (Read / Write Address 11h): BIT D7 D6 D5 D4 D3 D2 D1 D0 Value SIGN 64 32 16 8 4 2 1 For RTOHB: Remote Temperature Offset High Byte. Power-on default is LHIGH = RHIGH = 0C. 1 LSB = 1C. Two's complement format. Table 13. (Read / Write Address 12h): BIT D7 D6 D5 D4 D3 D2 D1 D0 Value 0.5 0.25 0.125 0 0 0 0 0 For RTOLB: Remote Temperature Offset High Byte. Power-on default is 0C. 1 LSB = 0.125C. Two's complement format. The offset value written to these registers will automatically be added to or subtracted from the remote temperature measurement that will be reported in the Remote Temperature registers. LOCAL and REMOTE T_CRIT REGISTERS (RCS and LCS) Table 14. (Read / Write Address 20h, 19h): BIT D7 D6 D5 D4 D3 D2 D1 D0 Value SIGN 64 32 16 8 4 2 1 D7-D0: T_CRIT setpoint temperature data. Local power-on default is T_CRIT = 85C. Remote power-on default is T_CRIT = 110C (+126C actual remote diode temperature). 1 LSB = 1C, two's complement format. T_CRIT HYSTERESIS REGISTER (TH) Table 15. (Read and Write Address 21h): BIT D7 D6 Value D5 D4 D3 D2 D1 D0 16 8 4 2 1 Submit Documentation Feedback Copyright (c) 2003-2013, Texas Instruments Incorporated Product Folder Links: LM99 19 LM99 SNIS129D - JANUARY 2003 - REVISED MARCH 2013 www.ti.com D7-D0: T_CRIT Hysteresis temperature. Power-on default is TH = 10C. 1 LSB = 1C, maximum value = 31. FILTER and ALERT CONFIGURE REGISTER Table 16. (Read and Write Address BFh): BIT D7 D6 D5 D4 D3 Value 0 0 0 0 0 D2 D1 Filter Level D0 ALERT Configure D7-D3: is not defined defaults to "0". D2-D1: input filter setting as defined the table below: D2 D1 Filter Level 0 0 No Filter 0 1 Level 1 1 0 Level 1 1 1 Level 2 Level 2 sets maximum filtering. D0: when set to "1" comparator mode is enabled. MANUFACTURERS ID REGISTER (Read Address FEh) Default value 01h. DIE REVISION CODE REGISTER (Read Address FFh) The LM99 version has a default value 31h or 49 decimal. The LM99-1 version has a default value of 34h or 52 decimal. This register will increment by 1 every time there is a revision to the die by Texas Instruments. Application Hints The LM99 can be applied easily in the same way as other integrated-circuit temperature sensors, and its remote diode sensing capability allows it to be used in new ways as well. It can be soldered to a printed circuit board, and because the path of best thermal conductivity is between the die and the pins, its temperature will effectively be that of the printed circuit board lands and traces soldered to the LM99's pins. This presumes that the ambient air temperature is almost the same as the surface temperature of the printed circuit board; if the air temperature is much higher or lower than the surface temperature, the actual temperature of the of the LM99 die will be at an intermediate temperature between the surface and air temperatures. Again, the primary thermal conduction path is through the leads, so the circuit board temperature will contribute to the die temperature much more strongly than will the air temperature. To measure temperature external to the LM99's die, use a remote diode. This diode can be located on the die of a target IC, allowing measurement of the IC's temperature, independent of the LM99's temperature. The LM99 has been optimized to measure the NVIDIA GeForceFX family thermal diode. Remember that a discrete diode's temperature will be affected, and often dominated, by the temperature of its leads. 20 Submit Documentation Feedback Copyright (c) 2003-2013, Texas Instruments Incorporated Product Folder Links: LM99 LM99 www.ti.com SNIS129D - JANUARY 2003 - REVISED MARCH 2013 DIODE NON-IDEALITY Diode Non-Ideality Factor Effect on Accuracy When a transistor is connected as a diode, the following relationship holds for variables VBE, T and If: Vbe IF = IS e KVt - 1 where Vt = kqT * * * * * * * * q = 1.6x10-19 Coulombs (the electron charge), T = Absolute Temperature in Kelvin k = 1.38x10-23 joules/K (Boltzmann's constant), is the non-ideality factor of the process the diode is manufactured on, IS = Saturation Current and is process dependent, If = Forward Current through the base-emitter junction VBE = Base-Emitter Voltage drop (1) In the active region, the -1 term is negligible and may be eliminated, yielding the following equation Vbe KVt IF = IS e (2) In the above equation, and IS are dependant upon the process that was used in the fabrication of the particular diode. By forcing two currents with a very controlled ratio (N) and measuring the resulting voltage difference, it is possible to eliminate the IS term. Solving for the forward voltage difference yields the relationship: Vbe = K kqT ln (N) (3) The voltage seen by the LM99 also includes the IFRS voltage drop of the series resistance. The non-ideality factor, , is the only other parameter not accounted for and depends on the diode that is used for measurement. Since VBE is proportional to both and T, the variations in cannot be distinguished from variations in temperature. Since the non-ideality factor is not controlled by the temperature sensor, it will directly add to the inaccuracy of the sensor. As an example, assume a temperature sensor has an accuracy specification of 1C at room temperature of 25 C and the process used to manufacture the diode has a non-ideality variation of 0.1%. The resulting accuracy of the temperature sensor at room temperature will be: TACC = 1C + (0.1% of 298 K) = 1.4 C (4) The additional inaccuracy in the temperature measurement caused by , can be eliminated if each temperature sensor is calibrated with the remote diode that it will be paired with. Compensating for Diode Non-Ideality In order to compensate for the errors introduced by non-ideality, the temperature sensor is calibrated for a particular processor. Texas Instruments temperature sensors are always calibrated to the typical non-ideality of a given processor type. The LM99 is calibrated for the non-ideality of the NVIDIA GeForceFX family thermal diode. When a temperature sensor calibrated for a particular processor type is used with a different processor type or a given processor type has a non-ideality that strays from the typical, errors are introduced. Temperature errors associated with non-ideality may be reduced in a specific temperature range of concern through use of the offset registers (11h and 12h). See Table 17 below. Submit Documentation Feedback Copyright (c) 2003-2013, Texas Instruments Incorporated Product Folder Links: LM99 21 LM99 SNIS129D - JANUARY 2003 - REVISED MARCH 2013 www.ti.com Table 17. Offset Register Settings for Specific Devices Processor Family Offset Register Settings T, C Register 11h Register 12h NVIDIA GeForceFX Graphics Processor default default default Intel Pentium 4 Processor +2.625 0000 0010 1010 0000 Intel Pentium 3 Processor +2.375 0000 0010 0110 0000 PCB LAYOUT FOR MINIMIZING NOISE Figure 16. Ideal Diode Trace Layout In a noisy environment, such as a processor mother board, layout considerations are very critical. Noise induced on traces running between the remote temperature diode sensor and the LM99 can cause temperature conversion errors. Keep in mind that the signal level the LM99 is trying to measure is in microvolts. The following guidelines should be followed: 1. Place a 0.1 F power supply bypass capacitor as close as possible to the VDD pin and the recommended 2.2 nF capacitor as close as possible to the LM99's D+ and D- pins. Make sure the traces to the 2.2 nF capacitor are matched. 2. Ideally, the LM99 should be placed within 10 cm of the Processor diode pins with the traces being as straight, short and identical as possible. Trace resistance of 1 can cause as much as 1C of error. This error can be compensated by using the Remote Temperature Offset Registers, since the value placed in these registers will automatically be subtracted from or added to the remote temperature reading. 3. Diode traces should be surrounded by a GND guard ring to either side, above and below if possible. This GND guard should not be between the D+ and D- lines. In the event that noise does couple to the diode lines it would be ideal if it is coupled common mode. That is equally to the D+ and D- lines. 4. Avoid routing diode traces in close proximity to power supply switching or filtering inductors. 5. Avoid running diode traces close to or parallel to high speed digital and bus lines. Diode traces should be kept at least 2 cm apart from the high speed digital traces. 6. If it is necessary to cross high speed digital traces, the diode traces and the high speed digital traces should cross at a 90 degree angle. 7. The ideal place to connect the LM99's GND pin is as close as possible to the Processors GND associated with the sense diode. 8. Leakage current between D+ and GND should be kept to a minimum. One nano-ampere of leakage can cause as much as 1C of error in the diode temperature reading. Keeping the printed circuit board as clean as possible will minimize leakage current. Noise coupling into the digital lines greater than 400 mVp-p (typical hysteresis) and undershoot less than 500 mV below GND, may prevent successful SMBus communication with the LM99. SMBus no acknowledge is the most common symptom, causing unnecessary traffic on the bus. Although the SMBus maximum frequency of communication is rather low (100 kHz max), care still needs to be taken to ensure proper termination within a system with multiple parts on the bus and long printed circuit board traces. An RC lowpass filter with a 3 dB corner frequency of about 40 MHz is included on the LM99's SMBCLK input. Additional resistance can be added in series with the SMBData and SMBCLK lines to further help filter noise and ringing. Minimize noise coupling by keeping digital traces out of switching power supply areas as well as ensuring that digital lines containing high speed data communications cross at right angles to the SMBData and SMBCLK lines. 22 Submit Documentation Feedback Copyright (c) 2003-2013, Texas Instruments Incorporated Product Folder Links: LM99 LM99 www.ti.com SNIS129D - JANUARY 2003 - REVISED MARCH 2013 REVISION HISTORY Changes from Revision C (March 2013) to Revision D * Page Changed layout of National Data Sheet to TI format .......................................................................................................... 22 Submit Documentation Feedback Copyright (c) 2003-2013, Texas Instruments Incorporated Product Folder Links: LM99 23 PACKAGE OPTION ADDENDUM www.ti.com 14-Oct-2017 PACKAGING INFORMATION Orderable Device Status (1) Package Type Package Pins Package Drawing Qty Eco Plan Lead/Ball Finish MSL Peak Temp (2) (6) (3) Op Temp (C) Device Marking (4/5) LM99-1CIMM/NOPB ACTIVE VSSOP DGK 8 1000 Green (RoHS & no Sb/Br) CU SN Level-1-260C-UNLIM 0 to 85 T20C LM99CIMM/NOPB ACTIVE VSSOP DGK 8 1000 Green (RoHS & no Sb/Br) CU SN Level-1-260C-UNLIM 0 to 85 T17C LM99CIMMX/NOPB ACTIVE VSSOP DGK 8 3500 Green (RoHS & no Sb/Br) CU SN Level-1-260C-UNLIM 0 to 85 T17C (1) The marketing status values are defined as follows: ACTIVE: Product device recommended for new designs. LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect. NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design. PREVIEW: Device has been announced but is not in production. Samples may or may not be available. OBSOLETE: TI has discontinued the production of the device. (2) RoHS: TI defines "RoHS" to mean semiconductor products that are compliant with the current EU RoHS requirements for all 10 RoHS substances, including the requirement that RoHS substance do not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, "RoHS" products are suitable for use in specified lead-free processes. TI may reference these types of products as "Pb-Free". RoHS Exempt: TI defines "RoHS Exempt" to mean products that contain lead but are compliant with EU RoHS pursuant to a specific EU RoHS exemption. Green: TI defines "Green" to mean the content of Chlorine (Cl) and Bromine (Br) based flame retardants meet JS709B low halogen requirements of <=1000ppm threshold. Antimony trioxide based flame retardants must also meet the <=1000ppm threshold requirement. (3) MSL, Peak Temp. - The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature. (4) There may be additional marking, which relates to the logo, the lot trace code information, or the environmental category on the device. (5) Multiple Device Markings will be inside parentheses. Only one Device Marking contained in parentheses and separated by a "~" will appear on a device. If a line is indented then it is a continuation of the previous line and the two combined represent the entire Device Marking for that device. (6) Lead/Ball Finish - Orderable Devices may have multiple material finish options. Finish options are separated by a vertical ruled line. Lead/Ball Finish values may wrap to two lines if the finish value exceeds the maximum column width. Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals. TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release. Addendum-Page 1 Samples PACKAGE OPTION ADDENDUM www.ti.com 14-Oct-2017 In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis. Addendum-Page 2 PACKAGE MATERIALS INFORMATION www.ti.com 24-Aug-2017 TAPE AND REEL INFORMATION *All dimensions are nominal Device Package Package Pins Type Drawing SPQ Reel Reel A0 Diameter Width (mm) (mm) W1 (mm) B0 (mm) K0 (mm) P1 (mm) W Pin1 (mm) Quadrant LM99-1CIMM/NOPB VSSOP DGK 8 1000 178.0 12.4 5.3 3.4 1.4 8.0 12.0 Q1 LM99CIMM/NOPB VSSOP DGK 8 1000 178.0 12.4 5.3 3.4 1.4 8.0 12.0 Q1 LM99CIMMX/NOPB VSSOP DGK 8 3500 330.0 12.4 5.3 3.4 1.4 8.0 12.0 Q1 Pack Materials-Page 1 PACKAGE MATERIALS INFORMATION www.ti.com 24-Aug-2017 *All dimensions are nominal Device Package Type Package Drawing Pins SPQ Length (mm) Width (mm) Height (mm) LM99-1CIMM/NOPB VSSOP DGK 8 1000 210.0 185.0 35.0 LM99CIMM/NOPB VSSOP DGK 8 1000 210.0 185.0 35.0 LM99CIMMX/NOPB VSSOP DGK 8 3500 367.0 367.0 35.0 Pack Materials-Page 2 IMPORTANT NOTICE Texas Instruments Incorporated (TI) reserves the right to make corrections, enhancements, improvements and other changes to its semiconductor products and services per JESD46, latest issue, and to discontinue any product or service per JESD48, latest issue. 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