1Publication Order Number:
TLV431A/D
© Semiconductor Components Industries, LLC, 2000
January, 2019 − Rev. 24
TLV431, NCV431, SCV431
Low Voltage Precision
Adjustable Shunt Regulator
The TLV431A, B and C series are precision low voltage shunt
regulators that are programmable over a wide voltage range of 1.24 V to
16 V. The TLV431A series features a guaranteed reference accuracy of
±1.0% at 25°C and ±2.0% over the entire industrial temperature range of
−40°C to 85°C. The TLV431B series features higher reference accuracy
of ±0.5% and ±1.0% respectively. For the TLV431C series, the accuracy
is even higher. It is ±0.2% and ±1.0% respectively. These devices exhibit
a sharp low current turn−on characteristic with a low dynamic impedance
of 0.20 W over an operating current range of 100 mA to 20 mA. This
combination of features makes this series an excellent replacement for
zener diodes in numerous applications circuits that require a precise
reference voltage. When combined with an optocoupler, the
TLV431A/B/C can be used as an error amplifier for controlling the
feedback loop in isolated low output voltage (3.0 V to 3.3 V) switching
power supplies. These devices are available in economical TO−92−3 and
micro size TSOP−5 and SOT−23−3 packages.
Features
•Programmable Output Voltage Range of 1.24 V to 16 V
•Voltage Reference Tolerance ±1.0% for A Series, ±0.5% for B Series
and ±0.2% for C Series
•Sharp Low Current Turn−On Characteristic
•Low Dynamic Output Impedance of 0.20 W from 100 mA to 20 mA
•Wide Operating Current Range of 50 mA to 20 mA
•Micro Miniature TSOP−5, SOT−23−3 and TO−92−3 Packages
•NCV and SCV Prefix for Automotive and Other Applications
Requiring Unique Site and Control Change Requirements;
AEC−Q100 Qualified and PPAP Capable
•These are Pb−Free and Halide−Free Devices
Applications
•Low Output Voltage (3.0 V to 3.3 V) Switching Power Supply
Error Amplifier
•Adjustable Voltage or Current Linear and Switching Power Supplies
•Voltage Monitoring
•Current Source and Sink Circuits
•Analog and Digital Circuits Requiring Precision References
•Low Voltage Zener Diode Replacements
-
+
1.24 Vref
Reference (R) Cathode (K)
Anode (A)
Figure 1. Representative Block Diagram
TO−92
LP SUFFIX
CASE 29−11
TSOP−5
SN SUFFIX
CASE 483
123
5
4
SOT−23
SN1 SUFFIX
CASE 318
1
2
3
See detailed ordering and shipping information in the package
dimensions section on page 14 of this data sheet.
ORDERING INFORMATION
See general marking information in the device marking
section on page 13 of this data sheet.
DEVICE MARKING INFORMATION
AND PIN CONNECTIONS
123
12
BENT LEAD
TAPE & REEL
AMMO PACK
STRAIGHT LEAD
BULK PACK
3
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TO−92
LPRA, LPRE, LPRM,
LPRP SUFFIX
CASE 29−11
Pin 1. Reference
2. Anode
3. Cathode
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Reference (R)
Cathode (K)
Anode (A)
Anode (A)
Reference (R)
Cathode (K)
The device contains 13 active transistors.
Device Symbol
Figure 2. Representative Device Symbol and Schematic Diagram
MAXIMUM RATINGS (Full operating ambient temperature range applies, unless otherwise noted)
Rating Symbol Value Unit
Cathode to Anode Voltage VKA 18 V
Cathode Current Range, Continuous IK−20 to 25 mA
Reference Input Current Range, Continuous Iref *0.05 to 10 mA
Thermal Characteristics
LP Suffix Package, TO−92−3 Package
Thermal Resistance, Junction−to−Ambient
Thermal Resistance, Junction−to−Case
SN Suffix Package, TSOP−5 Package
Thermal Resistance, Junction−to−Ambient
SN1 Suffix Package, SOT−23−3 Package
Thermal Resistance, Junction−to−Ambient
RqJA
RqJC
RqJA
RqJA
178
83
226
491
°C/W
Operating Junction Temperature TJ150 °C
Operating Ambient Temperature Range TLV431
NCV431, SCV431
TA*40 to 85
*40 to 125
°C
Storage Temperature Range Tstg *65 to 150 °C
Stresses exceeding those listed in the Maximum Ratings table may damage the device. If any of these limits are exceeded, device functionality
should not be assumed, damage may occur and reliability may be affected.
NOTE: This device series contains ESD protection and exceeds the following tests:
Human Body Model 2000 V per JEDEC JESD22−A114F, Machine Model Method 200 V per JEDEC JESD22−A115C,
Charged Device Method 1000 V per JEDEC JESD22−C101E. This device contains latch−up protection and exceeds ±100 mA per
JEDEC standard JESD78.
PD+
TJ(max) *TA
RqJA
RECOMMENDED OPERATING CONDITIONS
Condition Symbol Min Max Unit
Cathode to Anode Voltage VKA Vref 16 V
Cathode Current IK0.1 20 mA
Functional operation above the stresses listed in the Recommended Operating Ranges is not implied. Extended exposure to stresses beyond
the Recommended Operating Ranges limits may affect device reliability.
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ELECTRICAL CHARACTERISTICS (TA = 25°C unless otherwise noted)
Characteristic Symbol
TLV431A TLV431B
Unit
Min Typ Max Min Typ Max
Reference Voltage (Figure 3)
(VKA = Vref, IK = 10 mA, TA = 25°C)
(TA = Tlow to Thigh, Note 1)
Vref 1.228
1.215
1.240
−
1.252
1.265
1.234
1.228
1.240
−
1.246
1.252
V
Reference Input Voltage Deviation Over Temperature (Figure 3)
(VKA = Vref, IK= 10 mA, TA = Tlow to Thigh, Notes 1, 2, 3)
DVref −7.2 20 −7.2 20
mV
Ration of Reference Input Voltage Change to Cathode Voltage
Change (Figure 4)
(VKA = Vref to 16 V, IK= 10 mA)
DVref
DVKA − −0.6 −1.5 − −0.6 −1.5
mV
V
Reference Terminal Current (Figure 4)
(IK = 10 mA, R1 = 10 kW, R2 = open)
Iref −0.15 0.3 −0.15 0.3
mA
Reference Input Current Deviation Over Temperature (Figure 4)
(IK = 10 mA, R1 = 10 kW, R2 = open, Notes 1, 2, 3)
DIref −0.04 0.08 −0.04 0.08
mA
Minimum Cathode Current for Regulation (Figure 3) IK(min)−30 80 −30 80 mA
Off−State Cathode Current (Figure 5)
(VKA = 6.0 V, Vref = 0)
(VKA = 16 V, Vref = 0)
IK(off) −
−
0.01
0.012
0.04
0.05
−
−
0.01
0.012
0.04
0.05
mA
Dynamic Impedance (Figure 3)
(VKA = Vref, IK =0.1 mA to 20 mA, f ≤ 1.0 kHz, Note 4)
|ZKA|
−0.25 0.4 −0.25 0.4
W
1. Ambient temperature range: Tlow = *40°C, Thigh = 85°C.
2. Guaranteed but not tested.
3. The deviation parameters DVref and DIref are defined as the difference between the maximum value and minimum value obtained over the
full operating ambient temperature range that applied.
Vref Max
Vref Min
T1T2
Ambient Temperature
DVref = Vref Max − Vref Min
DTA = T2 − T1
The average temperature coefficient of the reference input voltage, aVref is defined as:
αVref ǒppm
°CǓ+ǒ(DVref)
Vref (T
A+25°C) 106Ǔ
DT
A
aVref can be positive or negative depending on whether Vref Min or Vref Max occurs at the lower ambient temperature, refer to Figure 8.
Example: DVref = 7.2 mV and the slope is positive,
Example: Vref @ 25°C = 1.241 V
Example: DTA = 125°C
αVref ǒppm
°CǓ+
0.0072
1.241
125 +46 ppmń°C
106
4. The dynamic impedance ZKA is defined as:
⏐ZKA⏐+DVKA
DIK
When the device is operating with two external resistors, R1 and R2, (refer to Figure 4) the total dynamic impedance of the circuit is given by:
⏐ZKA′⏐ +⏐ZKA⏐ ǒ1)R1
R2Ǔ
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ELECTRICAL CHARACTERISTICS (TA = 25°C unless otherwise noted)
Characteristic Symbol
TLV431C
Unit
Min Typ Max
Reference Voltage (Figure 3)
(VKA = Vref, IK = 10 mA, TA = 25°C)
(TA = Tlow to Thigh, Note 5)
Vref 1.237
1.228
1.240
−
1.243
1.252
V
Reference Input Voltage Deviation Over Temperature (Figure 3)
(VKA = Vref, IK = 10 mA, TA = Tlow to Thigh, Notes 5, 6, 7)
DVref −7.2 2.0
mV
Ration of Reference Input Voltage Change to Cathode Voltage Change (Figure 4)
(VKA = Vref to 16 V, IK = 10 mA)
DVref
DVKA
− −0.6 −1.5 mV
V
Reference Terminal Current (Figure 4)
(IK = 10 mA, R1 = 10 kW, R2 = open)
Iref −0.15 0.3
mA
Reference Input Current Deviation Over Temperature (Figure 4)
(IK = 10 mA, R1 = 10 kW, R2 = open, Notes 5, 6, 7)
DIref −0.04 0.08
mA
Minimum Cathode Current for Regulation (Figure 3) IK(min)−30 80 mA
Off−State Cathode Current (Figure 5)
(VKA = 6.0 V, Vref = 0)
(VKA = 16 V, Vref = 0)
IK(off) −
−
0.01
0.012
0.04
0.05
mA
Dynamic Impedance (Figure 3)
(VKA = Vref, IK = 0.1 mA to 20 mA, f ≤ 1.0 kHz, Note 8)
|ZKA|
−0.25 0.4
W
5. Ambient temperature range: Tlow = *40°C, Thigh = 85°C.
6. Guaranteed but not tested.
7. The deviation parameters DVref and DIref are defined as the difference between the maximum value and minimum value obtained over the
full operating ambient temperature range that applied.
Vref Max
Vref Min
T1T2
Ambient Temperature
DVref = Vref Max − Vref Min
DTA = T2 − T1
The average temperature coefficient of the reference input voltage, aVref is defined as:
αVref ǒppm
°CǓ+ǒ(DVref)
Vref (T
A+25°C) 106Ǔ
DT
A
aVref can be positive or negative depending on whether Vref Min or Vref Max occurs at the lower ambient temperature, refer to Figure 8.
Example: DVref = 7.2 mV and the slope is positive,
Example: Vref @ 25°C = 1.241 V
Example: DTA = 125°C
αVref ǒppm
°CǓ+
0.0072
1.241
125 +46 ppmń°C
106
8. The dynamic impedance ZKA is defined as:
⏐ZKA⏐+DVKA
DIK
When the device is operating with two external resistors, R1 and R2, (refer to Figure 4) the total dynamic impedance of the circuit is given by:
⏐ZKA′⏐ +⏐ZKA⏐ ǒ1)R1
R2Ǔ
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ELECTRICAL CHARACTERISTICS (TA = 25°C unless otherwise noted. NCV prefix indicates TSOP package device. SCV prefix
indicates SOT−23 package device.)
Characteristic Symbol
NCV431A, SCV431A
Unit
Min Typ Max
Reference Voltage (Figure 3)
(VKA = Vref, IK = 10 mA, TA = 25°C)
(TA = *40°C to 85°C)
(TA = *40°C to 125°C)
Vref 1.228
1.215
1.211
1.240
−
−
1.252
1.265
1.265
V
Reference Input Voltage Deviation Over Temperature (Figure 3)
(VKA = Vref, IK= 10 mA, TA = *40°C to 85°C, Notes 9, 10)
(VKA = Vref, IK= 10 mA, TA = *40°C to 125°C, Notes 9, 10)
DVref −
−
7.2
7.2
20
24
mV
Ration of Reference Input Voltage Change to Cathode Voltage Change (Figure 4)
(VKA = Vref to 16 V, IK= 10 mA)
DVref
DVKA
− −0.6 −1.5 mV
V
Reference Terminal Current (Figure 4)
(IK = 10 mA, R1 = 10 kW, R2 = open)
Iref −0.15 0.3
mA
Reference Input Current Deviation Over Temperature (Figure 4)
(IK = 10 mA, R1 = 10 kW, R2 = open, TA = *40°C to 85°C, Notes 9, 10)
(IK = 10 mA, R1 = 10 kW, R2 = open, TA = *40°C to 125°C, Notes 9, 10)
DIref −
−
0.04
−
0.08
0.10
mA
Minimum Cathode Current for Regulation (Figure 3) IK(min)−30 80 mA
Off−State Cathode Current (Figure 5)
(VKA = 6.0 V, Vref = 0)
(VKA = 16 V, Vref = 0)
IK(off) −
−
0.01
0.012
0.04
0.05
mA
Dynamic Impedance (Figure 3)
(VKA = Vref, IK =0.1 mA to 20 mA, f ≤ 1.0 kHz, Note 11)
|ZKA|
−0.25 0.4
W
9. Guaranteed but not tested.
10.The deviation parameters DVref and DIref are defined as the difference between the maximum value and minimum value obtained over the
full operating ambient temperature range that applied.
Vref Max
Vref Min
T1T2
Ambient Temperature
DVref = Vref Max − Vref Min
DTA = T2 − T1
The average temperature coefficient of the reference input voltage, aVref is defined as:
αVref ǒppm
°CǓ+ǒ(DVref)
Vref (T
A+25°C) 106Ǔ
DT
A
aVref can be positive or negative depending on whether Vref Min or Vref Max occurs at the lower ambient temperature, refer to Figure 8.
Example: DVref = 7.2 mV and the slope is positive,
Example: Vref @ 25°C = 1.241 V
Example: DTA = 125°C
αVref ǒppm
°CǓ+
0.0072
1.241
125 +46 ppmń°C
106
11. The dynamic impedance ZKA is defined as:
⏐ZKA⏐+DVKA
DIK
When the device is operating with two external resistors, R1 and R2, (refer to Figure 4) the total dynamic impedance of the circuit is given by:
⏐ZKA′⏐ +⏐ZKA⏐ ǒ1)R1
R2Ǔ
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ELECTRICAL CHARACTERISTICS (TA = 25°C unless otherwise noted. NCV prefix indicates TSOP package device. SCV prefix
indicates SOT−23 package device.)
Characteristic Symbol
NCV431B, SCV431B
Unit
Min Typ Max
Reference Voltage (Figure 3)
(VKA = Vref, IK = 10 mA, TA = 25°C)
(TA = *40°C to 85°C)
(TA = *40°C to 125°C)
Vref 1.234
1.228
1.224
1.240
−
−
1.246
1.252
1.252
V
Reference Input Voltage Deviation Over Temperature (Figure 3)
(VKA = Vref, IK= 10 mA, TA = *40°C to 85°C, Notes 9, 10)
(VKA = Vref, IK= 10 mA, TA = *40°C to 125°C, Notes 9, 10)
DVref −
−
7.2
7.2
20
24
mV
Ration of Reference Input Voltage Change to Cathode Voltage Change (Figure 4)
(VKA = Vref to 16 V, IK= 10 mA)
DVref
DVKA
− −0.6 −1.5 mV
V
Reference Terminal Current (Figure 4)
(IK = 10 mA, R1 = 10 kW, R2 = open)
Iref −0.15 0.3
mA
Reference Input Current Deviation Over Temperature (Figure 4)
(IK = 10 mA, R1 = 10 kW, R2 = open, TA = *40°C to 85°C, Notes 12, 13)
(IK = 10 mA, R1 = 10 kW, R2 = open, TA = *40°C to 125°C, Notes 12, 13)
DIref −
−
0.04
−
0.08
0.10
mA
Minimum Cathode Current for Regulation (Figure 3) IK(min)−30 80 mA
Off−State Cathode Current (Figure 5)
(VKA = 6.0 V, Vref = 0)
(VKA = 16 V, Vref = 0)
IK(off) −
−
0.01
0.012
0.04
0.05
mA
Dynamic Impedance (Figure 3)
(VKA = Vref, IK =0.1 mA to 20 mA, f ≤ 1.0 kHz, Note 14)
|ZKA|
−0.25 0.4
W
12.Guaranteed but not tested.
13.The deviation parameters DVref and DIref are defined as the difference between the maximum value and minimum value obtained over the
full operating ambient temperature range that applied.
Vref Max
Vref Min
T1T2
Ambient Temperature
DVref = Vref Max − Vref Min
DTA = T2 − T1
The average temperature coefficient of the reference input voltage, aVref is defined as:
αVref ǒppm
°CǓ+ǒ(DVref)
Vref (T
A+25°C) 106Ǔ
DT
A
aVref can be positive or negative depending on whether Vref Min or Vref Max occurs at the lower ambient temperature, refer to Figure 8.
Example: DVref = 7.2 mV and the slope is positive,
Example: Vref @ 25°C = 1.241 V
Example: DTA = 125°C
αVref ǒppm
°CǓ+
0.0072
1.241
125 +46 ppmń°C
106
14.The dynamic impedance ZKA is defined as:
⏐ZKA⏐+DVKA
DIK
When the device is operating with two external resistors, R1 and R2, (refer to Figure 4) the total dynamic impedance of the circuit is given by:
⏐ZKA′⏐ +⏐ZKA⏐ ǒ1)R1
R2Ǔ
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Figure 3. Test Circuit
for VKA = Vref
Figure 4. Test Circuit
for VKA u Vref
Figure 5. Test Circuit
for IK(off)
IK
Input VKA
Vref
IK(off)
Input VKA
IK
Input VKA
Vref
Iref
R2
R1
VKA +Vrefǒ1 )R1
R2Ǔ)IrefSR1
Vref(min)
Vref(typ)
Figure 6. Cathode Current vs. Cathode Voltage Figure 7. Cathode Current vs. Cathode Voltage
Figure 8. Reference Input Voltage versus
Ambient Temperature
Figure 9. Reference Input Current versus
Ambient Temperature
VKA, CATHODE VOLTAGE (V)
30
20
10
0
2.01.51.00.50−0.5−1.0
IK, CATHODE CURRENT (mA)
VKA, CATHODE VOLTAGE (V)
1.41.21.00.80.60.40.20
90
70
50
30
10
−10
−30
IK, CATHODE CURRENT ( A)
−10
110
m
TA, AMBIENT TEMPERATURE (°C)
1.25
1.23
3510−15−40
Vref, REFERENCE INPUT VOLTAGE (V)
TA, AMBIENT TEMPERATURE (°C)
85603510−15−40
0.14
0.13
0.12
Iref, REFERENCE INPUT CURRENT ( A)
1.22
0.15
8560
1.24
IK
Input VKA
VKA = Vref
TA = 25°C
IK
Input VKA
VKA = Vref
TA = 25°C
IK
Input VKA
IK = 10 mA
10 k Iref
VKA = Vref
IK = 10 mA
Input
IK
VKA
Vref(max)
m
IK(min)
TLV431A Typ.
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Figure 10. Reference Input Voltage Change
versus Cathode Voltage
Figure 11. Off−State Cathode Current
versus Cathode Voltage
Figure 12. Off−State Cathode Current versus
Ambient Temperature
Figure 13. Dynamic Impedance versus
Frequency
Figure 14. Dynamic Impedance versus
Ambient Temperature
Figure 15. Open−Loop Voltage Gain
versus Frequency
VKA, CATHODE VOLTAGE (V)
0
−2.0
−6.0
−8.0
128.04.00
Vref, REFERENCE INPUT VOLTAGE CHANGE (mV)
VKA, CATHODE VOLTAGE (V)
20128.04.00
3.0
2.0
1.0
0
IK(off), CATHODE CURRENT ( A)
−10
4.0
m
D
−4.0
16
TA, AMBIENT TEMPERATURE (°C)
0.4
0.3
3510−15−40
Ioff, OFF-STATE CATHODE CURRENT ( A)
f, FREQUENCY (Hz)
10 M10 k1.0 k
0.1
| , DYNAMIC IMPEDANCE (OHM)
0
10
0.1
100 k 1.0 M60 85
1.0
Za|
TA, AMBIENT TEMPERATURE (°C)
0.23
0.21
0.20
3510−15−40
|Za|, DYNAMIC IMPEDANCE (OHM)
f, FREQUENCY (Hz)
1.0 M1.0 k100
50
40
30
20
10
0
Avol, OPEN LOOP VOLTAGE GAIN (dB)
0.19
60
0.22
10 k 100 k
8560
0.24
Ioff
Input VKA
VKA = 16 V
Vref = 0 V
Ioff
Input VKA
VKA = 16 V
Vref = 0 V
IK
Input VKA
R1
R2 Vref
8.25 k
15 k IK
230
Output
9 Fm
50
+
−
Output
IK
+
−
IK = 10 mA
TA = 25°C
IK = 0.1 mA to 20 mA
TA = 25°C
IK = 10 mA
TA = 25°C
m
0.2
IK = 0.1 mA to 20 mA
f = 1.0 kHz
50
+
−
Output
IK
TA = 25°C
16
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TA = 25°C
CL, LOAD CAPACITANCE
10
pF
100
pF
20
15
10
5.0
0
IK, CATHODE CURRENT (mA)
25
1.0
nF
0.01
mF
0.1
mF
100
mF
1.0
mF
10
mF
C
A
B
D
Stable
Stable
Stable
Figure 16. Spectral Noise Density Figure 17. Pulse Response
f, FREQUENCY (Hz)
350
275
10 k1.0 k10010
NOISE VOLTAGE (nV/
250
300
100 k
325
Figure 18. Stability Boundary Conditions
IK
VKA = Vref
IK = 10 mA
TA = 25°C
Iref
Input Output
50
Pulse
Generator
f = 100 kHz
Output
Input
Hz)
√
Figure 19. Test Circuit for Figure 18
CL
IK
1.0 k
V+
Output
Input 1.8 k
0 2.0 4.0 6.0 8.0 10.
0
0
2.0
0
0.5
(VOLTS)
1.0
1.5
t, TIME (ms)
TA = 25°C
W
1.0 3.0 5.0 7.0 9.0
Unstable
Regions
VKA
(V)
R1
(kW)
A, C Vref
B, D 5.0
0
30.4
R2
R1
R2
(kW)
∞
10
Stability
Figures 18 and 19 show the stability boundaries and
circuit configurations for the worst case conditions with the
load capacitance mounted as close as possible to the device.
The required load capacitance for stable operation can vary
depending on the operating temperature and capacitor
equivalent series resistance (ESR). Ceramic or tantalum
surface mount capacitors are recommended for both
temperature and ESR. The application circuit stability
should be verified over the anticipated operating current and
temperature ranges.
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Figure 20. Shunt Regulator Figure 21. High Current Shunt Regulator
Vout +ǒ1)R1
R2ǓVref V
out +ǒ1)R1
R2ǓVref
R1
R2
Vout
Vin
R1
R2
Vout
Vin
TYPICAL APPLICATIONS
Figure 22. Output Control for a Three Terminal
Fixed Regulator
Figure 23. Series Pass Regulator
V
out +ǒ1)R1
R2ǓVref
V
out(min) +Vref )5.0 V
V
out +ǒ1)R1
R2ǓVref
V
out(min) +Vref
Vin Vout
R1
R2
Vin Vout
R1
R2
Out
In
MC7805
Common
Vin(min) +Vout )Vbe
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Figure 28. Voltage Monitor Figure 29. Linear Ohmmeter
Figure 30. Simple 400 mW Phono Amplifier
Lower limit +ǒ1)R1
R2ǓVref
L.E.D. indicator is ‘ON’ when Vin is
between the upper and lower limits,
Upper limit +ǒ1)R3
R4ǓVref
LED R1
R2
R3
R4
Vin
10 k
Calibrate
-
+
25 V
−5.0 V
Vout
25 V
2.0 mA
5 k
1%
50 k
1%
1.0 M
1%
Range
Rx
1N5305
1.0 kW
V
1.0 MW
V
10 kW
V
500 k
1%
100 kW
V
360 k
56 k
10 k
330
T1
8.0 W
38 V
470 mF
1.0 mF
0.05 mF
+
25 k
Volume
47 k
T1 = 330 W to 8.0 W
Rx+VoutD W
V Range
*Thermalloy
*THM 6024
*Heatsink on
*LP Package.
*
Tone
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13
Figure 31. Isolated Output Line Powered Switching Power Supply
The above circuit shows the TLV431A/B/C as a compensated amplifier controlling the feedback loop of an isolated output line
powered switching regulator. The output voltage is programmed to 3.3 V by the resistors values selected for R1 and R2. The
minimum output voltage that can be programmed with this circuit is 2.64 V, and is limited by the sum of the reference voltage
(1.24 V) and the forward drop of the optocoupler light emitting diode (1.4 V). Capacitor C1 provides loop compensation.
Gate Drive
VCC
Controller
VFB
GND
Current
Sense
DC Output
3.3 V
R1
3.0 k
R2
1.8 k
100
AC Input
C1
0.1 mF
Anode
Reference
NC
NC
Cathode
5
4
1
2
3
TLV43
1XXX
ALYWG
G
PIN CONNECTIONS AND DEVICE MARKING
(Top View)
123
Cathode
Anode
Reference 1
2
3
(Top View)
XXX = Specific Device Code
A = Assembly Location
Y = Year
L = Wafer Lot
W = Work Week
G= Pb−Free Package
(Note: Microdot may be in either location)
1. Reference
2. Anode
3. Cathode
TO−92 TSOP−5 SOT−23−3
XXX = Specific Device Code
M = Date Code
G= Pb−Free Package
(Note: Microdot may be in either location)
XXXMG
G
XXXAYWG
G
TLV431, NCV431, SCV431
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14
ORDERING INFORMATION
Device Device Code Package Shipping†
TLV431ALPG ALP TO−92−3
(Pb−Free)
6000 / Box
TLV431ALPRAG ALP TO−92−3
(Pb−Free)
2000 / Tape & Reel
TLV431ALPREG ALP TO−92−3
(Pb−Free)
2000 / Tape & Reel
TLV431ALPRMG ALP TO−92−3
(Pb−Free)
2000 / Ammo Pack
TLV431ALPRPG ALP TO−92−3
(Pb−Free)
2000 / Ammo Pack
TLV431ASNT1G RAA TSOP−5
(Pb−Free, Halide−Free)
3000 / Tape & Reel
TLV431ASN1T1G RAF SOT−23−3
(Pb−Free, Halide−Free)
3000 / Tape & Reel
TLV431BLPG BLP TO−92−3
(Pb−Free)
6000 / Box
TLV431BLPRAG BLP TO−92−3
(Pb−Free)
2000 / Tape & Reel
TLV431BLPREG BLP TO−92−3
(Pb−Free)
2000 / Tape & Reel
TLV431BLPRMG BLP TO−92−3
(Pb−Free)
2000 / Ammo Pack
TLV431BLPRPG BLP TO−92−3
(Pb−Free)
2000 / Ammo Pack
TLV431BSNT1G RAH TSOP−5
(Pb−Free, Halide−Free)
3000 / Tape & Reel
TLV431BSN1T1G RAG SOT−23−3
(Pb−Free, Halide−Free)
3000 / Tape & Reel
TLV431CSN1T1G AAN SOT−23−3
(Pb−Free, Halide−Free)
3000 / Tape & Reel
SCV431ASN1T1G* RAE SOT−23−3
(Pb−Free, Halide−Free)
3000 / Tape & Reel
SCV431BSN1T1G* RAC SOT−23−3
(Pb−Free, Halide−Free)
3000 / Tape & Reel
NCV431ASNT1G* ACH TSOP−5
(Pb−Free, Halide−Free)
3000 / Tape & Reel
NCV431BSNT1G* AD6 TSOP−5
(Pb−Free, Halide−Free)
3000 / Tape & Reel
†For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging
Specifications Brochure, BRD8011/D.
*SCV, NCV Prefix for Automotive and Other Applications Requiring Unique Site and Control Change Requirements; AEC−Q100 Qualified and
PPAP Capable.
TLV431, NCV431, SCV431
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15
PACKAGE DIMENSIONS
TO−92 (TO−226)
CASE 29−11
ISSUE AN
NOTES:
1. DIMENSIONING AND TOLERANCING PER ANSI
Y14.5M, 1982.
2. CONTROLLING DIMENSION: INCH.
3. CONTOUR OF PACKAGE BEYOND DIMENSION R
IS UNCONTROLLED.
4. LEAD DIMENSION IS UNCONTROLLED IN P AND
BEYOND DIMENSION K MINIMUM.
R
A
P
J
L
B
K
G
H
SECTION X−X
C
V
D
N
N
XX
SEATING
PLANE DIM MIN MAX MIN MAX
MILLIMETERSINCHES
A0.175 0.205 4.45 5.20
B0.170 0.210 4.32 5.33
C0.125 0.165 3.18 4.19
D0.016 0.021 0.407 0.533
G0.045 0.055 1.15 1.39
H0.095 0.105 2.42 2.66
J0.015 0.020 0.39 0.50
K0.500 --- 12.70 ---
L0.250 --- 6.35 ---
N0.080 0.105 2.04 2.66
P--- 0.100 --- 2.54
R0.115 --- 2.93 ---
V0.135 --- 3.43 ---
1
NOTES:
1. DIMENSIONING AND TOLERANCING PER
ASME Y14.5M, 1994.
2. CONTROLLING DIMENSION: MILLIMETERS.
3. CONTOUR OF PACKAGE BEYOND
DIMENSION R IS UNCONTROLLED.
4. LEAD DIMENSION IS UNCONTROLLED IN P
AND BEYOND DIMENSION K MINIMUM.
RA
P
J
B
K
G
SECTION X−X
C
V
D
N
XX
SEATING
PLANE DIM MIN MAX
MILLIMETERS
A4.45 5.20
B4.32 5.33
C3.18 4.19
D0.40 0.54
G2.40 2.80
J0.39 0.50
K12.70 ---
N2.04 2.66
P1.50 4.00
R2.93 ---
V3.43 ---
1
T
BENT LEAD
TAPE & REEL
AMMO PACK
STRAIGHT LEAD
BULK PACK
TLV431, NCV431, SCV431
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16
PACKAGE DIMENSIONS
SOT−23 (TO−236)
CASE 318−08
ISSUE AS
D
A1
3
12
NOTES:
1. DIMENSIONING AND TOLERANCING PER ASME Y14.5M, 1994.
2. CONTROLLING DIMENSION: MILLIMETERS.
3. MAXIMUM LEAD THICKNESS INCLUDES LEAD FINISH.
MINIMUM LEAD THICKNESS IS THE MINIMUM THICKNESS OF
THE BASE MATERIAL.
4. DIMENSIONS D AND E DO NOT INCLUDE MOLD FLASH,
PROTRUSIONS, OR GATE BURRS.
SOLDERING FOOTPRINT*
VIEW C
L
0.25
L1
e
EE
b
A
SEE VIEW C
DIM
A
MIN NOM MAX MIN
MILLIMETERS
0.89 1.00 1.11 0.035
INCHES
A1 0.01 0.06 0.10 0.000
b0.37 0.44 0.50 0.015
c0.08 0.14 0.20 0.003
D2.80 2.90 3.04 0.110
E1.20 1.30 1.40 0.047
e1.78 1.90 2.04 0.070
L0.30 0.43 0.55 0.012
0.039 0.044
0.002 0.004
0.017 0.020
0.006 0.008
0.114 0.120
0.051 0.055
0.075 0.080
0.017 0.022
NOM MAX
L1
H
2.10 2.40 2.64 0.083 0.094 0.104
HE
0.35 0.54 0.69 0.014 0.021 0.027
c
0−−− 10 0 −−− 10
T°°°°
T
3X
TOP VIEW
SIDE VIEW
END VIEW
2.90
0.80
DIMENSIONS: MILLIMETERS
0.90
PITCH
3X
3X 0.95
RECOMMENDED
*For additional information on our Pb−Free strategy and soldering
details, please download the ON Semiconductor Soldering and
Mounting Techniques Reference Manual, SOLDERRM/D.
TLV431, NCV431, SCV431
www.onsemi.com
17
PACKAGE DIMENSIONS
TSOP−5
SN SUFFIX
CASE 483
ISSUE M NOTES:
1. DIMENSIONING AND TOLERANCING PER ASME
Y14.5M, 1994.
2. CONTROLLING DIMENSION: MILLIMETERS.
3. MAXIMUM LEAD THICKNESS INCLUDES LEAD FINISH
THICKNESS. MINIMUM LEAD THICKNESS IS THE
MINIMUM THICKNESS OF BASE MATERIAL.
4. DIMENSIONS A AND B DO NOT INCLUDE MOLD
FLASH, PROTRUSIONS, OR GATE BURRS. MOLD
FLASH, PROTRUSIONS, OR GATE BURRS SHALL NOT
EXCEED 0.15 PER SIDE. DIMENSION A.
5. OPTIONAL CONSTRUCTION: AN ADDITIONAL
TRIMMED LEAD IS ALLOWED IN THIS LOCATION.
TRIMMED LEAD NOT TO EXTEND MORE THAN 0.2
FROM BODY.
DIM MIN MAX
MILLIMETERS
A2.85
B1.35
C0.90 1.10
D0.25 0.50
G0.95 BSC
H0.01 0.10
J0.10 0.26
K0.20 0.60
M0 10
S2.50 3.00
123
54 S
A
G
B
D
H
C
J
__
0.7
0.028
1.0
0.039
ǒmm
inchesǓ
SCALE 10:1
0.95
0.037
2.4
0.094
1.9
0.074
*For additional information on our Pb−Free strategy and soldering
details, please download the ON Semiconductor Soldering and
Mounting Techniques Reference Manual, SOLDERRM/D.
SOLDERING FOOTPRINT*
0.20
5X
CAB
T0.10
2X
2X T0.20
NOTE 5
CSEATING
PLANE
0.05
K
M
DETAIL Z
DETAIL Z
TOP VIEW
SIDE VIEW
A
B
END VIEW
3.15
1.65
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TLV431A/D
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