MMF60R115P Datasheet
Aug. 2014 Revision 1.0 MagnaChip Semiconductor Ltd.
1
Parameter
Value
Unit
VDS @ Tj,max
650
V
RDS(on),max
0.115
Ω
VTH,typ
3
V
ID
33
A
Qg,typ
79
nC
Order Code
Marking
Temp. Range
Package
Packing
MMF60R115PTH
60R115P
-55 ~ 150℃
TO-220F
Tube
MMF60R115P
600V 0.115Ω N-channel MOSFET
Description
MMF60R115P is power MOSFET using magnachip’s advanced super junction technology that can
realize very low on-resistance and gate charge. It will provide much high efficiency by using
optimized charge coupling technology. These user friendly devices give an advantage of Low EMI to
designers as well as low switching loss.
Features
Low Power Loss by High Speed Switching and Low On-Resistance
100% Avalanche Tested
Green Package – Pb Free Plating, Halogen Free
Key Parameters
Ordering Information
Applications
PFC Power Supply Stages
Switching Applications
Adapter
Motor Control
DC – DC Converters
G
D
S
G
D
G
S
G
D
S
G
Package & Internal Circuit
MMF60R115P Datasheet
Aug. 2014 Revision 1.0 MagnaChip Semiconductor Ltd.
2
Parameter
Symbol
Rating
Unit
Note
Drain – Source voltage
VDSS
600
V
Gate – Source voltage
VGSS
±30
V
Continuous drain current
ID
33
A
TC=25℃
20.9
A
TC=100℃
Pulsed drain current(1)
IDM
99
A
Power dissipation
PD
255
W
Single - pulse avalanche energy
EAS
700
mJ
MOSFET dv/dt ruggedness
dv/dt
50
V/ns
Diode dv/dt ruggedness
dv/dt
15
V/ns
Storage temperature
Tstg
-55 ~150
℃
Maximum operating junction
temperature
Tj
150
℃
1) Pulse width tP limited by Tj,max
2) ISD ≤ ID, VDS peak ≤ V(BR)DSS
Parameter
Symbol
Value
Unit
Thermal resistance, junction-case max
Rthjc
3.6
℃/W
Thermal resistance, junction-ambient max
Rthja
62.5
℃/W
Thermal Characteristics
Absolute Maximum Rating (Tc=25℃ unless otherwise specified)
MMF60R115P Datasheet
Aug. 2014 Revision 1.0 MagnaChip Semiconductor Ltd.
3
Parameter
Symbol
Min.
Typ.
Max.
Unit
Test Condition
Drain – Source
Breakdown voltage
V(BR)DSS
600
-
-
V
VGS = 0V, ID=0.25mA
Gate Threshold Voltage
VGS(th)
2
3
4
V
VDS = VGS, ID=0.25mA
Zero Gate Voltage
Drain Current
IDSS
-
-
1
μA
VDS = 600V, VGS = 0V
Gate Leakage Current
IGSS
-
-
100
nA
VGS = ±30V, VDS =0V
Drain-Source On
State Resistance
RDS(ON)
-
0.104
0.115
Ω
VGS = 10V, ID = 14.5A
Parameter
Symbol
Min.
Typ.
Max.
Unit
Test Condition
Input Capacitance
Ciss
-
2760
-
pF
VDS = 25V, VGS = 0V,
f = 1.0MHz
Output Capacitance
Coss
-
1780
-
Reverse Transfer Capacitance
Crss
-
91
-
Effective Output Capacitance
Energy Related (3)
Co(er)
-
73.3
-
VDS = 0V to 480V,
VGS = 0V,f = 1.0MHz
Turn On Delay Time
td(on)
-
50
-
ns
VGS = 10V, RG = 25Ω,
VDS = 300V, ID = 33 A
Rise Time
tr
-
105
-
Turn Off Delay Time
td(off)
-
240
-
Fall Time
tf
-
82
-
Total Gate Charge
Qg
-
79
-
nC
VGS = 10V, VDS = 480V,
ID = 33 A
Gate – Source Charge
Qgs
-
18
-
Gate – Drain Charge
Qgd
-
34
-
Gate Resistance
RG
-
2.0
-
Ω
VGS = 0V, f = 1.0MHz
3) Co(er) is a capacitance that gives the same stored energy as COSS while VDS is rising from 0V to 80% V(BR)DSS
Static Characteristics (Tc=25℃ unless otherwise specified)
Dynamic Characteristics (Tc=25℃ unless otherwise specified)
MMF60R115P Datasheet
Aug. 2014 Revision 1.0 MagnaChip Semiconductor Ltd.
4
Parameter
Symbol
Min.
Typ.
Max.
Unit
Test Condition
Continuous Diode Forward
Current
ISD
-
-
33
A
Diode Forward Voltage
VSD
-
-
1.4
V
ISD = 33.0A, VGS = 0 V
Reverse Recovery Time
trr
-
488
-
ns
ISD = 33.0A
di/dt = 100 A/μs
VDD = 100 V
Reverse Recovery Charge
Qrr
-
9.4
-
μC
Reverse Recovery Current
Irrm
-
38.6
-
A
Reverse Diode Characteristics (Tc=25℃ unless otherwise specified)
MMF60R115P Datasheet
Aug. 2014 Revision 1.0 MagnaChip Semiconductor Ltd.
5
Characteristic Graph
MMF60R115P Datasheet
Aug. 2014 Revision 1.0 MagnaChip Semiconductor Ltd.
6
MMF60R115P Datasheet
Aug. 2014 Revision 1.0 MagnaChip Semiconductor Ltd.
7
MMF60R115P Datasheet
Aug. 2014 Revision 1.0 MagnaChip Semiconductor Ltd.
8
Test Circuit
VDS
10V
1mA DUT
100KΩ
10V
Same type as DUT
+
-
VDD
DUT
+
-
Same type as DUT
VDS
+
-
IS
Rg
10KΩ
Vgs ± 15V
L
IF
VDD
DUT
+
-
ID
VDS
Vgs tp
RL
VDD
DUT
+
-
IAS
VDS
Rg
Vgs tp
L
10V
VGS
Charge
Qg
Qgs Qgd
VDS
VGS
90%
10%
Td(on) tr
ton
Td(off) tf
toff
VDD
tptAV
VDS(t)
BVDSS
IAS
Rds(on) * IAS
trr
ta tb
IFM
IRM
di/dt
0.25 IRM
0.75 IRM
0.5 IRM
VR
VRM(REC)
Fig15-1. Gate charge measurement circuit Fig15-2. Gate charge waveform
Fig16-1. Diode reverse recovery test circuit Fig16-1. Diode reverse recovery test waveform
Fig17-1. Switching time test circuit for resistive load Fig17-2. Switching time waveform
Fig18-1. Unclamped inductive load test circuit Fig18-2. Unclamped inductive waveform
Rg
25Ω
MMF60R115P Datasheet
Aug. 2014 Revision 1.0 MagnaChip Semiconductor Ltd.
9
Physical Dimension
3 Leads, TO-220F
Dimensions are in millimeters unless otherwise specified
Symbol Min Nom Max
A 4.50 4.93
b 0.63 0.91
b1 1.15 1.47
C 0.33 0.63
D 15.47 16.13
E 9.60 10.71
e 2.54
F 2.34 2.84
G 6.48 6.90
L 12.24 13.72
L1 2.79 3.67
Q 2.52 2.96
Q1 3.10 3.50
￠R 3.00 3.55
MMF60R115P Datasheet
Aug. 2014 Revision 1.0 MagnaChip Semiconductor Ltd.
10
DISCLAIMER:
The Products are not designed for use in hostile environments, including, without limitation, aircraft, nuclear power
generation, medical appliances, and devices or systems in which malfunction of any Product can reasonably be
expected to result in a personal injury. Seller’s customers using or selling Seller’s products for use in such
applications do so at their own risk and agree to fully defend and indemnify Seller.
MagnaChip reserves the right to change the specifications and circuitry without notice at any time. MagnaChip does not consider responsibility
for use of any circuitry other than circuitry entirely included in a MagnaChip product. is a registered trademark of MagnaChip
Semiconductor Ltd.