Approval sheet
Capacitor Arrays Series
Page 1 of 8 ASC_ Cap_Arrays_005M_AS Oct. 2012
*Contents in this sheet are subject to change without prior notice.
MULTILAYER CERAMIC CAPACITORS
Capacitor Arrays Series (10V to 50V)
4 x 0402, 4 x 0603 Size
NP0, X7R & Y5V Dielectrics
RoHS Compliance
Approval sheet
Capacitor Arrays Series
Page 2 of 8 ASC_ Cap_Arrays_005M_AS Oct. 2012
1. INTRODUCTION
WTC middle and high voltage series MLCC is designed by a special internal electrode pattern, which can reduce
voltage concentrations by distributing voltage gradients throughout the entire capacitor. This special design also affords
increased capacitance values in a given case size and voltage rating.
WTC capacitor arrays are developed to offer designers the opportunity to lower placement costs increase assembly
line output through lower component count per board.
4. HOW TO ORDER
Y 4C 3 B 103 K 500 C T
Series
Y
=Capacitor
array
Cap. Nr.
4C=4xCap
Termination pitch
3=0.03” pitch
2=0.02” pitch
Dielectric
N=NP0
(C0G)
B=X7R
F=Y5V
Capacitance
Two significant
digits followed
by no. of zeros.
And R is in
place of
decimal point.
eg.:
103=10x10
3
=10,000pF
=10nF
Tolerance
J5%
K10%
M20%
Z=-20/+80%
Rated voltage
Two significant
digits followed
by no. of zeros.
And R is in
place of decimal
point.
eg.:
100=10 VDC
160=16 VDC
250=25 VDC
500=50 VDC
Termination
C=Cu/Ni/Sn
Packaging
T=7” reeled
2. FEATURES
a. High density mounting due to mounting space
saving.
b. Mounting cost saving.
c. Increased throughput.
3. APPLICATIONS
a. For use as a bypass for digital and analog signal
line noise
b. Computer motherboards and peripherals.
c. The other common electronic circuits.
Approval sheet
Capacitor Arrays Series
Page 3 of 8 ASC_ Cap_Arrays_005M_AS Oct. 2012
5. EXTERNAL DIMENSIONS
Size
Inch (mm) L (mm) W (mm) T (mm)/Symbol S (mm) BW (mm) P (mm)
0508 (1220) 2.00±0.15 1.25±0.15 0.85±0.10 T 0.20±0.10 0.25±0.10 0.50±0.10
0612 (1632) 3.20±0.15 1.60±0.15 0.80±0.10 B 0.30±0.20 0.40±0.15 0.80±0.15
Reflow soldering process only.
6. GENERAL ELECTRICAL DATA
Dielectric NP0 X7R Y5V
Size 4x0402 4x0603 4x0402 4x0603 4x0603
Capacitance* 10pF to 270pF
10pF to 470pF
1000pF to 100nF
180pF to 100nF
10nF to 100nF
Capacitance tolerance** J (±5%), K (±10%) K (±10%), M (±20%) Z (-20/+80%)
Rated voltage (WVDC) 50V 25, 50V 10V, 16V, 25V, 50V
16V, 25V, 50V 16V, 50V
Q/Tan δ* Cap<30pF: Q400+20C
Cap30pF: Q1000
Ur=50V, 2.5%
Ur=25V&16V, 3.5%
Ur=10V, 5.0%
Ur=50V, 5%
Ur=16V, 7%
Insulation resistance at Ur 10G 10G or RxC500xF whichever is less
Operating temperature -55 to +125°C -25 to +85°C
Capacitance characteristic ±30ppm ±15% +30/-80%
Termination Ni/Sn (lead-free termination)
* Measured at 30~70% related humidity.
NP0: Apply 1.0±0.2Vrms, 1.0MHz±10% at the conditions of 25°C ambient temperature.
X7R: Apply 1.0±0.2Vrms, 1.0kHz±10%, at the conditions of 25°C ambient temperature.
Y5V: Apply 1.0±0.2Vrms, 1.0kHz±10%, at the conditions of 20°C ambient temperature.
** Preconditioning for Class II MLCC: Perform a heat treatment at 150±10°C for 1 hour, then leave in ambient condition for 24±2 hours
before measurement.
L
WS
BW P
T
L
WS
BW P
T
Fig. 1 The outline of MLCC
Approval sheet
Capacitor Arrays Series
Page 4 of 8 ASC_ Cap_Arrays_005M_AS Oct. 2012
7. CAPACITANCE RANGE
SIZE 4 x 0402 4 x 0603
DIELECTRIC NP0
X7R NP0 X7R Y5V
RATED VOLTAGE
(VDC) 50 10 16 25 50 25 50 16 25 50 16 50
10pF (100)
T B B
15pF (150)
T B B
22pF (220)
T B B
33pF (330)
T B B
47pF (470)
T B B
68pF (680)
T B B
100pF (101)
T B B
150pF (151)
T B B
180pF (181)
T B B B B
220pF (221)
T B B B B
270pF (271)
T B B B B
330pF (331)
B B B B
470pF (471)
B B B B
6,80pF (681)
B B
1,000pF (102)
T T T T B B
1,500pF (152)
T T T T B B
2,200pF (222)
T T T T B B
3,300pF (332)
T T T T B B
4,700pF (472)
T T T T B B
6,800pF (682)
T T T T B B
0.010µF (103)
T T T T B B B
0.015µF (153)
T T T B B B B
0.022µF (223)
T T T B B B B
0.033µF (333)
T T T B B
0.047µF (473)
T T T B B
0.068µF (683)
T T T B B
Capacitance
0.10µF (104)
T T T B B B
1. The letter in cell is expressed the symbol of product thickness.
8. PACKAGING DIMENSION AND QUANTITY
Paper tape
Size Thickness/Symbol
(mm) 7” reel 13” reel
4 x 0402 0.85±0.10 T 4k -
4 x 0603 0.80±0.10 B 4k -
Unit: pieces
Approval sheet
Capacitor Arrays Series
Page 5 of 8 ASC_ Cap_Arrays_005M_AS Oct. 2012
9. RELIABILITY TEST CONDITIONS AND REQUIREMENTS
No.
Item Test Condition Requirements
1.
Visual and
Mechanical
--- * No remarkable defect.
* Dimensions to conform to individual specification sheet.
2.
Capacitance * Shall not exceed the limits given in the detailed spec.
3.
Q/ D.F.
(Dissipation
Factor)
Class I: (NP0)
1.0±0.2Vrms, 1MHz±10%
Class II: (X7R, Y5V)
1.0±0.2Vrms, 1kHz±10%
NP0: Cap30pF, Q1000; Cap<30pF, Q400+20C
X7R: Ur=50V, 2.5%; Ur=25V&16V, 3.5%; Ur=10V, 5.0%
Y5V: Ur=50V, 5%; Ur=16V, 7%
4.
Dielectric
Strength
* To apply 250% rated voltage.
* Duration: 1 to 5 sec.
* Charge and discharge current less than 50mA.
* No evidence of damage or flash over during test.
5.
Insulation
Resistance
To apply rated voltage for max. 120 sec. 10G or RxC500-F whichever is smaller.
6.
Temperature
Coefficient
With no electrical load.
T.C. Operating Temp
NP0 -55~12C at 25°C
X7R -55~12C at 25°C
Y5V -25~85°C at 2C
T.C. Capacitance Change
NP0 Within ±30ppm/°C
X7R Within ±15%
Y5V Within +30%/-80%
7.
Adhesive
Strength of
Termination
* Pressurizing force
5N (0603) and 10N (>0603)
* Test time: 10±1 sec.
* No remarkable damage or removal of the terminations.
8.
Vibration
Resistance
* Vibration frequency: 10~55 Hz/min.
* Total amplitude: 1.5mm
* Test time: 6 hrs. (Two hrs each in three mutually
perpendicular directions.)
* Measurement to be made after keeping at room temp. for
24±2 hrs.
* No remarkable damage.
* Cap change and Q/D.F.: To meet initial spec.
9.
Solderability * Solder temperature: 235±C
* Dipping time:0.5 sec.
95% min. coverage of all metalized area.
10.
Bending Test
* The middle part of substrate shall be pressurized by means
of the pressurizing rod at a rate of about 1 mm per second until
the deflection becomes 1 mm and then the pressure shall be
maintained for 5±1 sec.
* Measurement to be made after keeping at room temp. for
24±2 hrs.
* No remarkable damage.
* Cap change
NP0: within ±5.0% or ±0.5pF whichever is larger.
X7R: within ±12.5%
Y5V: within ±30%
(This capacitance change means the change of capacitance under
specified fl
exure of substrate from the capacitance measured before
the test.)
11.
Resistance to
Soldering Heat
* Solder temperature: 260±C
* Dipping time: 10±1 sec
* Preheating: 120 to 150°C for 1 minute before imme rse the
capacitor in a eutectic solder.
* Before initial measurement (Class II only): Perform
150+0/-10°C for 1 hr and then set for 24±2 hrs at r oom temp.
* Measurement to be made after keeping at room temp. for
24±2 hrs.
* No remarkable damage.
* Cap change:
NP0: within ±2.5% or ±0.25pF whichever is larger.
X7R: within ±7.5%
Y5V: within ±20%
* Q/D.F., I.R. and dielectric strength: To meet initial requirements.
* 25% max. leaching on each edge.
Approval sheet
Capacitor Arrays Series
Page 6 of 8 ASC_ Cap_Arrays_005M_AS Oct. 2012
No.
Item Test Condition Requirements
12.
Temperature
Cycle
* Conduct the five cycles according to the temperatures and
time.
Step
Temp. (°C) Time (min.)
1 Min. operating temp. +0/-3 30±3
2 Room temp. 2~3
3 Max. operating temp. +3/-0 30±3
4 Room temp. 2~3
* Before initial measurement (Class II only): Perform
150+0/-10°C for 1 hr and then set for 24±2 hrs at r oom temp.
* Measurement to be made after keeping at room temp. for
24±2 hrs.
* No remarkable damage.
* Cap change
NP0: within ±2.5 or ±0.25pF whichever is larger.
X7R: within ±7.5%
Y5V: within ±20%
* Q/D.F., I.R. and dielectric strength: To meet initial requirements.
13.
Humidity
(Damp Heat)
Steady State
* Test temp.: 40±2°C
* Humidity: 90~95% RH
* Test time: 500+24/-0hrs.
*Before initial measurement (Class II only): Perform
150+0/-10°C for 1 hr and then set for 24±2 hrs at r oom temp.
* Measurement to be made after keeping at room temp. for
24±2 hrs
* No remarkable damage.
* Cap change: NP0: within ±5.0% or ±0.5pF whichever is larger.
X7R: within ±12.5%
Y5V: within ±30%
* Q/D.F. value:
NP0: Cap30pF, Q350; 10pFCap<30pF, Q275+2.5C
Cap<10pF; Q200+10C
X7R: Ur=50V, 3%; Ur=25V&16V, 5%; Ur=10V, 7.5%
Y5V: Ur=50V, 7.5%; Ur=16V, 10%
* I.R.: 1G or RxC50-F whichever is smaller.
14.
Humidity
(Damp Heat)
Load
* Test temp.: 40±2°C
* Humidity: 90~95%RH
* Test time: 500+24/-0 hrs.
* To apply voltagerated voltage.
* Before initial measurement (Class II only): To apply test
voltage for 1hr at 40°C and then set for 24±2 hrs at room temp.
* Measurement to be made after keeping at room temp. for
24±2 hrs.
* No remarkable damage.
* Cap change: NP0: within ±7.5% or ±0.75pF whichever is larger.
X7R: within ±12.5%
Y5V: within ±30%
* Q/D.F. value:
NP0: Cap30pF, Q200; Cap<30pF, Q100+10/3C
X7R: Ur=50V, 3%; Ur=25V&16V, 5%; Ur=10V, 7.5%
Y5V: Ur=50V, 7.5%; Ur=16V, 10%
* I.R.: 500M or RxC25-F whichever is smaller.
15.
High
Temperature
Load
(Endurance)
* Test temp.:
NP0, X7R: 125±3°C
Y5V: 85±3°C
* To apply voltage: 200% of rated voltage.
* Test time: 1000+24/-0 hrs.
*Before initial measurement (Class II only): To apply test
voltage for 1hr at test temp. and then set for 24±2 hrs at room
temp.
*Measurement to be made after keeping at room temp. for
24±2 hrs
* No remarkable damage.
* Cap change: NP0: within ±3.0% or ±0.3pF whichever is larger.
X7R: within ±12.5%
Y5V: within ±30%
* Q/D.F. value:
NP0: Cap30pF, Q350
10pFCap<30pF, Q275+2.5C
Cap<10pF, Q200+10C
X7R: Ur=50V, 3%; Ur=25V&16V, 5%; Ur=10V, 7.5%
Y5V: Ur=50V, 7.5%; Ur=16V, 10%
* I.R.: 1G or RxC50-F whichever is smaller.
Approval sheet
Capacitor Arrays Series
Page 7 of 8 ASC_ Cap_Arrays_005M_AS Oct. 2012
APPENDIXES
Tape & reel dimensions
Description of customer label
Fig. 3 The dimension of reel
Fig. 2 The dimension of paper tape
Size 4x0402, 4x0603
Reel size 7”
C 13.0+0.5/-0.2
W
1
8.4+1.5/-0
A 178.0±0.10
N 60.0+1/-0
a. Customer name
b. WTC order series and item number
c. Customer P/O
d. Customer P/N
e. Description of product
f. Quantity
g. Bar code including quantity & WTC P/N or customer
h. WTC P/N
i. Shipping date
j. Order bar code including series and item numbers
k. Serial number of label
Size 4x0402 4x0603
Thickness T B
A
0
1.50±0.10 2.00±0.10
B
0
2.30±0.10 3.50±0.10
T 0.95±0.05 0.95±0.05
K
0
- -
W 8.00±0.10 8.00±0.10
P
0
4.00±0.10 4.00±0.10
10xP
0
40.0±0.10 40.0±0.10
P
1
4.00±0.10 4.00±0.10
P
2
2.00±0.05 2.00±0.05
D
0
1.55±0.05 1.50±0.05
D
1
- -
E 1.75±0.05 1.75±0.10
F 3.50±0.05 3.50±0.05
Approval sheet
Capacitor Arrays Series
Page 8 of 8 ASC_ Cap_Arrays_005M_AS Oct. 2012
Constructions
Storage and handling conditions
(1) To store products at 5 to 40°C ambient temperature and 20 to 70%. related humidity conditions.
(2) The product is recommended to be used within one year after shipment. Check solderability in case of shelf life
extension is needed.
Cautions: a. The corrosive gas reacts on the terminal electrodes of capacitors, and results in the poor solderability.
Do not store the capacitors in the ambience of corrosive gas (e.g., hydrogen sulfide, sulfur dioxide,
chlorine, ammonia gas etc.)
b. In corrosive atmosphere, solderability might be degraded, and silver migration might occur to cause low
reliability.
c. Due to the dewing by rapid humidity change, or the photochemical change of the terminal electrode by
direct sunlight,the solderability and electrical performance may deteriorate. Do not store capacitors under
direct sunlight or dewing condition. To store products on the shelf and avoid exposure to moisture.
Recommended soldering conditions
The lead-free termination MLCCs are not only to be used on SMT against lead-free solder paste, but also suitable
against lead-containing solder paste. If the optimized solder joint is requested, increasing soldering time, temperature and
concentration of N
2
within oven are recommended.
No.
Name NP0, X7R, Y5V
1
Ceramic material BaTiO
3
based
2
Inner electrode Ni
3
Inner layer Cu
4
Middle layer Ni
5
Termination
Outer layer Sn (Matt)
Fig. 4 The construction of MLCC
Fig. 5 Recommended reflow soldering profile for SMT process
with SnAgCu series solder paste.
4
/ sec max
Over 60sec at least by
natural cooling
4
/ sec max
Over 60sec at least by
natural cooling
Fig. 6 Recommended wave soldering profile for SMT process
with SnAgCu series solder.