2016 Microchip Technology Inc. DS20005569A-page 1
VP2450
Features
• Free from Secondary Breakdown
• Low Power Drive Requirement
• Ease of Paralleling
• Low CISS and Fast Switching Speeds
• High Input Impedance and High Gain
• Excellent Thermal Stability
• Integral Source-drain Diode
Applications
• Motor Controls
•Converters
• Amplifiers
• Switches
• Power Supply Circuits
• Drivers: Relays, Hammers, Solenoids, Lamps,
Memory, Displays, Bipolar Transistors, etc.
General Description
The VP2450 is a low-threshold, Enhancement-mode
(normally-off) transistor that utilizes a vertical
Double-diffused Metal-Oxide Semiconductor (DMOS)
structure and a well-proven silicon gate manufacturing
process. This combination produces a device with the
power handling capabilities of bipolar transistors and
the high input impedance and positive temperature
coefficient inherent in MOS devices. Characteristic of
all MOS structures, this device is free from thermal
runaway and thermally induced secondary breakdown.
This Vertical DMOS Field-Effect Transistor (FET) is
ideally suited to a wide range of switching and
amplifying applications where very low threshold
voltage, high breakdown voltage, high input
impedance, low input capacitance, and fast switching
speeds are desired.
Package Type
TO-92
GATE
SOURCE
DRAIN
GATE
SOURCE
DRAIN
DRAIN
SOT-89
See Table 3-1 for pin information.
s
P-Channel Enhancement-Mode Vertical DMOS FET
VP2450
DS20005569A-page 2 2016 Microchip Technology Inc.
1.0 ELECTRICAL CHARACTERISTICS
Absolute Maximum Ratings †
Drain-to-source Voltage.........................................................................................................................................BVDSS
Drain-to-gate Voltage ............................................................................................................................................BVDGS
Gate-to-source Voltage ........................................................................................................................................... ±20V
Operating and Storage Temperatures .................................................................................................. –55°C to +150°C
† Notice: Stresses above those listed under “Absolute Maximum Ratings” may cause permanent damage to the
device. This is a stress rating only, and functional operation of the device at those or any other conditions above those
indicated in the operational sections of this specification is not intended. Exposure to maximum rating conditions for
extended periods may affect device reliability.
ELECTRICAL CHARACTERISTICS
Electrical Specifications: For all specifications, TA = TJ = +25°C unless otherwise noted.
Parameter Sym. Min. Typ. Max. Unit Conditions
DC PARAMETER (Note 1 unless otherwise stated)
Drain-to-source Breakdown Voltage BVDSS –500 — — V VGS = 0V, ID = –250 µA
Gate Threshold Voltage VGS(th) –1.5 —–3.5 V VGS = VDS, ID = –1 mA
Change in VGS(th) with Temperature VGS(th) — — –4.8 mV/°C VGS = VDS, ID = –1 mA (Note 2)
Gate Body Leakage Current IGSS — — –100 nA VGS = ±20V, VDS = 0V
Zero Gate Voltage Drain Current IDSS
— — –10 µA VGS = 0V, VDS = Maximum Rating
— — –1 mA VDS = 0.8 Maximum Rating,
VGS = 0V, TA = 125°C (Note 2)
On-state Drain Current ID(ON)
–75 — — mA VGS = –4.5V, VDS = –15V
–200 — — VGS = –10V, VDS = –15V
Static Drain-to-source On-state
Resistance RDS(ON)
— — 35 VGS = –4.5V, ID = –50 mA
— — 30 VGS = –10V, ID = –100 mA
Change in RDS(ON) with Temperature RDS(ON) — — 0.75 %/°C VGS = –10V, ID = –100 mA
(Note 2)
AC PARAMETER (Note 2)
Forward Transconductance GFS 150 320 —mmho VDS = –15V, ID = –100 mA
Input Capacitance CISS — — 190
pF VGS = 0V, VDS = –25V, f = 1 MHzCommon Source Output Capacitance COSS — — 75
Reverse Transfer Capacitance CRSS — — 20
Turn-on Delay Time td(ON) — — 10
ns VDD = –25V, ID = –200 mA,
RGEN = 25
Rise Time tr— — 25
Turn-off Delay Time td(OFF) — — 45
Fall Time tf— — 25
DIODE PARAMETER
Diode Forward Voltage Drop VSD — — –1.8 VVGS = 0V, ISD = –100 mA
(Note 1)
Reverse Recovery Time trr —300 —ns VGS = 0V, ISD = –100 mA
(Note 2)
Note 1: All DC parameters are 100% tested at 25°C unless otherwise stated.
(Pulse test: 300 µs pulse, 2% duty cycle)
2: Specification is obtained by characterization and is not 100% tested.
TEMPERATURE SPECIFICATIONS
Electrical Characteristics: Unless otherwise noted, for all specifications TA =TJ = +25°C.
Parameter Sym. Min. Typ. Max. Unit Conditions
TEMPERATURE RANGE
Operating Temperature TA–55 —+150 °C
Storage Temperature TS–55 —+150 °C
PACKAGE THERMAL RESISTANCE
TO-92 JA —132 —°C/W
SOT-89 JA —133 —°C/W
THERMAL CHARACTERISTICS
Package
ID (Note 1)
(Continuous)
(mA)
ID
(Pulsed)
(mA)
Power Dissipation at
TA= 25°C
(W)
IDR (Note 1)
(mA)
IDRM
(mA)
TO-92 –100 –300 0.74 –100 –300
SOT-89 –160 –800 1.6 (Note 2)–160 –800
Note 1: ID (continuous) is limited by maximum TJ.
2: Mounted on FR5 board, 25 mm x 25 mm X 1.57 mm
2016 Microchip Technology Inc. DS20005569A-page 3
VP2450
VP2450
DS20005569A-page 4 2016 Microchip Technology Inc.
2.0 TYPICAL PERFORMANCE CURVES
BV
DSS
(normalized)
T
j
(
O
C)
1.2
1.1
1.0
0.9
0.8
-50 0 50 100 150
Note: The graphs and tables provided following this note are a statistical summary based on a limited number of
samples and are provided for informational purposes only. The performance characteristics listed herein
are not tested or guaranteed. In some graphs or tables, the data presented may be outside the specified
operating range (e.g. outside specified power supply range) and therefore outside the warranted range.
FIGURE 2-1: BVDSS Variation with
Te m p e r a t u r e .
I
D
(amperes)
V
GS
(volts)
-1.2
-1.0
-0.8
-0.6
-0.4
-0.2
0
0 -1.0 -2.0 -3.0 -4.0
VDS = -20V TA = -55OC
25OC
125OC
FIGURE 2-2: Transfer Characteristics.
C (picofarads)
VDS (volts)
0 -10 -20 -30 -40
400
300
200
100
0
COSS
CISS
CRSS
f = 1.0 MHz
FIGURE 2-3: Capacitance vs.
Drain-to-source Voltage.
FIGURE 2-4: On-resistance vs. Drain
Current.
0 -0.2 -0.4 -0.6 -0.8 -1.0 -1.2
RDS(ON) (ohms)
ID (amperes)
80
60
40
20
0
VGS = -4.5V
VGS = -10V
VGS(th) (normalized)
Tj (OC)
1.5
1.3
1.1
0.9
0.7
RDS(ON) (normalized)
2.2
1.8
1.4
1.0
0.6
VTH @ -1.0 mA
RDS(ON) @ -10V, -0.1A
-50 0 50 100 150
FIGURE 2-5: VGS(th) and RDS(ON)
Variation with Temperature.
VGS (volts)
QG (nanocoulombs)
0 1.0 2.0 3.0
-10
-8.0
-6.0
-4.0
-2.0
0
ID = -100mA
VDS = -20V VDS = -40V
FIGURE 2-6: Gate Drive Dynamic
Characteristics.
2016 Microchip Technology Inc. DS20005569A-page 5
VP2450
FIGURE 2-7:
ID (amperes)
VDS (volts)
-1.0
-0.8
-0.6
-0.4
-0.2
0
0 -10 -20 -30 -40 -50
VGS = -10V
VGS = -4.5V
VGS = -3.5V
VGS = -6.0V
Output Characteristics.
G
FS
(siemens)
I
D
(milliamperes)
1.0
0.8
0.6
0.4
0.2
00 -100 -200 -300 -400 -500
V
DS
= -20V
T
A
= -55
O
C
25
O
C
125
O
C
FIGURE 2-8: Transconductance vs. Drain
Current.
ID (amperes)
VDS (volts)
-1.0 -10 -100 -1000
-1.0
-0.1
-0.01
-0.001
TO-243AA (DC)
TO-92 (DC)
TO-243AA (pulsed)
TO-92 (pulsed)
TA = 25OC
FIGURE 2-9: Maximum Rated Safe
Operating Area.
FIGURE 2-10:
ID (amperes)
VDS (volts)
-0.6
-0.5
-0.4
-0.3
-0.2
-0.1
00 -2.0 -4.0 -6.0 -8.0 -10
VGS = -10V
VGS = -4.5V
VGS = -3.5V
VGS = -6.0V
Saturation Characteristics.
FIGURE 2-11: Power Dissipation vs. Case
Temperature.
Thermal Resistance (normalized)
tP (seconds)
0.001 0.01 0.1 1.0 10
1.0
0.8
0.6
0.4
0.2
0
TO-243AA
TA = 25OC
PD = 1.6W
TO-92
TC = 25OC
PD = 1.0W
FIGURE 2-12: Thermal Response
Characteristics.
VP2450
DS20005569A-page 6 2016 Microchip Technology Inc.
3.0 PIN DESCRIPTION
The details on the pins of VP2450 (TO-92 and SOT-89)
are listed on Ta ble 3-1. Refer to Package Types for the
location of pins.
TABLE 3-1: PIN FUNCTION TABLE
TO-92
Pin Number
SOT-89
Pin Number Pin Name Description
1 3 Source Source
2 1 Gate Gate
32,4 Drain Drain
2016 Microchip Technology Inc. DS20005569A-page 7
VP2450
4.0 FUNCTIONAL DESCRIPTION
Figure 4-1 illustrates the switching waveforms and test
circuit for VP2450.
90%
10%
90% 90%
10%
10%
Pulse
Generator
VDD
RL
OUTPUT
D.U.T.
t(ON)
t
d(ON)
t
(OFF)
t
d(OFF)
t
f
t
r
INPUT
RGEN
INPUT
OUTPUT
0V
VDD
0V
-10V
FIGURE 4-1: Switching Waveforms and Test Circuit.
PRODUCT SUMMARY
BVDSS/BVDGS
(V)
RDS(ON)
(Maximum)
(Ω)
ID(ON)
(Minimum)
(mA)
VGS(th)
(Maximum)
(V)
–500 30 –200 –0.4
VP2450
DS20005569A-page 8 2016 Microchip Technology Inc.
5.0 PACKAGING INFORMATION
5.1 Package Marking Information
Legend: XX...X Product Code or Customer-specific information
Y Year code (last digit of calendar year)
YY Year code (last 2 digits of calendar year)
WW Week code (week of January 1 is week ‘01’)
NNN Alphanumeric traceability code
Pb-free JEDEC® designator for Matte Tin (Sn)
*This package is Pb-free. The Pb-free JEDEC designator ( )
can be found on the outer packaging for this package.
Note: In the event the full Microchip part number cannot be marked on one line, it will
be carried over to the next line, thus limiting the number of available
characters for product code or customer-specific information. Package may or
not include the corporate logo.
3
e
3
e
3-lead TO-92
YWWNNN
XXXXXX
XXXX e3
Example
616343
VP2450
N3 e3
3-lead SOT-89 Example
XXXXYWW
NNN
VP4E612
343
Note: For the most current package drawings, see the Microchip Packaging Specification at www.microchip.com/packaging.
2016 Microchip Technology Inc. DS20005569A-page 9
VP2450
3-Lead TO-243AA (SOT-89) Package Outline (N8)
Symbol A b b1 C D D1 E E1 e e1 H L
Dimensions
(mm)
MIN 1.40 0.44 0.36 0.35 4.40 1.62 2.29 2.00†
1.50
BSC
3.00
BSC
3.94 0.73†
NOM-------- --
MAX 1.60 0.56 0.48 0.44 4.60 1.83 2.60 2.29 4.25 1.20
JEDEC Registration TO-243, Variation AA, Issue C, July 1986.
† This dimension differs from the JEDEC drawing
Drawings not to scale.
bb1
D
D1
EHE1
C
A
12 3
e
e1
Top View Side View
L
Note: For the most current package drawings, see the Microchip Packaging Specification at www.microchip.com/packaging.Note: For the most current package drawings, see the Microchip Packaging Specification at www.microchip.com/packaging.
VP2450
DS20005569A-page 10 2016 Microchip Technology Inc.
VP2450
DS20005569A-page 11 2016 Microchip Technology Inc.
APPENDIX A: REVISION HISTORY
Revision A (September 2016)
• Converted Supertex Doc# DSFP-VP2450 to
Microchip DS20005569A.
• Changed the “TO-243AA (SOT-89)” package to
“SOT-89.”
• Limited package options to TO-92 (1000/Bag) and
SOT-89 (2000/Reel).
• Made minor text changes throughout the docu-
ment.
2016 Microchip Technology Inc. DS20005569A-page 12
VP2450
PRODUCT IDENTIFICATION SYSTEM
To order or obtain information, e.g., on pricing or delivery, contact your local Microchip representative or sales office.
Examples:
a) VP2450N3-G: P-Channel Enhancement-Mode
Vertical DMOS FET, 3-lead
TO-92 Package, 1000/Bag
b) VP2450N8-G: P-Channel Enhancement-Mode
Vertical DMOS FET, 3-lead
SOT-89 Package, 2000/Reel
PART NO.
Device
Device: VP2450 = P-Channel Enhancement-Mode Vertical
DMOS FET
Packages: N3 = 3-lead TO-92
N8 = 3-lead SOT-89
Environmental: G = Lead (Pb)-free/RoHS-compliant Package
Media Type: (Blank) = 1000/Bag for an N3 Package
2000/Reel for an N8 Package
XX
Package
-
X - X
Environmental
Media Type
Options
2016 Microchip Technology Inc. DS20005569A-page 13
Information contained in this publication regarding device
applications and the like is provided only for your convenience
and may be superseded by updates. It is your responsibility to
ensure that your application meets with your specifications.
MICROCHIP MAKES NO REPRESENTATIONS OR
WARRANTIES OF ANY KIND WHETHER EXPRESS OR
IMPLIED, WRITTEN OR ORAL, STATUTORY OR
OTHERWISE, RELATED TO THE INFORMATION,
INCLUDING BUT NOT LIMITED TO ITS CONDITION,
QUALITY, PERFORMANCE, MERCHANTABILITY OR
FITNESS FOR PURPOSE. Microchip disclaims all liability
arising from this information and its use. Use of Microchip
devices in life support and/or safety applications is entirely at
the buyer’s risk, and the buyer agrees to defend, indemnify and
hold harmless Microchip from any and all damages, claims,
suits, or expenses resulting from such use. No licenses are
conveyed, implicitly or otherwise, under any Microchip
intellectual property rights unless otherwise stated.
Trademarks
The Microchip name and logo, the Microchip logo, AnyRate,
dsPIC, FlashFlex, flexPWR, Heldo, JukeBlox, KeeLoq,
KeeLoq logo, Kleer, LANCheck, LINK MD, MediaLB, MOST,
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RightTouch, SpyNIC, SST, SST Logo, SuperFlash and UNI/O
are registered trademarks of Microchip Technology
Incorporated in the U.S.A. and other countries.
ClockWorks, The Embedded Control Solutions Company,
ETHERSYNCH, Hyper Speed Control, HyperLight Load,
IntelliMOS, mTouch, Precision Edge, and QUIET-WIRE are
registered trademarks of Microchip Technology Incorporated
in the U.S.A.
Analog-for-the-Digital Age, Any Capacitor, AnyIn, AnyOut,
BodyCom, chipKIT, chipKIT logo, CodeGuard, dsPICDEM,
dsPICDEM.net, Dynamic Average Matching, DAM, ECAN,
EtherGREEN, In-Circuit Serial Programming, ICSP, Inter-Chip
Connectivity, JitterBlocker, KleerNet, KleerNet logo, MiWi,
motorBench, MPASM, MPF, MPLAB Certified logo, MPLIB,
MPLINK, MultiTRAK, NetDetach, Omniscient Code
Generation, PICDEM, PICDEM.net, PICkit, PICtail,
PureSilicon, RightTouch logo, REAL ICE, Ripple Blocker,
Serial Quad I/O, SQI, SuperSwitcher, SuperSwitcher II, Total
Endurance, TSHARC, USBCheck, VariSense, ViewSpan,
WiperLock, Wireless DNA, and ZENA are trademarks of
Microchip Technology Incorporated in the U.S.A. and other
countries.
SQTP is a service mark of Microchip Technology Incorporated
in the U.S.A.
Silicon Storage Technology is a registered trademark of
Microchip Technology Inc. in other countries.
GestIC is a registered trademarks of Microchip Technology
Germany II GmbH & Co. KG, a subsidiary of Microchip
Technology Inc., in other countries.
All other trademarks mentioned herein are property of their
respective companies.
© 2016, Microchip Technology Incorporated, Printed in the
U.S.A., All Rights Reserved.
ISBN: 978-1-5224-0991-5
Note the following details of the code protection feature on Microchip devices:
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• Microchip believes that its family of products is one of the most secure families of its kind on the market today, when used in the
intended manner and under normal conditions.
• There are dishonest and possibly illegal methods used to breach the code protection feature. All of these methods, to our
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• Microchip is willing to work with the customer who is concerned about the integrity of their code.
• Neither Microchip nor any other semiconductor manufacturer can guarantee the security of their code. Code protection does not
mean that we are guaranteeing the product as “unbreakable.”
Code protection is constantly evolving. We at Microchip are committed to continuously improving the code protection features of our
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allow unauthorized access to your software or other copyrighted work, you may have a right to sue for relief under that Act.
Microchip received ISO/TS-16949:2009 certification for its worldwide
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QUALITYMANAGEMENTS
YSTEM
CERTIFIEDBYDNV
== ISO/TS16949==
DS20005569A-page 14 2016 Microchip Technology Inc.
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