Rev.2.2_00
LOW VOLTAGE OPERATION
CMOS SERIAL E2PROM S-93L76A
Seiko Instruments Inc. 1
The S-93L76A is a low voltage operating, high
speed, low current consumption, 8 K-bit serial
E2PROM with a wide operating voltage range. It is
organized as 512-word × 16-bit respectively. Each is
capable of sequential read, at which time addresses
are automatically incremented in 16-bit blocks.
Features
Low current consumption Standby: 2.0 µA Max. (VCC = 5.5 V)
Operating: 0.8 mA Max. (VCC = 5.5 V)
0.4 mA Max. (VCC = 2.5 V)
Wide operating voltage range Read: 1.6 to 5.5 V
Write: 1.8 to 5.5 V (WRITE, ERASE)
2.7 to 5.5 V (WRAL, ERAL)
Sequential read capable
Write disable function when power supply voltage is low
Endurance: 107 cycles/word* (at +25°C) write capable,
106 cycles/word* (at +85°C)
* For each address (Word: 16 bits)
Data retention: 10 years (after rewriting 106 cycles/word at +85°C)
S-93L76A: 8 K-bit
Lead-free products
Packages
Package name Drawing code
Package Tape Reel Land
SNT-8A PH008-A PH008-A PH008-A PH008-A
8-Pin SOP(JEDEC) FJ008-A FJ008-D FJ008-D
8-Pin TSSOP FT008-A FT008-E FT008-E
Caution This product is intended to use in general electronic devices such as consumer electronics,
office equipment, and communications devices. Before using the product in medical
equipment or automobile equipment including car audio, keyless entry and engine control
unit, contact to SII is indispensable.
LOW VOLTAGE OPERATION CMOS SERIAL E2PROM
S-93L76A Rev.2.2_00
Seiko Instruments Inc.
2
Pin Assignment
SNT-8A
Top view
Table 1
Pin Number Pin Name Function
1 NC
No connection
2 VCC
Power supply
3 SK
Serial clock input
4 CS
Chip select input
5 DO
Serial data output
6 DI
Serial data input
7 TEST*1 Test
8 GND Ground
*1. Connect to GND or VCC.
Even if this pin is not connected, performance is not affected
so long as the absolute maximum rating is not exceeded.
1
2
3
4
8
7
6
5
GND
TEST
DI
DO
NC
VCC
SK
CS
Figure 1
S-93L76AD0I-I8T1G
Remark See Dimensions for details of the package drawings.
8-Pin SOP(JEDEC)
Top view
Table 2
Pin Number Pin Name Function
1 CS
Chip select input
2 SK
Serial clock input
3 DI
Serial data input
4 DO
Serial data output
5 GND
Ground
6 TEST*1 Test
7 NC No connection
8 VCC Power supply
*1. Connect to GND or VCC.
Even if this pin is not connected, performance is not affected
so long as the absolute maximum rating is not exceeded.
1
2
3
4
8
7
6
5
VCC
NC
TEST
GND
CS
SK
DO
DI
Figure 2
S-93L76AD0I-J8T1G
Remark See Dimensions for details of the package drawings.
LOW VOLTAGE OPERATION CMOS SERIAL E2PROM
Rev.2.2_00 S-93L76A
Seiko Instruments Inc. 3
8-Pin TSSOP
Top view
Table 3
Pin Number Pin Name Function
1 CS
Chip select input
2 SK
Serial clock input
3 DI
Serial data input
4 DO
Serial data output
5 GND
Ground
6 TEST*1 Test
7 NC No connection
8 VCC Power supply
*1. Connect to GND or VCC.
Even if this pin is not connected, performance is not affected
so long as the absolute maximum rating is not exceeded.
1
2
3
4
8
7
6
5
VCC
NC
TEST
GND
CS
SK
DO
DI
Figure 3
S-93L76AD0I-T8T1G
Remark See Dimensions for details of the package drawings.
LOW VOLTAGE OPERATION CMOS SERIAL E2PROM
S-93L76A Rev.2.2_00
Seiko Instruments Inc.
4
Block Diagram
Memory array
Data register
Address
decoder
Mode decode logic
Output buffer
VCC
GND
DO
DI
CS
Clock generator
SK Voltage detector
Figure 4
Instruction Sets
Table 4
Instruction Start Bit Operation Code Address Data
SK input clock 1 2 3 4 5 6 7 8 9 10 11 12 13 14 to 29
READ (Read data) 1 1 0 x A8 A7 A6 A5 A4 A3 A2 A1 A0 D15 to D0
Output
*1
WRITE (Write data)
1 0 1 x A8 A7 A6 A5 A4 A3 A2 A1 A0 D15 to D0 Input
ERASE (Erase data) 1 1 1 x A8 A7 A6 A5 A4 A3 A2 A1 A0
WRAL (Write all) 1 0 0 0 1 x x x x x x x x D15 to D0 Input
ERAL (Erase all) 1 0 0 1 0 x x x x x x x x
EWEN (Write enable) 1 0 0 1 1 x x x x x x x x
EWDS (Write disable) 1 0 0 0 0 x x x x x x x x
*1. When the 16-bit data in the specified address has been output, the data in the next address is output.
Remark x: Doesn’t matter
LOW VOLTAGE OPERATION CMOS SERIAL E2PROM
Rev.2.2_00 S-93L76A
Seiko Instruments Inc. 5
Absolute Maximum Ratings
Table 5
Parameter Symbol Ratings Unit
Power supply voltage VCC 0.3 to +7.0 V
Input voltage VIN 0.3 to VCC +0.3 V
Output voltage VOUT 0.3 to VCC V
Operating ambient temperature Topr 40 to +85 °C
Storage temperature Tstg 65 to +150 °C
Caution The absolute maximum ratings are rated values exceeding which the product could
suffer physical damage. These values must therefore not be exceeded under any
conditions.
Recommended Operating Conditions
Table 6
Parameter Symbol Conditions Min. Typ. Max. Unit
READ / EWDS 1.6
5.5
WRITE / ERASE / EWEN
1.8
5.5
Power supply voltage V
CC
WRAL / ERAL 2.7
5.5
V
V
CC
=
4.5 to 5.5 V 2.0
V
CC
V
V
CC
=
2.7 to 4.5 V 0.8
×
V
CC
V
CC
V
High level input voltage V
IH
V
CC
=
1.6 to 2.7 V 0.8
×
V
CC
V
CC
V
V
CC
=
4.5 to 5.5 V 0.0
0.8 V
V
CC
=
2.7 to 4.5 V 0.0
0.2
×
V
CC
V
Low level input voltage V
IL
V
CC
=
1.6 to 2.7 V 0.0
0.15
×
V
CC
V
Pin Capacitance
Table 7
(Ta = 25°C, f = 1.0 MHz,
V
CC
= 5.0 V)
Parameter Symbol Conditions Min. Typ. Max. Unit
Input Capacitance CIN VIN = 0 V 8 pF
Output Capacitance COUT VOUT = 0 V 10 pF
Endurance
Table 8
Parameter Symbol
Operation
Temperature Min. Typ. Max. Unit
Endurance NW 40 to +85°C 106 cycles/word*
* For each address (Word: 16 bits)
LOW VOLTAGE OPERATION CMOS SERIAL E2PROM
S-93L76A Rev.2.2_00
Seiko Instruments Inc.
6
DC Electrical Characteristics
Table 9
V
CC
=
4.5 to 5.5 V V
CC
=
2.5 to 4.5 V V
CC
=
1.6 to 2.5 V
Parameter Symbol Conditions Min. Typ. Max. Min. Typ. Max. Min. Typ. Max. Unit
Current consumption (READ) I
CC1
DO no load
0.8
0.5
0.4 mA
Table 10
Parameter V
CC
=
4.5 to 5.5 V V
CC
=
1.8 to 4.5 V
Symbol Conditions Min. Typ. Max. Min. Typ. Max. Unit
Current consumption (WRITE) I
CC2
DO no load
2.0
1.5 mA
Table 11
V
CC
=
4.5 to 5.5 V V
CC
=
2.5 to 4.5 V V
CC
=
1.6 to 2.5 V
Parameter
Symbol
Conditions Min. Typ. Max. Min. Typ. Max. Min. Typ. Max.
Unit
Standby
current
consumption
I
SB
CS
=
GND, DO
=
Open,
Other inputs to V
CC
or
GND
2.0
2.0
2.0
µ
A
Input leakage
current I
LI
V
IN
=
GND to V
CC
0.1 1.0
0.1 1.0
0.1 1.0
µ
A
Output
leakage
current
I
LO
V
OUT
=
GND to V
CC
0.1 1.0
0.1 1.0
0.1 1.0
µ
A
I
OL
=
2.1 mA
0.4
V
Low level
output voltage V
OL
I
OL
=
100
µ
A
0.1
0.1
0.1 V
I
OH
=
400
µ
A 2.4
V
I
OH
=
100
µ
A V
CC
0.3
V
CC
0.3
V
High level
output voltage V
OH
I
OH
=
10
µ
A V
CC
0.2
V
CC
0.2
V
CC
0.2
V
Write enable
latch data hold
voltage
V
DH
Only when write
disable mode 1.5
1.5
1.5
V
LOW VOLTAGE OPERATION CMOS SERIAL E2PROM
Rev.2.2_00 S-93L76A
Seiko Instruments Inc. 7
AC Electrical Characteristics
Table 12 Measurement Conditions
Input pulse voltage 0.1 × VCC to 0.9 × VCC
Output reference voltage 0.5 × VCC
Output load 100 pF
Table 13
VCC = 4.5 to 5.5 V VCC = 2.5 to 4.5 V VCC = 1.6 to 2.5 V
Parameter Symbol
Min. Typ. Max. Min. Typ. Max. Min. Typ. Max. Unit
CS setup time tCSS 0.2 — 0.4 — 1.0 — µs
CS hold time tCSH 0 — 0 — 0 — µs
CS deselect time tCDS 0.2 — 0.2 — 0.4 — µs
Data setup time tDS 0.1 — 0.2 — 0.4 — µs
Data hold time tDH 0.1 — 0.2 — 0.4 — µs
Output delay time tPD — 0.4 — 0.8 — — 2.0 µs
Clock frequency fSK 0 — 2.0 0 — 1.0 0 — 0.25 MHz
Clock pulse width tSKL, tSKH 0.1 — — 0.25 — — 1.0 — — µs
Output disable time tHZ1, tHZ2 0 — 0.15 0 — 0.5 0 — 1.0 µs
Output enable time tSW 0 — 0.15 0 — 0.5 0 1.0 µs
Table 14
VCC = 1.8 to 5.5 V
Parameter Symbol
Min. Typ. Max.
Unit
Write time tPR 4.0 10.0 ms
Hi-
Z
Hi-
Z
tSKH
tCDS
tCSS
CS
Valid data
DI
tSKL
SK
tSV tHZ2
tCSH
tPD tPD
tDS tDH
Hi-
Z
DO
DO
(READ)
(VERIFY)
Hi-Z
Valid data
tDS tDH
tHZ1
Figure 5 Timing Chart
LOW VOLTAGE OPERATION CMOS SERIAL E2PROM
S-93L76A Rev.2.2_00
Seiko Instruments Inc.
8
Operation
All instructions are executed by making CS “H” and then inputting DI at the rising edge of the SK pulse. An
instruction is input in the order of its start bit, instruction, address, and data. The start bit is recognized
when “H” of DI is input at the rising edge of SK after CS has been made “H”. As long as DI remains “L”,
therefore, the start bit is not recognized even if the SK pulse is input after CS has been made “H”. The SK
clock input while DI is “L” before the start bit is input is called a dummy clock. By inserting as many dummy
clocks as required before the start bit, the number of clocks the internal serial interface of the CPU can
send out and the number of clocks necessary for operation of the serial memory IC can be adjusted.
Inputting the instruction is complete when CS is made “L”. CS must be made “L” once during the period of
tCDS in between instructions.
“L” of CS indicates a standby status. In this status, input of SK and DI is invalid, and no instruction is
accepted.
1. Reading (READ)
The READ instruction is used to read the data at a specified address. When this instruction is
executed, the address A0 is input at the rising edge of SK and the DO pin, which has been in a high-
impedance (Hi-Z) state, outputs “L”. Subsequently, 16 bits of data are sequentially output at the rising
edge of SK.
If SK is output after the 16-bit data of the specified address has been output, the address is
automatically incremented, and the 16-bit data of the next address is then output. By inputting SK
sequentially with CS kept at “H”, the data of the entire memory space can be read. When the address
is incremented from the last address (A8 … A1 A0 = 1 … 1 1), it returns to the first address (A8 … A1 A0
= 0 … 0 0).
A
8
A
7
A
6
A
5
A
4
A
3
A
2
A
1
A
0
+1 A
8
A
7
A
6
A
5
A
4
A
3
A
2
A
1
A
0
+2
CS
1 3 4 5 6 7 8 9
10 11 12 13 14 15 16
2
26 27 28 29 30 31 42 43 44 45 46 32 48
SK
1 1 X 0 A
8
A
7
A
6
A
5
A
4
A
3
A
2
A
1
A
0
DI
0
D
15
D
14
D
13
D
15
D
14
D
13
D
2
D
1
D
0
D
15
D
14
D
13
D
2
D
1
D
0
Hi
-
Z
DO
Hi
-
Z
47
Figure 6 Read Timing
LOW VOLTAGE OPERATION CMOS SERIAL E2PROM
Rev.2.2_00 S-93L76A
Seiko Instruments Inc. 9
2. Writing (WRITE, ERASE, WRAL, ERAL)
Write instructions (WRITE, ERASE, WRAL, and ERAL) are used to start writing data to the non-volatile
memory by making CS “L” after the specified number of clocks has been input.
The write operation is completed within the write time tPR (10 ms) no matter which write instruction is
used. The typical write time is less than half 10 ms. If the end of the write operation is known,
therefore, the write cycle can be minimized. To ascertain the end of a write operation, make CS “L” to
start the write operation and then make CS “H” again to check the status of the DO output pin. This
series of operations is called a verify operation.
If DO outputs “L” during the verify operation period in which CS is “H”, it indicates that a write operation
is in progress. If DO outputs “H”, it indicates that the write operation is finished. The verify operation
can be executed as many times as required. This operation can be executed in two ways. One is
detecting the positive transition of DO output from “L” to “H” while holding CS at “H”. The other is
detecting the positive transition of DO output from “L” to “H” by making CS “H” once and checking DO
output, and then returning CS to “L”.
During the write period, SK and DI are invalid. Do not input any instructions during this period. Input an
instruction while the DO pin is outputting “H” or is in a high-impedance state. Even while the DO pin is
outputing “H”, DO immediately goes into a high-impedance (Hi-Z) state if “H” of DI (start bit) is input at
the rising edge of SK.
Keep DI “L” during the verify operation period.
2.1 Writing data (WRITE)
This instruction is used to write 16-bit data to a specified address.
After making CS “H”, input a start bit, the WRITE instruction, an address, and 16-bit data. If data of
more than 16 bits is input, the written data is sequentially shifted at each clock, and the 16 bits input
last are the valid data. The write operation is started when CS is made “L”. It is not necessary to
set data to “1” before it is written.
DO
<1>
2
3
4
5
6 7 8 9 10 11 12 13 14 29
0 1 X A8 A7 A6 A5 A4 A3 A2 A1 A0 D15 D0
DI
SK
CS
Hi-Z
t
CDS
t
SV
t
PR
Bus
y
Ready
Stand b
y
Hi-
Z
t
HZ1
Verif
y
1
Figure 7 Data Write Timing
LOW VOLTAGE OPERATION CMOS SERIAL E2PROM
S-93L76A Rev.2.2_00
Seiko Instruments Inc.
10
2.2 Erasing data (ERASE)
This instruction is used to erase specified 16-bit data. All the 16 bits of the data are “1”. After
making CS “H”, input a start bit, the ERASE instruction, and an address. It is not necessary to input
data. The data erase operation is started when CS is made “L”.
DO
<1>
2
3
4
5
678910 11 12 13
1 1 X A8 A7 A6 A5 A4 A3 A2 A1 A0
DI
SK
CS
Hi-Z
t
CDS
t
SV
t
PR
Bus
y
Read
y
Stand b
y
Hi-
Z
t
HZ1
Verif
y
1
Figure 8 Data Erase Timing
2.3 Writing to chip (WRAL)
This instruction is used to write the same 16-bit data to the entire address space of the memory.
After making CS “H”, input a start bit, the WRAL instruction, an address, and 16-bit data. Any
address may be input. If data of more than 16 bits is input, the written data is sequentially shifted at
each clock, and the 16-bit data input last is the valid data. The write operation is started when CS
is made “L”. It is not necessary to set the data to “1” before it is written.
DO
<1>
2
3
4
5
6 7 8 9 10 11 12 13 14 29
0 0 0 1 D15 D0
DI
SK
CS
Hi-Z
t
CDS
t
SV
t
PR
Bus
y
Ready
Stand b
y
Hi-
Z
t
HZ1
Verif
y
1
8Xs
Figure 9 Chip Write Timing
2.4 Erasing chip (ERAL)
This instruction is used to erase the data of the entire address space of the memory.
All the data is “1”. After making CS “H”, input a start bit, the ERAL instruction, and an address. Any
address may be input. It is not necessary to input data. The chip erase operation is started when
CS is made “L”.
DO
<1>
2
3
4
5
6
7 8 9 10 11 12 13
0 0 1 0
DI
SK
CS
Hi-Z
t
CDS
t
SV
t
PR
Busy
Read
y
Stand b
y
Hi-
Z
t
HZ1
Verif
y
1
8Xs
Figure 10 Chip Erase Timing
LOW VOLTAGE OPERATION CMOS SERIAL E2PROM
Rev.2.2_00 S-93L76A
Seiko Instruments Inc. 11
3. Write enable (EWEN) and write disable (EWDS)
The EWEN instruction is used to enable a write operation. The status in which a write operation is
enabled is called the program-enabled mode.
The EWDS instruction is used to disable a write operation. The status in which a write operation is
disabled is called the program-disabled mode.
The write operation is disabled upon power application and detection of a low supply voltage. To
prevent an unexpected write operation due to external noise or a CPU malfunctions, it should be kept in
write disable mode except when performing write operations, after power-on and before shutdown.
<1>
2
3
45678910 11 12 13
0 0
DI
SK
CS
11=EWEN
00=EWDS
Stand by
1
8Xs
Figure 11 Write Enable/Disable Timing
Start Bit
A start bit is recognized by latching the high level of DI at the rising edge of SK after changing CS to high
(start bit recognition). A write operation begins by inputting the write instruction and setting CS to low.
Subsequently, by setting CS to high again, the DO pin outputs a low level if the write operation is still in
progress and a high level if the write operation is complete (verify operation). Therefore, only after a write
operation, in order to input the next command, CS is set to high, which switches the DO pin from a high-
impedance state (Hi-Z) to a data output state. However, if start bit is recognized, the DO pin returns to the
high-impedance state (refer to Figure 5 Timing Chart).
Make sure that data output from the CPU does not interfere with the data output from the serial memory IC
when configuring a 3 -wire interface by connecting the DI input pin and DO output pin, as such interference
may cause a start bit fetch problem. Take the measures described in “ 3-Wire Interface (Direct
Connection between DI and DO)”.
LOW VOLTAGE OPERATION CMOS SERIAL E2PROM
S-93L76A Rev.2.2_00
Seiko Instruments Inc.
12
Write Disable Function when Power Supply Voltage is Low
The S-93L76A provides a built-in detector to detect a low power supply voltage and disable writing. When
the power supply voltage is low or at power application, the write instructions (WRITE, ERASE, WRAL, and
ERAL) are cancelled, and the write disable state (EWDS) is automatically set. The detection voltage and
the release voltage are 1.4 V typ. (refer to Figure 12).
Therefore, when a write operation is performed after the power supply voltage has dropped and then risen
again up to the level at which writing is possible, a write enable instruction (EWEN) must be sent before a
write instruction (WRITE, ERASE, WRAL, or ERAL) is executed.
When the power supply voltage drops during a write operation, the data being written to an address at that
time is not guaranteed.
Release voltage (+VDET)
1.4 V Typ.
Power supply voltage
Detection voltage (VDET)
1.4 V Typ.
Write instruction cancelled
Write disable state (EWDS) automatically set
Figure 12 Operation when Power Supply Voltage is Low
LOW VOLTAGE OPERATION CMOS SERIAL E2PROM
Rev.2.2_00 S-93L76A
Seiko Instruments Inc. 13
3-Wire Interface (Direct Connection between DI and DO)
There are two types of serial interface configurations: a 4-wire interface configured using the CS, SK, DI,
and DO pins, and a 3-wire interface that connects the DI input pin and DO output pin.
When the 3-wire interface is employed, a period in which the data output from the CPU and the data output
from the serial memory collide may occur, causing a malfunction. To prevent such a malfunction, connect
the DI and DO pins of the S-93L76A via a resistor (10 k to 100 k) so that the data output from the CPU
takes precedence in being input to the DI pin (refer to Figure 13).
CPU
DI
SIO
DO
S-93L76
R: 10 k to 100 k
Figure 13 Connection of 3-Wire Interface
I/O Pins
1. Connection of input pins
All the input pins of the S-93L76A employ a CMOS structure, so design the equipment so that high
impedance will not be input while the S-93L76A is operating. Especially, deselect the CS input (a low level)
when turning on/off power and during standby. When the CS pin is deselected (a low level), incorrect data
writing will not occur. Connect the CS pin to GND via a resistor (10 k to 100 k pull-down resistor). To
prevent malfunction, it is recommended to use equivalent pull-down resistors for pins other than the CS pin.
2. Input and output pin equivalent circuits
The following shows the equivalent circuits of input pins of the S-93L76A. None of the input pins
incorporate pull-up and pull-down elements, so special care must be taken when designing to prevent a
floating status.
Output pins are high-level/low-level/high-impedance tri-state outputs. The TEST pin is disconnected from
the internal circuit by a switching transistor during normal operation. As long as the absolute maximum
rating is satisfied, the TEST pin and internal circuit will never be connected.
LOW VOLTAGE OPERATION CMOS SERIAL E2PROM
S-93L76A Rev.2.2_00
Seiko Instruments Inc.
14
2.1 Input pin
CS
Figure 14 CS Pin
SK, DI
Figure 15 SK, DI Pin
TEST
Figure 16 TEST Pin
LOW VOLTAGE OPERATION CMOS SERIAL E2PROM
Rev.2.2_00 S-93L76A
Seiko Instruments Inc. 15
2.2 Output pin
DO
Vcc
Figure 17 DO Pin
3. Input pin noise elimination time
The S-93L76A includes a built-in low-pass filter to eliminate noise at the SK, DI, and CS pins. This means
that if the supply voltage is 5.0 V (at room temperature), noise with a pulse width of 20 ns or less can be
eliminated.
Note, therefore, that noise with a pulse width of more than 20 ns will be recognized as a pulse if the voltage
exceeds VIH/VIL.
Precaution
Do not apply an electrostatic discharge to this IC that exceeds the performance ratings of the built-in
electrostatic protection circuit.
SII claims no responsibility for any and all disputes arising out of or in connection with any infringement of
the products including this IC upon patents owned by a third party.
LOW VOLTAGE OPERATION CMOS SERIAL E2PROM
S-93L76A Rev.2.2_00
Seiko Instruments Inc.
16
Characteristics
1. DC Characteristics
1.1 Current consumption (READ) ICC1
vs. ambient temperature Ta
1.2 Current consumption (READ) ICC1
vs. ambient temperature Ta
Ta (°C)
0.4
0.2
VCC = 5.5 V
fSK = 2 MHz
DATA = 0101
0 40 0 85
ICC1
(mA)
Ta
(
°C
)
0.4
0.2
VCC = 3.3 V
fSK = 500 kHz
DATA = 0101
040 085
ICC1
(mA)
1.3 Current consumption (READ) ICC1
vs. ambient temperature Ta
1.4 Current consumption (READ) ICC1
vs. power supply voltage VCC
ICC1
(mA)
Ta (°C)
0.4
0.2
VCC = 1.8 V
fSK = 10 kHz
DATA = 0101
0 40 0 85
1 MHz
500 kHz
ICC1
(mA)
0.4
0.2
0 2 3 4 5 6 7
Ta =25°C
fSK = 1 MHz, 500 kHz
DATA =0101
VCC (V)
1.5 Current consumption (READ) ICC1
vs. power supply voltage VCC
1.6 Current consumption (READ) ICC1
vs. Clock frequency fSK
100 kHz
10 kHz
ICC1
(mA)
0.4
0.2
0 2 3 4 5 67
VCC (V)
Ta = 25°C
fSK = 100 kHz, 10 kHz
DATA = 0101
ICC1
(
mA
)
0.4
0.2
0
VCC = 5.0 V
Ta = 25°C
1 M 2M 10M 10 k 100 k
f
SK
(
Hz
)
LOW VOLTAGE OPERATION CMOS SERIAL E2PROM
Rev.2.2_00 S-93L76A
Seiko Instruments Inc. 17
1.7 Current consumption (WRITE) ICC2
vs. ambient temperature Ta
1.8 Current consumption (WRITE) ICC2
vs. ambient temperature Ta
Ta (°C)
1.0
0.5
VCC = 5.5 V
0 40 0 85
ICC2
(mA)
ICC2
(mA)
Ta
(
°C
)
1.0
0.5
VCC = 3.3 V
040 0 85
1.9 Current consumption (WRITE) ICC2
vs. ambient temperature Ta
1.10 Current consumption (WRITE) ICC2
vs. power supply voltage VCC
Ta (°C)
1.0
0.5
VCC = 2.7 V
0 40 0 85
ICC2
(mA)
1.0
0.5
0 2 3 4 5 6 7
Ta = 25°C
VCC (V)
ICC2
(mA)
1.11 Current consumption in standby mode ISB
vs. ambient temperature Ta
1.12 Current consumption in standby mode ISB
vs. power supply voltage VCC
Ta (°C)
1.0
0.5
VCC = 5.5 V
CS = GND
0 40 0 85
ISB
(µA)
ISB
(µA)
1.0
0.5
02 3 4 5 6 7
Ta = 25°C
CS = GND
VCC
(
V
)
LOW VOLTAGE OPERATION CMOS SERIAL E2PROM
S-93L76A Rev.2.2_00
Seiko Instruments Inc.
18
1.13 Input leakage current ILI
vs. ambient temperature Ta
1.14 Input leakage current ILI
vs. ambient temperature Ta
1.0
0.5
VCC = 5.5 V
CS, SK, DI,
TEST = 0 V
0
40 0 85
ILI
(µA)
Ta (°C)
Ta (°C)
1.0
0.5
0 40 0 85
VCC = 5.5 V
CS, SK, DI,
TEST = 5.5 V
ILI
(µA)
1.15 Output leakage current ILO
vs. ambient temperature Ta
1.16 Output leakage current ILO
vs. ambient temperature Ta
Ta (°C)
1.0
0.5
VCC = 5.5 V
DO = 0 V
0 40 0 85
ILO
(µA)
Ta (°C)
1.0
0.5
VCC = 5.5 V
DO = 5.5 V
040 085
ILO
(µA)
1.17 High-level output voltage VOH
vs. ambient temperature Ta
1.18 High-level output voltage VOH
vs. ambient temperature Ta
Ta (°C)
4.6
4.4
VCC = 4.5 V
IOH = 400 µA
40 0 85
V
OH
(V)
4.2
Ta (°C)
2.7
2.6
VCC = 2.7 V
IOH = 100
µ
A
40 0 85
VOH
(V)
2.5
LOW VOLTAGE OPERATION CMOS SERIAL E2PROM
Rev.2.2_00 S-93L76A
Seiko Instruments Inc. 19
1.19 High-level output voltage VOH
vs. ambient temperature Ta
1.20 High-level output voltage VOH
vs. ambient temperature Ta
Ta (°C)
2.5
2.4
VCC = 2.5 V
IOH = 100
µ
A
40 0 85
VOH
(V)
2.3
Ta (°C)
1.9
1.8
VCC = 1.8 V
IOH = 10 µA
40 085
VOH
(V)
1.7
1.21 Low-level output voltage VOL
vs. ambient temperature Ta
1.22 Low-level output voltage VOL
vs. ambient temperature Ta
Ta (°C)
0.3
0.2
VCC = 4.5 V
IOL = 2.1 mA
40 0 85
V
OL
(V)
0.1
Ta (°C)
0.03
0.02
VCC = 1.8 V
IOL = 100
µ
A
40 0 85
VOL
(V)
0.01
1.23 High-level output current IOH
vs. ambient temperature Ta
1.24 High-level output current IOH
vs. ambient temperature Ta
Ta (°C)
20.0
10.0
VCC = 4.5 V
VOH = 2.4 V
0 40 0 85
IOH
(mA)
Ta (°C)
2
1
VCC = 2.7 V
VOH = 2.4 V
040 085
IOH
(mA)
LOW VOLTAGE OPERATION CMOS SERIAL E2PROM
S-93L76A Rev.2.2_00
Seiko Instruments Inc.
20
1.25 High-level output current IOH
vs. ambient temperature Ta
1.26 High-level output current IOH
vs. ambient temperature Ta
Ta (°C)
2
1
VCC = 2.5 V
VOH = 2.2 V
0
40 0 85
IOH
(mA)
Ta (°C)
1.0
0.5
VCC = 1.8 V
VOH = 1.6 V
0
40 0 85
IOH
(mA)
1.27 Low-level output current IOL
vs. ambient temperature Ta
1.28 Low-level output current IOL
vs. ambient temperature Ta
Ta
(
°C
)
20
10
VCC = 4.5 V
VOL = 0.4 V
0
40 0 85
IOL
(mA)
Ta (°C)
1.0
0.5
VCC = 1.8 V
VOL = 0.1 V
040 085
IOL
(mA)
1.29 Input inverted voltage VINV
vs. power supply voltage VCC
1.30 Input inverted voltage VINV
vs. ambient temperature Ta
3.0
1.5
0 1 2 3 4 5 6
Ta = 25°C
CS, SK, DI
VCC (V)
VINV
(V)
7
Ta (°C)
3.0
2.0
VCC = 5.0 V
CS, SK, DI
040 085
VINV
(
V
)
LOW VOLTAGE OPERATION CMOS SERIAL E2PROM
Rev.2.2_00 S-93L76A
Seiko Instruments Inc. 21
1.31 Low supply voltage detection voltage VDET
vs. ambient temperature Ta
1.32 Low supply voltage release voltage +VDET
vs. ambient temperature Ta
Ta (°C)
2.0
1.0
0
-40 0 85
-VDET
(V)
Ta (°C)
2.0
1.0
0-40 085
+VDET
(V)
2. AC Characteristics
2.1 Maximum operating frequency fmax
vs. power supply voltage VCC
2.2 Write time tPR
vs. power supply voltage VCC
10k
2 3 4 5
Ta = 25°C
VCC (V)
f
max.
(Hz)
1
100k
1M
2M
4
2
234 56 7
Ta = 25°C
VCC (V)
tPR
(ms)
1
2.3 Write time tPR
vs. ambient temperature Ta
2.4 Write time tPR
vs. ambient temperature Ta
Ta (°C)
6
4
VCC = 5.0 V
40 0 85
2
tPR
(ms)
Ta
(
°C
)
6
4
VCC = 3.0 V
40 085
2
t
PR
(ms)
LOW VOLTAGE OPERATION CMOS SERIAL E2PROM
S-93L76A Rev.2.2_00
Seiko Instruments Inc.
22
2.5 Write time tPR
vs. ambient temperature Ta
2.6 Data output delay time tPD
vs. ambient temperature Ta
Ta (°C)
6
4
VCC = 2.7 V
40 0 85
2
t
PR
(ms)
Ta (°C)
0.3
0.2
VCC = 4.5 V
40 0 85
0.1
tPD
(µs)
2.7 Data output delay time tPD
vs. ambient temperature Ta
2.8 Data output delay time tPD
vs. ambient temperature Ta
Ta (°C)
0.6
0.4
VCC = 2.7 V
40 0 85
0.2
tPD
(µs)
Ta (°C)
1.5
1.0
VCC = 1.8 V
40 0 85
0.5
tPD
(µs)
LOW VOLTAGE OPERATION CMOS SERIAL E2PROM
Rev.2.2_00 S-93L76A
Seiko Instruments Inc. 23
Product Name Structure
IC direction in tape specification
I8T1 : SNT-8A, Tape
J8T1 : 8-Pin SOP(JEDEC), Tape
T8T1 : 8-Pin TSSOP, Tape
Fixed
Product name
S-93L76A : 8K-bit
S-93L76A D0I xxxx G
1.97±0.03
0.2±0.05
0.48±0.02
0.08
No.
TITLE
SCALE
UNIT mm
Seiko Instruments Inc.
SNT-8A-A-PKG Dimensions
PH008-A-P-SD-2.0
No. PH008-A-P-SD-2.0
0.5
+0.05
-0.02
123 4
56
78
No.
TITLE
SCALE
UNIT mm
Seiko Instruments Inc.
PH008-A-C-SD-1.0
SNT-8A-A-Carrier Tape
No. PH008-A-C-SD-1.0
Feed direction
4.0±0.1
2.0±0.05
4.0±0.1
ø1.5 +0.1
-0
ø0.5±0.1
2.25±0.05
0.65±0.05
0.25±0.05
2134
7865
12.5max.
9.0±0.3
ø13±0.2
(60°) (60°)
Enlarged drawing in the central part
QTY.
PH008-A-R-SD-1.0
No.
TITLE
SCALE
UNIT mm
Seiko Instruments Inc.
SNT-8A-A-Reel
No. PH008-A-R-SD-1.0
5,000
No.
TITLE
SCALE
UNIT mm
SNT-8A-A-Land Recommendation
Seiko Instruments Inc.
PH008-A-L-SD-3.0
0.3
0.20.3
0.20.3
0.52
2.01
0.52
No. PH008-A-L-SD-3.0
0.3 0.2
Caution Making the wire pattern under the package is possible. However, note that the package
may be upraised due to the thickness made by the silk screen printing and of a solder
resist on the pattern because this package does not have the standoff.
No. FJ008-A-P-SD-2.1
No.
TITLE
SCALE
UNIT mm
SOP8J-D-PKG Dimensions
Seiko Instruments Inc.
FJ008-A-P-SD-2.1
0.4±0.05
1.27
0.20±0.05
5.02±0.2
14
85
No.
TITLE
SCALE
UNIT mm
5
8
1
4
ø2.0±0.05
ø1.55±0.05 0.3±0.05
2.1±0.1
8.0±0.1
5°max.
6.7±0.1
2.0±0.05
Seiko Instruments Inc.
Feed direction
4.0±0.1(10 pitches:40.0±0.2)
SOP8J-D-Carrier Tape
No. FJ008-D-C-SD-1.1
FJ008-D-C-SD-1.1
No.
TITLE
SCALE
UNIT mm
QTY. 2,000
2±0.5
13.5±0.5
60°
2±0.5
ø13±0.2
ø21±0.8
Seiko Instruments Inc.
Enlarged drawing in the central part
SOP8J-D-Reel
No. FJ008-D-R-SD-1.1
FJ008-D-R-SD-1.1
No.
TITLE
SCALE
UNIT mm
Seiko Instruments Inc.
TSSOP8-E-PKG Dimensions
No. FT008-A-P-SD-1.1
FT008-A-P-SD-1.1
0.17±0.05
3.00 +0.3
-0.2
0.65
0.2±0.1
14
5
8
No.
TITLE
SCALE
UNIT mm
Seiko Instruments Inc.
ø1.55±0.05
2.0±0.05
8.0±0.1 ø1.55 +0.1
-0.05
(4.4)
0.3±0.05
1
45
8
4.0±0.1
Feed direction
TSSOP8-E-Carrier Tape
No. FT008-E-C-SD-1.0
FT008-E-C-SD-1.0
+0.4
-0.2
6.6
No.
TITLE
SCALE
UNIT mm
Seiko Instruments Inc.
Enlarged drawing in the central part
No. FT008-E-R-SD-1.0
2±0.5
ø13±0.5
ø21±0.8
13.4±1.0
17.5±1.0
3,000
QTY.
TSSOP8-E-Reel
FT008-E-R-SD-1.0
The information described herein is subject to change without notice.
Seiko Instruments Inc. is not responsible for any problems caused by circuits or diagrams described herein
whose related industrial properties, patents, or other rights belong to third parties. The application circuit
examples explain typical applications of the products, and do not guarantee the success of any specific
mass-production design.
When the products described herein are regulated products subject to the Wassenaar Arrangement or other
agreements, they may not be exported without authorization from the appropriate governmental authority.
Use of the information described herein for other purposes and/or reproduction or copying without the
express permission of Seiko Instruments Inc. is strictly prohibited.
The products described herein cannot be used as part of any device or equipment affecting the human
body, such as exercise equipment, medical equipment, security systems, gas equipment, or any apparatus
installed in airplanes and other vehicles, without prior written permission of Seiko Instruments Inc.
Although Seiko Instruments Inc. exerts the greatest possible effort to ensure high quality and reliability, the
failure or malfunction of semiconductor products may occur. The user of these products should therefore
give thorough consideration to safety design, including redundancy, fire-prevention measures, and
malfunction prevention, to prevent any accidents, fires, or community damage that may ensue.