ICS9112-31/32 Integrated Circuit Systems, Inc. Preliminary Product Preview Frequency Generator for Fibre Channel Systems General Description Features The ICS9112-31/32 are high-speed clock generators designed to support fibre channel system requirements. The ICS911231/32 generates 106.25 MHz from a 25 MHz crystal. * An exact frequency multiplying ratio ensures better than 100 ppm frequency accuracy using a standard AT crystal with external load capacitors (typically 33pF 5% for an 18pF load crystal). Achieving 100 ppm over four years requires the crystal to have a 20 ppm initial accuracy, 30 ppm temperature and 5 ppm/year aging coefficients. The ICS9112-31/32 with less than 25ps accumulative jitter is well suited for Fibre Channel applications. * * * * * * * Generates 106.25 MHz clocks from a 25 MHz crystal Less than 45ps one sigma jitter (15ps typ.) Less than 130ps absolute jitter Less than 25ps accumulative jitter @ 256 cycles Rise/fall times less than 1.2ns driving 15pF On-chip loop filter components 3.0V-5.5V supply range 8-pin, 150-mil SOIC package Applications * Specifically designed to support the high-speed clocking requirements of fibre channel systems. Block Diagram ICS9112-31/32 Rev D 3/2/99 PRODUCT PREVIEW documents contain information on new products in the sampling or preproduction phase of development. Characteristic data and other specifications are subject to change without notice. ICS9112-31/32 Preliminary Product Preview Pin Configurations 8-Pin SOIC 8-Pin SOIC Functionality OE X1, X2 (MHz) FOUT (MHz) 1 25.00 106.25 0 25.00 Tristate Pin Descriptions PIN NUMBER PIN NAME TYPE DESCRIPTION 1 AGND PWR Analog ground. 2 GND PWR Digital Ground. 3 X1 IN 4 X2 IN Crystal drive output from device. Requires external load capacitors. 5 OE IN Output Enable (has internal pull_up.): when OE is low, it tristates the clock output (FOUT) 6 7 8 Crystal or clock input to device; nominally 25.00 MHz. Requires external load capacitors. VDD PWR +3.3 or +5.0 volt supply (-31) CLK2 OUT Clock output (106.25mHz) (-32) AVDD PWR Analog power. (Must equal digital power voltage).(-31) VDD+AVDD PWR Digital and analog power, +3.3 or +5.0Volt supply (-32) CLK1 OUT Clock output (106.25MHz) 2 ICS9112-31/32 Preliminary Product Preview Absolute Maximum Ratings AVDD, VDD referenced to GND . . . . . . . . . . . . . . . 7V Operating temperature under bias. . . . . . . . . . . . . . . . 0C to +70C Storage temperature . . . . . . . . . . . . . . . . . . . . . . . . . . -65C to +150C Voltage on I/O pins referenced to GND. . . . . . . . . . . GND -0.5V to VDD +0.5V Power dissipation . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0.5 Watts Stresses above those listed under Absolute Maximum Ratings may cause permanent damage to the device. This is a stress rating only and functional operation of the device at these or any other conditions above those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions for extended periods may affect product reliability. Electrical Characteristics at 5.0V Operating VDD = +4.5V to +5.5V; TA =0C to 70C unless otherwise stated PARAMETER Input Low Voltage Input High Voltage Input Low Current Input High Current Output Low Voltage1 Output High Voltage1 Output Low Current1 Output High Current1 Supply Current Pull-up Resistor1 1 SYMBOL VIL VIH IIL IIH VOL VOH IOL IOH IDD Rpu Rise Time Fall Time1 Duty Cycle1 Jitter, One Sigma1 Jitter, Absolute1 Accumulative Jitter1 Input Frequency1 Output Frequency1 Power-up Time1 Tr1 Tf1 Dt Tj1s Tjab Tjacc Fi Fo Tpu Crystal Input Capacitance1 Cinx Note 1: DC Characteristics TEST CONDITIONS VIN=0V (Pull-up input) VIN=VDD IOL=10mA IOH=-30mA VOL=0.8V VOH=2.0V Unloaded AC Characteristics 15pF load, 0.8 to 2.0V 15pF load, 2.0 to 0.8V 15pF load @ 1.4V 15pF load 15pF load 15pF load @ 256 Cycle X1 (Pin 1) X2 (Pin 8) MIN 2.0 -16.0 -2.0 2.4 22.0 - TYP -6.0 0.15 3.25 35.0 -50.0 22.0 100 MAX 0.8 2.0 0.40 -35.0 45.0 - UNITS V V A A V V mA mA mA k ohms 42.0 -130.0 - 0.8 0.7 49.0 15.0 17.0 25.0 106.25 7.58 1.2 1.2 55. 0 45.0 130.0 18.0 ns ns % ps ps ps MHz MHz ms - 3.0 - pF Parameter is guaranteed by design and characterization. Not 100% tested in production. 3 ICS9112-31/32 Preliminary Product Preview Electrical Characteristics at 3.3V Operating VDD = +3.0V to +3.7V; TA =0C to 70C unless otherwise stated PARAMETER Input Low Voltage Input High Voltage Input Low Current Input High Current Output Low Voltage1 Output High Voltage1 Output Low Current1 Output High Current1 Supply Current Pull-up Resistor1 Time1 SYMBOL VIL VIH IIL IIH VOL VOH IOL IOH IDD Rpu R ise Fall Time1 Duty Cycle1 Jitter, One Sigma1 Jitter, Absolute1 Accumulative Jitter1 Input Frequency1 Output Frequency1 Power-up Time1 Tr1 Tf1 Dt Tj1s Tjab Tjacc Fi Fo Tpu Crystal Input Capacitance1 Cinx Note 1: DC Characteristics TEST CONDITIONS VIN=0V (Pull-up input) VIN=VDD IOL=6mA IOH=-5mA VOL=0.2VDD VOH=0.7VDD Unloaded AC Characteristics 15pF load, 0.8 to 2.0V 15pF load, 2.0 to 0.8V 15pF load @ 1.4V 15pF load 15pF load 15pF load @ 256 cycle X1 (Pin 1) X2 (Pin 8) MIN 0.7VDD -7.0 -2.0 0.85VDD 15.0 - TYP -2.5 0.05VDD 0.92VDD 22.0 -17.0 14.0 175.0 MAX 0.20VDD 2.0 0.1VDD -10.0 30.0 - UNITS V V A A V V mA mA mA k ohms 40.0 -130.0 - 0.65 0.6 50.0 15.0 17.0 25.0 106.25 7.58 1.2 1.2 60.0 45.0 130.0 18.0 ns ns % ps ps ps MHz MHz ms - 3.0 - pF Parameter is guaranteed by design and characterization. Not 100% tested in production. 4 ICS9112-31/32 Preliminary Product Preview 8-Pin Plastic SOIC Package Ordering Information ICS9112M-31/32 Example: ICS XXXX M-PPP Pattern Number(2 or 3 digit number for parts with ROM code patterns) Package Type M=SOIC, SOP Device Type (consists of 3 or 4 digit numbers) Prefix ICS=Standard Device 5 PRODUCT PREVIEW documents contain information on new products in the sampling or preproduction phase of development. Characteristic data and other specifications are subject to change without notice.