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November 2013
FQI5N60C — N-Channel QFET® MOSFET
©2003 Fairchild Semiconductor Corporation
FQI5N60C Rev. C1
www.fairchildsemi.com
1
Absolute Maximum Ratings TC = 25°C unless otherwise noted.
Thermal Characteristics
Symbol Parameter FQI5N60CTU Unit
VDSS Drain-Source Voltage 600 V
IDDrain Current - Continuous (TC = 25°C) 4.5 A
- Continuous (TC = 100°C) 2.6 A
IDM Drain Current - Pulsed (Note 1) 18 A
VGSS Gate-Source Voltage ± 30 V
EAS Single Pulsed Avalanche Energy (Note 2) 210 mJ
IAR Avalanche Current (Note 1) 4.5 A
EAR Repetitive Avalanche Energy (Note 1) 10 mJ
dv/dt Peak Diode Recovery dv/dt (Note 3) 4.5 V/ns
PD
Power Dissipation (TC = 25°C) 100 W
- Derate above 25°C 0.8 W/°C
TJ, TSTG Operating and Storage Temperature Range -55 to +150 °C
TL
Maximum lead temperature for soldering purposes,
1/8" from case for 5 seconds 300 °C
Symbol Parameter FQI5N60CTU Unit
RθJC Thermal Resistance, Junction-to-Case, Max. 1.25 °C/W
RθJA Thermal Resistance, Junction-to-Ambient, Max. 62.5
FQI5N60C
N-Channel QFET® MOSFET
600 V, 4.5 A, 2.5 Ω
Features
• 4.5 A, 600 V, RDS(on) = 2.5 Ω (Max.) @VGS = 10 V, ID = 2.1 A
• Low Gate Charge (Typ. 15 nC)
• Low Crss (Typ. 6.5 pF)
• 100% Avalanche Tested
Description
This N-Channel enhancement mode power MOSFET is
produced using Fairchild Semiconductor’s proprietary
planar stripe and DMOS technology. This advanced
MOSFET technology has been especially tailored to reduce
on-state resistance, and to provide superior switching
performance and high avalanche energy strength. These
devices are suitable for switched mode power supplies,
active power factor correction (PFC), and electronic lamp
ballasts.
GDS
I2-PAK
G
S
D
FQI5N60C — N-Channel QFET® MOSFET
©2003 Fairchild Semiconductor Corporation
FQI5N60C Rev. C1
www.fairchildsemi.com
2
Package Marking and Ordering Information
Electrical Characteristics TC = 25°C unless otherwise noted.
NOTES:
1. Repetitive Rating : Pulse width limited by maximum junction temperature.
2. L = 18.9 mH, IAS = 4.5 A, VDD = 50V, RG = 25 Ω, starting TJ = 25°C.
3. ISD ≤ 4.5 A, di/dt ≤ 200 A/μs, VDD ≤ BVDSS, starting TJ = 25°C.
4. Essentially independent of operating temperature.
Device Marking Device Package Reel Size Tape Width Quantity
FQI5N60C FQI5N60CTU I2-PAK Tube N/A 50 units
Symbol Parameter Test Conditions Min Typ Max Unit
Off Characteristics
BVDSS Drain-Source Breakdown Voltage VGS = 0 V, ID = 250 μA600 -- -- V
ΔBVDSS
/ ΔTJ
Breakdown Voltage Temperature
Coefficient ID = 250 μA, Referenced to 25°C -- 0.6 -- V/°C
IDSS Zero Gate Voltage Drain Current VDS = 600 V, VGS = 0 V -- -- 1 μA
VDS = 480 V, TC = 125°C -- -- 10 μA
IGSSF Gate-Body Leakage Current, Forward VGS = 30 V, VDS = 0 V -- -- 100 nA
IGSSR Gate-Body Leakage Current, Reverse VGS = -30 V, VDS = 0 V -- -- -100 nA
On Characteristics
VGS(th) Gate Threshold Voltage VDS = VGS, ID = 250 μA2.0 -- 4.0 V
RDS(on) Static Drain-Source
On-Resistance VGS = 10 V, ID = 2.25 A -- 2.0 2.5 Ω
gFS Forward Transconductance VDS = 40 V, ID = 2.25 A -- 4.7 -- S
Dynamic Characteristics
Ciss Input Capacitance VDS = 25 V, VGS = 0 V,
f = 1.0 MHz
-- 515 670 pF
Coss Output Capacitance -- 55 72 pF
Crss Reverse Transfer Capacitance -- 6.5 8.5 pF
Switching Characteristics
td(on) Turn-On Delay Time VDD = 300 V, ID = 4.5A,
RG = 25 Ω
(Note 4)
-- 10 30 ns
trTurn-On Rise Time -- 42 90 ns
td(off) Turn-Off Delay Time -- 38 85 ns
tfTurn-Off Fall Time -- 46 100 ns
QgTotal Gate Charge VDS = 480 V, ID = 4.5A,
VGS = 10 V
(Note 4)
-- 15 19 nC
Qgs Gate-Source Charge -- 2.5 -- nC
Qgd Gate-Drain Charge -- 6.6 -- nC
Drain-Source Diode Characteristics and Maximum Ratings
ISMaximum Continuous Drain-Source Diode Forward Current -- -- 4.5 A
ISM Maximum Pulsed Drain-Source Diode Forward Current -- -- 18 A
VSD Drain-Source Diode Forward Voltage VGS = 0 V, IS = 4.5 A -- -- 1.4 V
trr Reverse Recovery Time VGS = 0 V, IS = 4.5 A,
dIF / dt = 100 A/μs
-- 300 -- ns
Qrr Reverse Recovery Charge -- 2.2 -- μC
FQI5N60C — N-Channel QFET® MOSFET
©2003 Fairchild Semiconductor Corporation
FQI5N60C Rev. C1
www.fairchildsemi.com
3
0.2 0.4 0.6 0.8 1.0 1.2 1.4
10-1
100
101
150℃
※ Notes :
1. VGS = 0V
2. 250μs Pulse Test
25℃
IDR, Reverse Drain Current [A]
VSD, Source-Drain voltage [V]
0 4 8 12 16
0
2
4
6
8
10
12
VDS = 300V
VDS = 120V
VDS = 480V
※ Note : ID = 4.5A
VGS, Gate-Source Voltage [V]
QG, Total Gate Charge [nC]
0246810
0
1
2
3
4
5
6
VGS = 20V
VGS = 10V
※ Note : T
J = 25℃
RDS(ON) [Ω],
Drain-Source On-Resistance
ID, Drain Current [A]
Typical Characteristics
Figure 5. Capacitance Characteristics Figure 6. Gate Charge Characteristics
Figure 3. On-Resistance Variation vs
Drain Current and Gate Voltage
Figure 4. Body Diode Forward Voltage
Variation with Source Current
and Temperature
Figure 2. Transfer CharacteristicsFigure 1. On-Region Characteristics
10-1 100101
0
200
400
600
800
1000
Ciss = Cgs + Cgd (Cds = shorted)
Coss = Cds + Cgd
Crss = Cgd
※ Notes ;
1. VGS = 0 V
2. f = 1 MHz
Crss
Coss
Ciss
Capacitance [pF]
VDS, Drain-Source Voltage [V]
10-1 100101
10-2
10-1
100
101
VGS
Top : 15.0 V
10.0 V
8.0 V
7.0 V
6.5 V
6.0 V
5.5 V
5.0 V
Bottom : 4.5 V
※ Notes :
1. 250μs Pulse Test
2. TC = 25℃
ID, Drain Current [A]
VDS, Drain-Source Voltage [V]
246810
10-1
100
101
150oC
25oC
-55oC
※ Notes :
1. VDS = 40V
2. 250μs Pulse Test
ID, Drain Current [A]
VGS, Gate-Source Voltage [V]
FQI5N60C — N-Channel QFET® MOSFET
©2003 Fairchild Semiconductor Corporation
FQI5N60C Rev. C1
www.fairchildsemi.com
4
100101102103
10-2
10-1
100
101
100 ms
DC
10 ms
1 ms
100 μs
Operation in This Area
is Limited by R DS( on )
※ Notes :
1. TC
= 25 o
C
2. TJ = 150 o
C
3. Singl e Pul se
ID, Drain Current [A]
V
DS, Drain-Source Voltage [V]
Typical Characteristics (Continued)
25 50 75 100 125 150
0
1
2
3
4
5
ID, Drain Current [A]
TC, Case Temperature [ ]℃
-100 -50 0 50 100 150 200
0.0
0.5
1.0
1.5
2.0
2.5
3.0
※ Notes :
1. VGS = 10 V
2. ID = 2.25 A
RDS(ON), (Normalized)
Drain-Source On-Resistance
TJ, Junction Temperature [oC]
10-5 10-4 10-3 10-2 10-1 100101
10-2
10-1
100
※ N ote s :
1. Z θJC(t) = 1.25 /W Max.℃
2. D u ty Fa cto r, D = t1/t2
3. T JM - TC = PDM * Z θJC(t)
single pulse
D=0.5
0.02
0.2
0.05
0.1
0.01
ZθJC
(t), Thermal Response
t1, Square W ave Pulse Duration [sec]
Figure 11. Transient Thermal Response Curve
t1
PDM
t2
Figure 7. Breakdown Voltage Variation
vs Temperature
Figure 8. On-Resistance Variation
vs Temperature
Figure 9. Maximum Safe Operating Area Figure 10. Maximum Drain Current
vs Case Temperature
ZθJC(t), Thermal Response [oC/W]
FQI5N60C — N-Channel QFET® MOSFET
©2003 Fairchild Semiconductor Corporation
FQI5N60C Rev. C1
www.fairchildsemi.com
5
Figure 12. Gate Charge Test Circuit & Waveform
Figure 13. Resistive Switching Test Circuit & Waveforms
Figure 14. Unclamped Inductive Switching Test Circuit & Waveforms
VGS
VDS
10%
90%
td(on) tr
ton toff
td(off) tf
VDD
10V
VDS
RL
DUT
RG
VGS
VGS
VDS
10%
90%
td(on) tr
ton toff
td(off) tf
VDD
10V
VDS
RL
DUT
RG
VGS
VGS
Charge
VGS
10V
Qg
Qgs Qgd
3mA
VGS
DUT
VDS
300nF
50KΩ
200nF
12V
Same Type
as DUT
Charge
VGS
10V
Qg
Qgs Qgd
3mA
VGS
DUT
VDS
300nF
50KΩ
200nF
12V
Same Type
as DUT
EAS =LI
AS2
----
2
1--------------------
BVDSS -V
DD
BVDSS
VDD
VDS
BVDSS
t p
VDD
IAS
VDS (t)
ID (t)
Time
10V DUT
RG
L
ID
t p
EAS =LI
AS2
----
2
1
EAS =LI
AS2
----
2
1
----
2
1--------------------
BVDSS -V
DD
BVDSS
VDD
VDS
BVDSS
t p
VDD
IAS
VDS (t)
ID (t)
Time
10V DUT
RG
LL
ID
ID
t p
VGS
VGS
IG = const.
FQI5N60C — N-Channel QFET® MOSFET
©2003 Fairchild Semiconductor Corporation
FQI5N60C Rev. C1
www.fairchildsemi.com
6
Figure 15. Peak Diode Recovery dv/dt Test Circuit & Waveforms
DUT
VDS
+
_
Driver
RGSame Type
as DUT
VGS • dv/dt controlled by RG
•I
SD controlled by pulse period
VDD
L
ISD
10V
VGS
( Driver )
ISD
( DUT )
VDS
( DUT )
VDD
Body Diode
Forward Voltage Drop
VSD
IFM , Body Diode Forward Current
Body Diode Reverse Current
IRM
Body Diode Recovery dv/dt
di/dt
D = Gate Pulse Width
Gate Pulse Period
--------------------------
DUT
VDS
+
_
Driver
RGSame Type
as DUT
VGS • dv/dt controlled by RG
•I
SD controlled by pulse period
VDD
LL
ISD
10V
VGS
( Driver )
ISD
( DUT )
VDS
( DUT )
VDD
Body Diode
Forward Voltage Drop
VSD
IFM , Body Diode Forward Current
Body Diode Reverse Current
IRM
Body Diode Recovery dv/dt
di/dt
D = Gate Pulse Width
Gate Pulse Period
--------------------------
D = Gate Pulse Width
Gate Pulse Period
--------------------------
FQI5N60C — N-Channel QFET® MOSFET
©2003 Fairchild Semiconductor Corporation
FQI5N60C Rev. C1
www.fairchildsemi.com
7
Mechanical Dimensions
Figure 16. TO262 (I2PAK), Molded, 3-Lead, Jedec Variation AA
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FQI5N60C — N-Channel QFET® MOSFET
©2003 Fairchild Semiconductor Corporation
FQI5N60C Rev. C1
www.fairchildsemi.com
8
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Definition of Terms
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Rev. I66
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