Data Sheet
©2007-2009 CADEKA Microcircuits LLC www.cadeka.com
Comlinear® CLC2005 Dual, Low Cost, +2.7V to 5.5V, 260MHz Rail-to-Rail Amplier Rev 1B
Comlinear® CLC2005
Dual, Low Cost, +2.7V to 5.5V, 260MHz
Rail-to-Rail Amplier
Amplify the Human E x p e r i e n c e
FEATURES
n
260MHz bandwidth
n
Fully specied at +2.7V and +5V supplies
n
Output voltage range:
0.036V to 4.953V; Vs = +5; RL = 2kΩ
n
Input voltage range:
-0.3V to +3.8V; Vs = +5
n
145V/μs slew rate
n
4.2mA supply current per amplier
n
±55mA linear output current
n
±85mA short circuit current
n
Directly replaces AD8052 and AD8042 in
single supply applications
n
Pb-free SOIC-8 package
APPLICATIONS
n A/D driver
n Active lters
n CCD imaging systems
n CD/DVD ROM
n Coaxial cable drivers
n High capacitive load driver
n Portable/battery-powered applications
n Twisted pair driver
n Video driver
General Description
The
Comlinear
CLC2005 is a dual, low cost, voltage feedback amplier.
This amplier is designed to operate on +2.7V,+5V, or ±2.5V supplies. The
input voltage range extends 300mV below the negative rail and 1.2V below
the positive rail. The CLC2005 offers superior dynamic performance
with a 260MHz small signal bandwidth and 145V/μs slew rate. The
combination of low power, high output current drive, and rail-to-rail
performance make the
Comlinear
CLC2005 well suited for battery-pow-
ered communication/computing systems. The combination of low cost and
high performance make the
Comlinear
CLC2005 suitable for high volume
applications in both consumer and industrial applications such as wireless
phones, scanners, and color copiers.
Output Swing
Ordering Information
Part Number Package Pb-Free Operating Temperature Range Packaging Method
CLC2005ISO8 SOIC-8 Yes -40°C to +85°C Rail
CLC2005ISO8X SOIC-8 Yes -40°C to +85°C Reel
Moisture sensitivity level for all parts is MSL-1.
Output Voltage (0.5V/div)
Time (0.5μs/div)
2.7
0
Vs = +2.7V
RL = 2kΩ
G = -1
©2004-2009 CADEKA Microcircuits LLC www.cadeka.com 2
Data Sheet
Comlinear® CLC2005 Dual, Low Cost, +2.7V to 5.5V, 260MHz Rail-to-Rail Amplier Rev 1B
Pin Assignments
SOIC-8
Pin No. Pin Name Description
1 OUT1 Output, channel 1
2 -IN1 Negative input, channel 1
3 +IN1 Positive input, channel 1
4 -VSNegative supply
5 +IN2 Positive input, channel 2
6 -IN2 Negative input, channel 2
7 OUT2 Output, channel 2
8 +VSPositive supply
Pin Conguration
SOIC-8
-
+
-
+
1
2
3
4
OUT1
-IN1
+IN1
-Vs
+Vs
OUT2
-IN2
+IN2
8
7
6
5
©2004-2009 CADEKA Microcircuits LLC www.cadeka.com 3
Data Sheet
Comlinear® CLC2005 Dual, Low Cost, +2.7V to 5.5V, 260MHz Rail-to-Rail Amplier Rev 1B
Absolute Maximum Ratings
The safety of the device is not guaranteed when it is operated above the “Absolute Maximum Ratings”. The device
should not be operated at these “absolute” limits. Adhere to the “Recommended Operating Conditions” for proper
device function. The information contained in the Electrical Characteristics tables and Typical Performance plots reect
the operating conditions noted on the tables and plots.
Parameter Min Max Unit
Supply Voltage 0 +6 V
Input Voltage Range -Vs -0.5V +Vs +0.5V V
Reliability Information
Parameter Min Typ Max Unit
Junction Temperature 175 °C
Storage Temperature Range -65 150 °C
Lead Temperature (Soldering, 10s) 260 °C
Package Thermal Resistance
8-Lead SOIC 100 °C/W
Notes:
Package thermal resistance (θJA), JDEC standard, multi-layer test boards, still air.
ESD Protection
Product SOIC-8
Human Body Model (HBM) 2.5kV
Charged Device Model (CDM) 2kV
Recommended Operating Conditions
Parameter Min Typ Max Unit
Operating Temperature Range -40 +85 °C
©2004-2009 CADEKA Microcircuits LLC www.cadeka.com 4
Data Sheet
Comlinear® CLC2005 Dual, Low Cost, +2.7V to 5.5V, 260MHz Rail-to-Rail Amplier Rev 1B
Electrical Characteristics
Vs = +2.7V, G = 2, Rf = 2kΩ, RL = 2kΩ to Vs/2; unless otherwise noted.
Symbol Parameter Conditions Min Typ Max Units
Frequency Domain Response
UGBW -3dB Bandwidth(2) G = +1, VOUT = 0.05Vpp 215 MHz
BWSS -3dB Bandwidth G = +2, VOUT = 0.2Vpp 85 MHz
BWLS Large Signal Bandwidth G = +2, VOUT = 2Vpp 36 MHz
GBWP Gain Bandwidth Product 86 MHz
Time Domain Response
tR, tFRise and Fall Time(2) VOUT = 0.2V step 3.7 ns
tSSettling Time to 0.1% VOUT = 1V step 40 ns
OS Overshoot VOUT = 0.2V step 9 %
SR Slew Rate 2.7V step, G = -1 130 V/μs
Distortion/Noise Response
HD2 2nd Harmonic Distortion(2) 1Vpp, 5MHz 79 dBc
HD3 3rd Harmonic Distortion(2)
1Vpp, 5MHz 82 dBc
1Vpp, 5MHz 77 dB
enInput Voltage Noise > 1MHz 16 nV/√Hz
inInput Current Noise > 1MHz 1.3 pA/√Hz
XTALK Crosstalk(1) 10MHz 65 dB
DC Performance
VIO Input Offset Voltage -1.6 mV
dVIO Average Drift 10 μV/°C
IbInput Bias Current 3 μA
dIb Average Drift 7 nA/°C
IIO Input Offset Current 0.1 μA
PSRR Power Supply Rejection Ratio(1) DC 52 57 dB
AOL Open-Loop Gain 75 dB
ISQuiescent Current Per Amplier 3.9 mA
Input Characteristics
RIN Input Resistance 4.3 MΩ
CIN Input Capacitance 1.8 pF
CMIR Common Mode Input Range
-0.3 to 1.5
V
CMRR Common Mode Rejection Ratio DC, Vcm = 0V to Vs -1.5 87 dB
Output Characteristics
VOUT Output Voltage Swing
RL = 10kΩ to Vs/2 0.023 to
2.66
V
RL = 2kΩ to Vs/2 0.025 to
2.653 V
RL = 150Ω to Vs/2 0.065 to
2.55 V
IOUT Output Current ±55 mA
-40°C to +85°C ±50 mA
ISC Short-Circuit Output Current ±85 mA
VsPower Supply Operating Range 2.5 2.7 5.5 V
Notes:
1. 100% tested at 25°C.
2. Rf = 1kΩ was used for optimal performance. (For G = +1, Rf = 0).
©2004-2009 CADEKA Microcircuits LLC www.cadeka.com 5
Data Sheet
Comlinear® CLC2005 Dual, Low Cost, +2.7V to 5.5V, 260MHz Rail-to-Rail Amplier Rev 1B
Electrical Characteristics
Vs = 5V, G = 2, Rf = 2kΩ, RL = 2kΩ to Vs/2; unless otherwise noted.
Symbol Parameter Conditions Min Typ Max Units
Frequency Domain Response
UGBW -3dB Bandwidth(2) G = +1, VOUT = 0.05Vpp 260 MHz
BWSS -3dB Bandwidth G = +2, VOUT = 0.2Vpp 90 MHz
BWLS Large Signal Bandwidth G = +2, VOUT = 2Vpp 40 MHz
GBWP Gain Bandwidth Product 90 MHz
Time Domain Response
tR, tFRise and Fall Time(2) VOUT = 0.2V step 3.6 ns
tSSettling Time to 0.1% VOUT = 2V step 40 ns
OS Overshoot VOUT = 0.2V step 7 %
SR Slew Rate 5V step, G = -1 145 V/μs
Distortion/Noise Response
HD2 2nd Harmonic Distortion(2) 2Vpp, 5MHz 71 dBc
HD3 3rd Harmonic Distortion(2)
2Vpp, 5MHz 78 dBc
2Vpp, 5MHz 70 dB
DG Differential Gain
NTSC (3.85MHz), AC-Coupled, RL = 150Ω 0.06 %
NTSC (3.85MHz), DC-Coupled, RL = 150Ω 0.08 %
DP Differential Phase
NTSC (3.85MHz), AC-Coupled, RL = 150Ω 0.07 °
NTSC (3.85MHz), DC-Coupled, RL = 150Ω 0.06 °
enInput Voltage Noise >1MHz 16 nV/√Hz
inInput Current Noise >1MHz 1.3 pA/√Hz
XTALK Crosstalk(2) 10MHz 62 dB
DC Performance
VIO Input Offset Voltage(1) -8 1.4 +8 mV
dVIO Average Drift 10 μV/°C
IbInput Bias Current(1) -8 3 +8 μA
dIb Average Drift 7 nA/°C
IIO Input Offset Current(1) -0.8 0.1 +0.8 μA
PSRR Power Supply Rejection Ratio(1) DC 52 57 dB
AOL Open-Loop Gain(1) 68 78 dB
ISQuiescent Current(1) Per Amplier 4.2 5.2 mA
Input Characteristics
RIN Input Resistance 4.3 MΩ
CIN Input Capacitance 1.8 pF
CMIR Common Mode Input Range
-0.3 to 3.8
V
CMRR Common Mode Rejection Ratio(1) DC, Vcm = 0V to Vs -1.5 72 87 dB
Output Characteristics
VOUT Output Voltage Swing
RL = 10kΩ to Vs/2 0.027 to
4.97
V
RL = 2kΩ to Vs/2 0.036 to
4.953 V
RL = 150Ω to Vs/2(1) 0.3 0.12 to
4.8 4.625 V
IOUT Output Current ±55 mA
-40°C to +85°C ±50 mA
ISC Short-Circuit Output Current ±85 mA
VsPower Supply Operating Range 2.5 5 5.5 V
Notes:
1. 100% tested at 25°C.
2. Rf = 1kΩ was used for optimal performance. (For G = +1, Rf = 0).
©2004-2009 CADEKA Microcircuits LLC www.cadeka.com 6
Data Sheet
Comlinear® CLC2005 Dual, Low Cost, +2.7V to 5.5V, 260MHz Rail-to-Rail Amplier Rev 1B
Typical Performance Characteristics
Vs = +5V, G = 2, Rf = 2kΩ, RL = 2kΩ to Vs/2; unless otherwise noted.
Non-Inverting Frequency Response Vs = +5V Inverting Frequency Response Vs = +5V
Non-Inverting Frequency Response Vs = +2.7V Inverting Frequency Response Vs = +2.7V
Frequency Response vs. CL Large Signal Frequency Response
Normalized Magnitude (2dB/div)
Frequency (MHz)
0.1 1
G = 10
Rf = 2kΩ
10 100
G = 5
Rf = 2kΩ
G = 1
Rf = 0
G = 2
Rf = 1kΩ
Normalized Magnitude (1dB/div)
Frequency (MHz)
0.1 1
G = -10
Rf = 2kΩ
10 100
G = -5
Rf = 2kΩ
G = -2
Rf = 2kΩ
G = -1
Rf = 2kΩ
Normalized Magnitude (2dB/div)
Frequency (MHz)
110 100
0.1
G = 10
Rf = 2kΩ
G = 5
Rf = 2kΩ
G = 1
Rf = 0
G = 2
Rf = 1kΩ
Normalized Magnitude (1dB/div)
Frequency (MHz)
0.1 1
G = -10
Rf = 2kΩ
10 100
G = -5
Rf = 2kΩ
G = -2
Rf = 2kΩ
G = -1
Rf = 2kΩ
Magnitude (1dB/div)
Frequency (MHz)
0.1 110 100
CL = 100pF
Rs = 25Ω
CL = 50pF
Rs = 33Ω
CL = 20pF
Rs = 20Ω
CL = 10pF
Rs = 0Ω
+
-1kΩ
1kΩ
Rs
CLRL
Magnitude (1dB/div)
Frequency (MHz)
0.1 110 100
Vo = 1Vpp
Vo = 2Vpp
©2004-2009 CADEKA Microcircuits LLC www.cadeka.com 7
Data Sheet
Comlinear® CLC2005 Dual, Low Cost, +2.7V to 5.5V, 260MHz Rail-to-Rail Amplier Rev 1B
Typical Performance Characteristics
Vs = +5V, G = 2, Rf = 2kΩ, RL = 2kΩ to Vs/2; unless otherwise noted.
Frequency Response vs. Temperature Input Voltage Noise
2nd & 3rd Harmonic Distortion; Vs = +5V 2nd & 3rd Harmonic Distortion; Vs = +2.7V
2nd Harmonic Distortion vs. Vo 3rd Harmonic Distortion vs. Vo
Magnitude (0.5dB/div)
Frequency (MHz)
110 100
Voltage Noise (nV/√Hz)
Frequency (Hz)
1k 10k 100k 1M
0
10
20
30
40
50
60
70
80
90
100
Distortion (dBc)
Frequency (MHz)
0510 15
3rd
RL = 150Ω
20
2nd
RL = 150Ω
3rd
RL = 2kΩ
2nd
RL = 2kΩ
-90
-80
-70
-60
-50
-40
-30
-20 Vo = 2Vpp
Rf = 1kΩ
Distortion (dBc)
Frequency (MHz)
0510 15
2nd
RL = 150Ω
20
3rd
RL = 150Ω
3rd
RL = 2kΩ
2nd
RL = 2kΩ
-90
-80
-70
-60
-50
-40
-30
-20 Vo = 1Vpp
Rf = 1kΩ
Distortion (dBc)
Output Amplitude (Vpp)
0.5 1.0 1.5 2.0
20MHz
10MHz
5MHz
2.5
-90
-80
-70
-60
-50
-40
-30
-20
Rf = 1kΩ
2MHz
Distortion (dBc)
Output Amplitude (Vpp)
0.5 1.0 1.5 2.0
20MHz
10MHz
5MHz
2.5
-90
-80
-70
-60
-50
-40
-30
-20 Rf = 1kΩ
2MHz
©2004-2009 CADEKA Microcircuits LLC www.cadeka.com 8
Data Sheet
Comlinear® CLC2005 Dual, Low Cost, +2.7V to 5.5V, 260MHz Rail-to-Rail Amplier Rev 1B
Typical Performance Characteristics
Vs = +5V, G = 2, Rf = 2kΩ, RL = 2kΩ to Vs/2; unless otherwise noted.
PSRR CMRR
Open Loop Gain & Phase vs. Frequency Output Current
Small Signal Pulse Response Vs = +5V Small Signal Pulse Response Vs = +2.7V
PSRR (dB)
Frequency (MHz)
1k 0.01 0.1 1100
-70
-60
-50
-40
-30
-20
-10
0
10
CMRR (dB)
Frequency (MHz)
0.01 0.1 1.0 10 100
-90
-80
-70
-60
-50
-40
Open Loop Gain (dB)
Frequency (MHz)
-20
-10
0
10
20
-180
-135
-90
-45
0
30
40
50
60
70
80
0.01 0.1 1 10 100
Phase (degrees)
|Gain|
Phase
Output Voltage (V)
Output Current (mA)
-100 -50 050 100
Linear output current ±55mA
-0.8
-0.6
-0.2
0
0.2
0.4
0.6
0.8
-0.4 Short circuit current ±85mA
Output Voltage (0.05V/div)
Time (20ns/div)
Rf = 1kΩ
Output Voltage (0.05V/div)
Time (20ns/div)
Rf = 1kΩ
©2004-2009 CADEKA Microcircuits LLC www.cadeka.com 9
Data Sheet
Comlinear® CLC2005 Dual, Low Cost, +2.7V to 5.5V, 260MHz Rail-to-Rail Amplier Rev 1B
Typical Performance Characteristics
Vs = +5V, G = 2, Rf = 2kΩ, RL = 2kΩ to Vs/2; unless otherwise noted.
Large Signal Pulse Response Vs = +5V Output Swing
Channel Matching Vs = +5V
Output Voltage (0.5V/div)
Time (20ns/div)
Rf = 1kΩ
Output Voltage (0.5V/div)
Time (0.5μs/div)
2.7
0
Vs = +2.7V
RL = 2kΩ
G = -1
Magnitude (0.5dB/div)
Frequency (MHz)
0.1 110 100
Channel 1
Rf = 1kΩ
RL = 2kΩ
G = 2
Channel 2
©2004-2009 CADEKA Microcircuits LLC www.cadeka.com 10
Data Sheet
Comlinear® CLC2005 Dual, Low Cost, +2.7V to 5.5V, 260MHz Rail-to-Rail Amplier Rev 1B
General Description
The CLC2005 is a single supply, general purpose, voltage-
feedback amplier fabricated on a complementary bipolar
process using a patent pending topography. It features a
rail-to-rail output stage and is unity gain stable. Both gain
bandwidth and slew rate are insensitive to temperature.
The common mode input range extends to 300mV below
ground and to 1.2V below Vs. Exceeding these values
will not cause phase reversal. However, if the input volt-
age exceeds the rails by more than 0.5V, the input ESD
devices will begin to conduct. The output will stay at the
rail during this overdrive condition.
The design uses a Darlington output stage. The output
stage is short circuit protected and offers “soft” saturation
protection that improves recovery time.
The typical circuit schematic is shown in Figure 1.
Figure 1: Typical Conguration
At non-inverting gains other than G = +1, keep Rg below
1kΩ to minimize peaking; thus, for optimum response at a
gain of +2, a feedback resistor of 1kΩ is recommended.
Figure 2 illustrates the CLC2005 frequency response with
both 1kΩ and 2kΩ feedback resistors.
Figure 2: Frequency Response vs. Rf
Power Dissipation
The maximum internal power dissipation allowed is directly
related to the maximum junction temperature. If the
maximum junction temperature exceeds 150°C, some
reliability degradation will occur. If the maximum junction
temperature exceeds 175°C for an extended time, device
failure may occur.
The CLC2005 is short circuit protected. However, this may
not guarantee that the maximum junction temperature
(+150°C) is not exceeded under all conditions. Follow the
maximum power derating curves shown in Figure 3 to
ensure proper operation.
Figure 3: Power Derating Curves
Overdrive Recovery
For an amplier, an overdrive condition occurs when the
output and/or input ranges are exceeded. The recovery
time varies based on whether the input or output is over-
driven and by how much the ranges are exceeded. The
CLC2005 will typically recover in less than 20ns from an
overdrive condition. Figure 4 shows the CLC2005 in an
overdriven condition.
+
-
1/2
CLC2005
Rf
0.1μF
6.8μF
Out1
+In1
+Vs
+
Rg
Magnitude (1dB/div)
Frequency (MHz)
110 100
Rf = 2kΩ
Rf = 1kΩ
G = 2
RL = 2kΩ
Vs = +5V
Maximum Power Dissipation (W)
Ambient Temperature ( C)
-50 -30 -10 10 30 50 70 90
0
0.5
1.0
1.5
2.0
SOIC-8 lead
©2004-2009 CADEKA Microcircuits LLC www.cadeka.com 11
Data Sheet
Comlinear® CLC2005 Dual, Low Cost, +2.7V to 5.5V, 260MHz Rail-to-Rail Amplier Rev 1B
Figure 4: Overdrive Recovery
Driving Capacitive Loads
The
Frequency Response vs. CL
plot on page 6, illustrates
the response of the CLC2005. A small series resistance
(Rs) at the output of the amplier, illustrated in Figure 5,
will improve stability and settling performance. Rs values
in the
Frequency Response vs. CL
plot were chosen to
achieve maximum bandwidth with less than 1dB of peak-
ing. For maximum atness, use a larger Rs.
Figure 5: Typical Topology for driving a capacitive load
Layout Considerations
General layout and supply bypassing play major roles
in high frequency performance. Cadeka has evaluation
boards to use as a guide for high frequency layout and to
aid in device testing and characterization. Follow the steps
below as a basis for high frequency layout:
n Include 6.8μF and 0.1μF ceramic capacitors
n Place the 6.8μF capacitor within 0.75 inches of the
power pin
n Place the 0.1μF capacitor within 0.1 inches of the
power pin
n Remove the ground plane under and around the part,
especially near the input and output pins to reduce
parasitic capacitance
n Minimize all trace lengths to reduce series inductances
Refer to the evaluation board layouts shown in Figure 7
for more information.
When evaluating only one channel, complete the following
on the unused channel:
1. Ground the non-inverting input.
2. Short the output to the inverting input.
Evaluation Board Information
The following evaluation boards are available to aid in the
testing and layout of this device:
Eval Board Description Products
CEB006 Dual Channel, Dual Supply
8 lead SOIC
CLC2005SO8
Evaluation board schematics and layouts are shown in
Figure 6 and Figure 7.
The CEB006 evaluation board is built for dual supply
operation. Follow these steps to use the board in a single
supply application:
1. Short -Vs to ground.
2. Use C3 and C4, if the -Vs pin of the CLC2005 is
not directly connected to the ground plane.
Figure 6: Evaluation Board Schematic
Input Voltage (0.5V/div)
Time (20ns/div)
Output
Input
RL = 2kΩ
Vin =2Vpp
G = 5
Rf = 1kΩ
+
-Rf
Rg
Rs
CLRL
©2004-2009 CADEKA Microcircuits LLC www.cadeka.com 12
Data Sheet
Comlinear® CLC2005 Dual, Low Cost, +2.7V to 5.5V, 260MHz Rail-to-Rail Amplier Rev 1B
CLC2005 Evaluation Board Layout
Figure 7a: CEB006 (Top) Figure 7b: CEB006 (Bottom)
For additional information regarding our products, please visit CADEKA at: cadeka.com
CADEKA, the CADEKA logo design, Comlinear, and the Comlinear logo design are trademarks or registered trademarks of CADEKA
Microcircuits LLC. All other brand and product names may be trademarks of their respective companies.
CADEKA reserves the right to make changes to any products and services herein at any time without notice. CADEKA does not assume any
responsibility or liability arising out of the application or use of any product or service described herein, except as expressly agreed to in
writing by CADEKA; nor does the purchase, lease, or use of a product or service from CADEKA convey a license under any patent rights,
copyrights, trademark rights, or any other of the intellectual property rights of CADEKA or of third parties.
Copyright ©2007-2009 by CADEKA Microcircuits LLC. All rights reserved.
CADEKA Headquarters Loveland, Colorado
T: 970.663.5452
T: 877.663.5452 (toll free)
Data Sheet
Comlinear® CLC2005 Dual, Low Cost, +2.7V to 5.5V, 260MHz Rail-to-Rail Amplier Rev 1B
Amplify the Human E x p e r i e n c e
Mechanical Dimensions
SOIC-8 Package
θ
2
HE
C
L
X
C
L
e
Pin No. 1 B
AA1
DETAIL-A
DETAIL-A
C
0.015±0.004 x 45°
Gauge Plane
Seating Plane
θ
1
NOTE:
1. All dimensions are in inches.
2. Lead coplanarity should be 0" to 0.004" max.
3. Package surface finishing: VDI 24~27
4. All dimension excluding mold flashes.
5. The lead width, B to be determined at 0.0075"
from the lead tip.
SYMBOL MIN MAX
A 0.054 0.068
A1 0.004 0.0098
B 0.014 0.019
D 0.189 0.196
E 0.150 0.157
H 0.229 0.244
e 0.050 BSC
C 0.0075 0.0098
L 0.016 0.034
X 0.0215 Ref
θ
1
0° 8°
θ
2
7° BSC
SOIC-8
D
L