DATA SH EET
Product specification
Supersedes data of 1999 May 06 2001 Jun 05
DISCRETE SEMICONDUCTORS
PUMH9
NPN resistor-equipped double
transistor
b
ook, halfpage
MBD128
2001 Jun 05 2
Philips Semiconductors Product specification
NPN resistor-equipped double transistor PUMH9
FEATURES
Transistors with built-in bias resistors (R1 typ. 10 k
and R2 typ. 47 k)
No mutual interference between the transistors
Simplification of circuit design
Reduces number of components and board space.
APPLICATIONS
Especially suitable for space reduction in interface and
driver circuits
Inverter circuit configurations without use of external
resistors.
DESCRIPTION
NPN resistor-equipped double transistor in an SC-88
(SOT363) plastic package.
MARKING
PINNING
TYPE NUMBER MARKING CODE
PUMH9 Ht9
PIN DESCRIPTION
1, 4 emitter TR1; TR2
2, 5 base TR1; TR2
6, 3 collector TR1; TR2
Fig.1 Simplified outline (SC-88) and symbol.
handbook, halfpage
MAM342
654
123
R2
TR1 TR2
R1
R1 R2
132
4
56
Top view
Fig.2 Equivalent inverter symbol.
MBK120
2, 5 6, 3
1, 4
2001 Jun 05 3
Philips Semiconductors Product specification
NPN resistor-equipped double transistor PUMH9
LIMITING VALUES
In accordance with the Absolute Maximum Rating System (IEC 60134).
Note
1. Refer to SC-88 standard mounting conditions.
SYMBOL PARAMETER CONDITIONS MIN. MAX. UNIT
Per transistor
VCBO collector-base voltage open emitter 50 V
VCEO collector-emitter voltage open base 50 V
VEBO emitter-base voltage open collector 10 V
VIinput voltage
positive +40 V
negative −−10 V
IOoutput current (DC) 100 mA
ICM peak collector current 100 mA
Ptot total power dissipation Tamb 25 °C; note 1 200 mW
Tstg storage temperature 65 +150 °C
Tjjunction temperature 150 °C
Tamb operating ambient temperature 65 +150 °C
Per device
Ptot total power dissipation Tamb 25 °C; note 1 300 mW
2001 Jun 05 4
Philips Semiconductors Product specification
NPN resistor-equipped double transistor PUMH9
THERMAL CHARACTERISTICS
Note
1. Refer to SC-88 standard mounting conditions.
CHARACTERISTICS
Tamb =25°C unless otherwise specified.
SYMBOL PARAMETER CONDITIONS VALUE UNIT
Rth j-a thermal resistance from junction to ambient note 1 416 K/W
SYMBOL PARAMETER CONDITIONS MIN. TYP. MAX. UNIT
Per transistor
ICBO collector cut-off current IE= 0; VCB =50V −−100 nA
ICEO collector cut-off current IB= 0; VCE =30V −−1µA
I
B
= 0; VCE = 30 V; Tj= 150 °C−−50 µA
IEBO emitter cut-off current IC= 0; VEB =5V −−150 µA
hFE DC current gain IC= 5 mA; VCE = 5 V 100 −−
V
CEsat collector-emitter saturation
voltage IC= 5 mA; IB= 0.25 mA −−100 mV
Vi(off) input-off voltage IC= 100 µA; VCE =5V 0.7 0.5 V
Vi(on) input-on voltage IC= 1 mA; VCE = 0.3 V 1.4 0.8 V
R1 input resistor 7 10 13 k
resistor ratio 3.7 4.7 5.7
Cccollector capacitance IE=i
e= 0; VCB = 10 V; f = 1 MHz −−2.5 pF
R2
R1
-------
2001 Jun 05 5
Philips Semiconductors Product specification
NPN resistor-equipped double transistor PUMH9
Fig.3 DC current gain as a function of collector
current; typical values.
VCE =5V.
(1) Tamb = 100 °C.
(2) Tamb =25°C.
(3) Tamb =40 °C.
handbook, halfpage
103
10
102
1
MGW105
101110
I
C
(mA)
hFE
102
(3)
(2)
(1)
Fig.4 Collector-emitter saturation voltage as a
function of collector current; typical values.
IC/IB= 20.
(1) Tamb = 100 °C.
(2) Tamb =25°C.
(3) Tamb =40 °C.
handbook, halfpage
103
102
10
MGW104
101110
I
C
(mA)
VCEsat
(mV)
102
(3)
(2)
(1)
Fig.5 Input-off voltage as a function of collector
current; typical values.
VCE =5V.
(1) Tamb =40 °C.
(2) Tamb =25°C.
(3) Tamb = 100 °C.
handbook, halfpage
2
0
MGW107
0.4
0.8
1.2
1.6
1021011IC (mA)
VBE
(V)
10
(3)
(2)
(1)
Fig.6 Input-on voltage as a function of collector
current; typical values.
VCE = 0.3 V.
(1) Tamb =40 °C.
(2) Tamb =25°C.
(3) Tamb = 100 °C.
handbook, halfpage
102
1
10
101
MGW106
101110
I
C
(mA)
VBE
(V)
102
(3)
(2)
(1)
2001 Jun 05 6
Philips Semiconductors Product specification
NPN resistor-equipped double transistor PUMH9
PACKAGE OUTLINE
REFERENCES
OUTLINE
VERSION EUROPEAN
PROJECTION ISSUE DATE
IEC JEDEC EIAJ
SOT363 SC-88
wBM
b
p
D
e
1
e
pin 1
index A
A1
Lp
Q
detail X
HE
E
vMA
AB
y
0 1 2 mm
scale
c
X
132
4
56
Plastic surface mounted package; 6 leads SOT363
UNIT A1
max bpcDEe
1H
E
L
p
Qywv
mm 0.1 0.30
0.20 2.2
1.8
0.25
0.10 1.35
1.15 0.65
e
1.3 2.2
2.0 0.2 0.10.2
DIMENSIONS (mm are the original dimensions)
0.45
0.15 0.25
0.15
A
1.1
0.8
97-02-28
2001 Jun 05 7
Philips Semiconductors Product specification
NPN resistor-equipped double transistor PUMH9
DATA SHEET STATUS
Notes
1. Please consult the most recently issued data sheet before initiating or completing a design.
2. The product status of the device(s) described in this data sheet may have changed since this data sheet was
published. The latest information is available on the Internet at URL http://www.semiconductors.philips.com.
DATA SHEET STATUS(1) PRODUCT
STATUS(2) DEFINITIONS
Objective data Development This data sheet contains data from the objective specification for product
development. Philips Semiconductors reserves the right to change the
specification in any manner without notice.
Preliminary data Qualification This data sheet contains data from the preliminary specification.
Supplementary data will be published at a later date. Philips
Semiconductors reserves the right to change the specification without
notice, in order to improve the design and supply the best possible
product.
Product data Production This data sheet contains data from the product specification. Philips
Semiconductors reserves the right to make changes at any time in order
to improve the design, manufacturing and supply. Changes will be
communicated according to the Customer Product/Process Change
Notification (CPCN) procedure SNW-SQ-650A.
DEFINITIONS
Short-form specification The data in a short-form
specification is extracted from a full data sheet with the
same type number and title. For detailed information see
the relevant data sheet or data handbook.
Limiting values definition Limiting values given are in
accordance with the Absolute Maximum Rating System
(IEC 60134). Stress above one or more of the limiting
values may cause permanent damage to the device.
These are stress ratings only and operation of the device
attheseoratanyotherconditionsabovethosegiveninthe
Characteristics sections of the specification is not implied.
Exposure to limiting values for extended periods may
affect device reliability.
Application information Applications that are
described herein for any of these products are for
illustrative purposes only. Philips Semiconductors make
norepresentationorwarrantythatsuch applicationswillbe
suitable for the specified use without further testing or
modification.
DISCLAIMERS
Life support applications These products are not
designed for use in life support appliances, devices, or
systems where malfunction of these products can
reasonably be expected to result in personal injury. Philips
Semiconductorscustomersusingorselling theseproducts
for use in such applications do so at their own risk and
agree to fully indemnify Philips Semiconductors for any
damages resulting from such application.
Right to make changes Philips Semiconductors
reserves the right to make changes, without notice, in the
products, including circuits, standard cells, and/or
software, described or contained herein in order to
improve design and/or performance. Philips
Semiconductors assumes no responsibility or liability for
theuse of anyoftheseproducts,conveysnolicence or title
under any patent, copyright, or mask work right to these
products,andmakesnorepresentations or warranties that
these products are free from patent, copyright, or mask
work right infringement, unless otherwise specified.
© Philips Electronics N.V. SCA
All rights are reserved. Reproduction in whole or in part is prohibited without the prior written consent of the copyright owner.
The information presented in this document does not form part of any quotation or contract, is believed to be accurate and reliable and may be changed
without notice. No liability will be accepted by the publisher for any consequence of its use. Publication thereof does not convey nor imply any license
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Internet: http://www.semiconductors.philips.com
2001 72
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Printed in The Netherlands 613514/02/pp8 Date of release: 2001 Jun 05 Document order number: 9397 750 08225