DATA BULLETIN
MX609
1998 MX-COM, Inc. www.mxcom.com Tel: 800 638 5577 336 744 5050 Fax: 336 744 5054 Doc. # 20480069.005
4800 Bethania Station Road, W inston-Salem, NC 27105-1201 USA All Trademarks and service marks are held by their respective companies.
PCN/PCS DELTA
MODULATION CODEC
Features Applications
Single Chip full Duplex CVSD CODEC
On-chip Input and Output Filters
Programmable Sampling Clocks
3- or 4-bit Companding Algorithm
Powersave Capabilities
Low Power, 5.0V Operation
Digital PCN/PCS Systems
Digital Cordless Phones
Digital Delay Lines
Digital Voice Storage
Multiplexers, Switches, and
Phones
Time Domain Scramblers
ENCODER DATA CLOCK
DECODER DATA CLOCK
MOD
DEMOD
CLOCK RATE
GENERATORS
CLOCK MODE
LOGIC
f
f
f
ff
1
1
3
0
2
ENCODER INPUT
ENCODER FORCE IDLE*
DECODER FORCE IDLE*
DATA ENABLE
V
DD
V
SS
POWERSAVE
V
BIAS
XTAL/CLOCK
MODE 1
MODE 2
XTAL
ALGORITHM
DECODER INPUT
SAMPLING RATE
CONTROL 3or4BIT
DECODER
OUTPUT
ENCODER
OUTPUT
*Available on J,P & LH
package styles only
The MX609 is a Continuously Variable Slope Delta Modulation (CVSD) Codec designed for use in cordless
telephones. The device is suitable for applications in delta multiplexers, switches and phones. Encoder input
and decoder output switched capacitor filters are incorporated on-chip.
Sampling clock rates can be programmed to 16, 32 or 64K bits/second from an internal clock generator or
externally injected in the 8 to 64K bits/second range. The internal clocks are derived from an on-chip
reference oscillator driven by an externally connected crystal. The sampling clock frequency is output for the
synchronization of external circuits.
The encoder has an enable function for use in multiplexer applications. When not enabled the encoder output
remains in a high-impedance “tri-state” mode.
Companding circuits may be operated with an externally selectable 3- or 4-bit algorithm. The device may be
put in standby mode when Powersave is selected.
The MX609 operates with a supply voltage of 5.0V and is available in the following packages: 24-pin PLCC
(MX609LH), 16-pin SOIC (MX609DW), 22-pin CERDIP (MX609J), and 22-pin PDIP (MX609P).
PCN/PCS Delta Modulation CODEC 2 MX609
1998 MX-COM, Inc. www.mxcom.com Tel: 800 638 5577 336 744 5050 Fax: 336 744 5054 Doc. # 204800069.005
4800 Bethania Station Road, W inston-Salem, NC 27105-1201 USA All Trademarks and service marks are held by their respective companies.
CONTENTS
Section Page
1 Block Diagram................................................................................................................3
2 Signal List.......................................................................................................................4
3 External Components....................................................................................................6
4 General Description.......................................................................................................6
5 Application .....................................................................................................................7
5.1 CODEC Integration.............................................................................................................. 7
5.2 CODEC Performance.......................................................................................................... 7
6 Performance Specification............................................................................................9
6.1 Electrical Performance ........................................................................................................ 9
6.1.1 Absolute Maximum Ratings....................................................................................................9
6.1.2 Operating Limits.....................................................................................................................9
6.1.3 Operating Characteristics.....................................................................................................10
6.1.4 TIMING.................................................................................................................................11
6.2 Packaging.......................................................................................................................... 12
MX-COM, Inc. reserves the right to change specifications at any time and without notice.
PCN/PCS Delta Modulation CODEC 3 MX609
1998 MX-COM, Inc. www.mxcom.com Tel: 800 638 5577 336 744 5050 Fax: 336 744 5054 Doc. # 204800069.005
4800 Bethania Station Road, W inston-Salem, NC 27105-1201 USA All Trademarks and service marks are held by their respective companies.
1 Block Diagram
ENCODER DATA CLOCK
DECODER DATA CLOCK
MOD
DEMOD
CLOCK RATE
GENERATORS
CLOCK MODE
LOGIC
f
f
f
ff
1
1
3
0
2
ENCODER INPUT
ENCODER FORCE IDLE*
DECODER FORCE IDLE*
DATA ENABLE
VDD
VSS
POWERSAVE
VBIAS
XTAL/CLOCK
MODE 1
MODE 2
XTAL
ALGORITHM
DECODER INPUT
SAMPLING RATE
CONTROL 3or4BIT
DECODER
OUTPUT
ENCODER
OUTPUT
*A vailable on J,P & LH
package styles only
Figure 1: Block Diagram
PCN/PCS Delta Modulation CODEC 4 MX609
1998 MX-COM, Inc. www.mxcom.com Tel: 800 638 5577 336 744 5050 Fax: 336 744 5054 Doc. # 204800069.005
4800 Bethania Station Road, W inston-Salem, NC 27105-1201 USA All Trademarks and service marks are held by their respective companies.
2 Signal List
1 1 1 Xtal/Clock input Input to the clock oscillator inverter. A 1.024MHz Xtal input
or externally derived clock is injected here. See Clock Mode
pins and figure 3.
2 N/C
232
Xtal output The 1.024 MHz output of the clock oscillator inverter.
3 4 N/C No Connection
4 5 3 Encoder Data
Clock input/
output A logic I/O port. External encode clock input or internal data
clock output. Clock frequency is dependent upon Clock
Mode 1, 2 inputs and Xtal frequency (see Clock Mode pins).
5 6 4 Encoder Output output The encoder digital output. This is a three-state output
whose condition is set by the Data Enable and
Powersave inputs. See Table 2:
67- Idle Force Encoder When this pin is at a logical “0” the encoder is forced to an
idle state and the encoder digital output is 0101, a perfect
idle pattern. When this pin is a logical “1” the encoder
encodes as normal. Internal 1M pullup.
7 8 5 Data Enable input Data is made available at the encoder output pin by control
of this input. See Encoder Output pin. Internal 1 M pullup.
8 9 N/C No Connection
9 10 6 Bias Normally at VDD/2 bias, this pin should be externally
decoupled by capacitor C4. Internally pulled to VSS when
“Powersave ” is a logical “0”.
10 11 7 Encoder Input input The analog signal input. Internally biased at VDD/2, this
input requires an external coupling capacitor. The source
impedance should be less than 100. Output channel noise
levels will improve with an even lower source impedance.
See Figure 3.
11 12 8 VSS power Negative Supply
12 13 - N/C No Connection
13 14 9 Decoder Output output The recovered analog signal is output at this pin. It is the
buffered output of a lowpass filter and requires external
components. During “Powersave” this output is open circuit.
14 15 N/C No Connection
15 16 10 Powersave A logic “0” at this pin puts most parts of the codec into a
quiescent non-operational state. When at a logical “1”, the
codec operates normally. Internal 1 M pullup.
17 No Connection
16 18 - Idle Force Decoder A logic “0” at this pin gates a 0101... pattern internally to the
decoder so that the Decoder Output goes to VDD/2. When
this pin is a logical “1” the decoder operates as normal.
Internal 1M pullup.
17 19 11 Decoder Input The received digital signal input. Internal 1 M pullup.
18 20 12 Decoder Data
Clock input/
output A logic I/O port. External decode clock input or internal data
clock output, dependent upon clock mode 1,2 inputs. See
Clock Mode pins.
19 21 13 Algorithm A logic “1” at this pin sets this device for a 3-bit companding
algorithm. A logical “0” sets a 4-bit companding algorithm.
Internal 1 M pullup.
PCN/PCS Delta Modulation CODEC 5 MX609
1998 MX-COM, Inc. www.mxcom.com Tel: 800 638 5577 336 744 5050 Fax: 336 744 5054 Doc. # 204800069.005
4800 Bethania Station Road, W inston-Salem, NC 27105-1201 USA All Trademarks and service marks are held by their respective companies.
20 22 14 Clock Mode 2
21 23 15 Clock Mode 1 Clock rates refer to f = 1024MHz Xtal/Clock input. During
internal operation the data clock frequencies are available at
the ports for external circuit synchronization. Independent
or common data rate inputs to Encode and Decode data
clock ports may be employed in the External Clocks mode.
Internal 1M pullups.
22 24 16 VDD power Positive Supply. A single 5.0V supply is required.
Table 1: Signal List
Data Enable Powersave Encoder Output
1 1 Enable
0 1 High Z (open circuit)
10V
SS
Table 2: Encoder Output
Clock Mode 1 Clock Mode 2 Facility
0 0 External Clocks
0 1 Internal, 64kbps = f/16
1 0 Internal, 32kbps = f/32
1 1 Internal, 16kbps = f/64
Table 3: Clock Mode
PCN/PCS Delta Modulation CODEC 6 MX609
1998 MX-COM, Inc. www.mxcom.com Tel: 800 638 5577 336 744 5050 Fax: 336 744 5054 Doc. # 204800069.005
4800 Bethania Station Road, W inston-Salem, NC 27105-1201 USA All Trademarks and service marks are held by their respective companies.
3 External Components
1
2
3
4
5
6
7
8
16
15
14
13
12
11
10
9
ä
ä
MX609DW
XTAL
ENCODER DATA CLOCK
ENCODER OUTPUT
DATA ENABLE
BIAS
ENCODER INPUT
V
SS
XTAL/CLOCK
R1
X1
C2 C1
V
DD
C3
C4
C5
CLOCKMODE1
CLOCKMODE2
ALGORITHM
DECODER DATA CLOCK
DECODER INPUT
POWERSAVE
DECODER OUTPUT
V
DD
Figure 2: Recommended External Components for Typical Application
R1 Note 1 1M
10% C4 Note 4 1.0F20%
C1 Note 2 33pF 20% C5 Note 5 1.0F20%
C2 Note 2 68pF 20% X1 Note 6, 7 1.024MHz
C3 Note 3 1.0F20%
Table 4: Recommended External Components for Typical Application
Notes:
1. Oscillator inverter bias resister
2. Xtal circuit load capacitor
3. Encoder input coupling capacitor. The drive source impedance to this input should be less than 100W.
Output idle channel noise levels will improve with even lower source impedance.
4. Bias decoupling capacitor
5. VDD decoupling capacitor
6. A 1.024MHz Xtal/Clock input will yield exactly 16/32/64kbps data clock rates. Xtal circuitry shown is in
accordance with MX-COM’s Xtal Oscillator Application Note.
7. For best results, a crystal oscillator design should drive the clock inverter input with signal levels of at
least 40% of VDD, peak to peak. Tuning fork crystals generally cannot meet this requirement. To obtain
crystal oscillator design assistance, please consult you crystal manufacturer.
4 General Description
The MX609 is a Continuously Variable Slope Delta Modulation (CVSD) Codec designed for use in cordless
telephones. The device is suitable for applications in delta multiplexers, switches and phones. Encoder input
and decoder output switched capacitor filters are incorporated on-chip.
Sampling clock rates can be programmed to 16, 32 or 64K bits/second from an internal clock generator or
externally injected in the 8 to 64K bits/second range. The internal clocks are derived from an on-chip
reference oscillator driven by an externally connected crystal. The sampling clock frequency is output for the
synchronization of external circuits.
The encoder has an enable function for use in multiplexer applications. When not enabled the encoder output
remains in a high-impedance “tri-state” mode.
Companding circuits may be operated with an externally selectable 3- or 4-bit algorithm. The device may be
put in standby mode when Powersave is selected.
PCN/PCS Delta Modulation CODEC 7 MX609
1998 MX-COM, Inc. www.mxcom.com Tel: 800 638 5577 336 744 5050 Fax: 336 744 5054 Doc. # 204800069.005
4800 Bethania Station Road, W inston-Salem, NC 27105-1201 USA All Trademarks and service marks are held by their respective companies.
5 Application
5.1 CODEC Integration
SYNCHRONOUS CLOCK
AND DATA SYSTEM
ANALOG
INPUT
INTERFACE
(BALUN &
BUFFER)
ANALOG
OUTPUT
INTERFACE
(BALUN &
BUFFER)
INPUT OUTPUT
MX609 PARAMETERS
MEASURED HERE MX609 PARAMETERS
MEASURED HERE
REGULATED
POWER SUPPLY
MX609
ENCODER MX609
DECODER
CLOCK MODE
16/32/64 KB/S
DATA DATA
CLOCKS CLOCKS
1.024MHz
1.024MHz
Figure 3: System Configuration using the MX609
5.2 CODEC Performance
Output
Gain
0
-10
-20
-30
-40
-50
dB
Frequency (kHz)
012345678
Input Level = -20dB
Xtal = 1.024MHz
V=5V
Data Clocks = 32kb/s
DD
Figure 4: Typical CODEC Frequency Response
PCN/PCS Delta Modulation CODEC 8 MX609
1998 MX-COM, Inc. www.mxcom.com Tel: 800 638 5577 336 744 5050 Fax: 336 744 5054 Doc. # 204800069.005
4800 Bethania Station Road, W inston-Salem, NC 27105-1201 USA All Trademarks and service marks are held by their respective companies.
Frequency (Hz)
S/N
(dB)
35
30
25
20
15
10
5
500 1000 1500 2000 2500 3000 3500
Input Level = -20dB
64kb/s
32kb/s
16kb/s
Figure 5: Typical S/N Ratio with Input Frequency
5
0
-5
Gain (dB)
Input Level (dB)
ref.
-50 -40 -30 -20 -10 010
SampleRate=32kb/s
Ref: 0dB Input Level = 489mVrms
∆
Figure 6: Typical Variation of Gain with Input Level
35
30
20
10
S/N (dB)
Input Level (dB)
ref.
-40 -30 -20 -10 0
Ref: 0dB Input Level = 489mVrms
Input Frequency = 820 Hz
64 kb/s
32 kb/s
16 kb/s
Figure 7: Typical S/N Ratio with Input Level
PCN/PCS Delta Modulation CODEC 9 MX609
1998 MX-COM, Inc. www.mxcom.com Tel: 800 638 5577 336 744 5050 Fax: 336 744 5054 Doc. # 204800069.005
4800 Bethania Station Road, W inston-Salem, NC 27105-1201 USA All Trademarks and service marks are held by their respective companies.
6 Performance Specification
6.1 Electrical Performance
6.1.1 Absolute Maximum Ratings
Exceeding these maximum ratings can result in damage to the device.
Min. Max. Units
Supply (VDD - VSS) -0.3 7.0 V
Voltage on any pin to VSS -0.3 VDD + 0.3 V
Current
VDD -30 30 mA
VSS -30 30 mA
any other pin -20 20 mA
J / P / LH / DW Packages
Total Allowable Power Dissipation at TAMB = 25°C - 800 mW
Derating above 25°C - 10 mW/°C above 25°C
Storage Temperature -40 85 °C
Operating Temperature -40 85 °C
6.1.2 Operating Limits
Correct operation of the device outside these limits is not implied.
Min Typ. Max. Units
Supply (VDD - VSS) 4.5 5.0 5.5 V
Operating Temperature -30 70 °C
Xtal Frequency 500 1.024 1500 MHz
PCN/PCS Delta Modulation CODEC 10 MX609
1998 MX-COM, Inc. www.mxcom.com Tel: 800 638 5577 336 744 5050 Fax: 336 744 5054 Doc. # 204800069.005
4800 Bethania Station Road, W inston-Salem, NC 27105-1201 USA All Trademarks and service marks are held by their respective companies.
6.1.3 Operating Characteristics
For the following conditions unless otherwise specified:
VDD = 5.0V at TAMB = 25°C, Audio Test Frequency = 820Hz Xtal/Clock f0 = 1.024MHz
Sample Clock Rate = 32kbps, Audio level 0dB ref (0 dBm0) = 489mVRMS.
Note
sMin. Typ. Max. Units
Static Values
Supply Voltage 1 4.5 5.0 5.5 V
Supply Current (Enabled) 3.5 mA
Supply Current (Powersave) 500 A
Input logic ‘1’ 3.5 V
Input Logic ‘0’ 1.5 V
Output Logic ‘1’ 4.0 V
Output Logic ‘0’ 1.0 V
Digital input Impedance
Logic I/O pins 10 M
Logic Input pins, Pullup Resistor 2 300 k
Digital output impedance 4 k
Analog Input Impedance 100 k
Analog Output Impedance 6 800
Three State Output Leakage 4A
Insertion Loss 2 0 dB
Dynamic Values 1
Encoder
Analog signal Input levels 6 -30 8 dB
Principal Integrator Frequency 275 Hz
Encoder passband 3400 Hz
Compand Time Constant 4 ms
Decoder
Analog Signal Output Levels 6 -30 0 8 dB
Decoder Passband 3 3400 Hz
Encoder Decoder (Full Codec)
Passband 300 3400 Hz
Stopband 6 10 KHz
Stopband Attenuation 60 dB
Passband Gain 0 dB
Passband Ripple -3 3 dB
Output Noise (Input Short Circuit) -60 dB
Perfect Idle Channel Noise
(Encode Forced) 7 -63 dB
Group Delay Distrotion 4
(1000Hz-2600Hz) 450 s
(600Hz-2800Hz) 750 s
(500Hz-3000Hz) 1.5 s
Xtal/clock Frequency 500 1024 1500 kHz
PCN/PCS Delta Modulation CODEC 11 MX609
1998 MX-COM, Inc. www.mxcom.com Tel: 800 638 5577 336 744 5050 Fax: 336 744 5054 Doc. # 204800069.005
4800 Bethania Station Road, W inston-Salem, NC 27105-1201 USA All Trademarks and service marks are held by their respective companies.
Notes:
1. Dynamic characteristics specified at 5.0V only.
2. All logic inputs except Encoder and Decoder Data clocks
3. With passband gain of 1dB.
4. Group Delay Distortion for the full codec is relative to the delay with and 820Hz, -20dB signal at the
encoder input
5. Relative timings are shown in figure 4
6. Recommended values
7. Forced idle Encode/Decode not available on DW package.
6.1.4 TIMING
Serial Bus Timings (See Figure 8) Min. Typ. Max. Units
tCH Clock 1 pulse width 1.0 s
tCL Clock 0 pulse width 1.0 s
tIR Clock rise time 0 100 ns
tIF Clock fall time 100 ns
tSU Data set-up time 450 ns
tHData hold time 600 ns
tSU +tHData true time 1.5 s
tPCO Clock to output delay time 750 ns
tDR Data rise time 100 ns
tDF Data fall time 100 ns
Xtal input frequency = 1.024MHz
ENCODER TIMING
DECODER TIMING
MULTIPLEXING FUNCTION
ENCODER
CLOCK
ENCODER DATA
OUTPUT
DECODER
CLOCK
DECODER DATA
INPUT
ENCODER
OUTPUT
DATA ENABLE
HIGH Z HIGH Z
DATA TRUE TIME
DATA CLOCKED
DATA CLOCKED
CH
H
SU
DR DF
PCO
CH
CL
IF IR
t
t
t
tt
t
t
t
tt
Figure 8: Serial Bus Timing
PCN/PCS Delta Modulation CODEC 12 MX609
1998 MX-COM, Inc. www.mxcom.com Tel: 800 638 5577 336 744 5050 Fax: 336 744 5054 Doc. # 204800069.005
4800 Bethania Station Road, W inston-Salem, NC 27105-1201 USA All Trademarks and service marks are held by their respective companies.
6.2 Packaging
PIN 1
A
B
ALTERNATIVE
PIN
LOCATION
MARKING
X
P
J
Y
CK
H
E
L
T
W
Z
NOTE : All dime n s io n s in inches (mm.)
Angles are in degrees
PackageTolerances
A
B
C
E
H
TYP. MAX.MIN.
DIM.
J
P
X
W
T
Y
K
L
0.105 (2.67)0.093 (2.36) 0.419 (10.64)
45°
7°
0° 10°
0.050 (1.27)
0.041 (1.04)
0.413 (10.49)
0.299 (7.59)
0.050 (1.27)
0.016 (0.41)
0.390 (9.90) 0.020 (0.51)0.003 (0.08)
0.009 (0.23) 0.0125 (0.32)
0.013 (0.33) 0.020 (0.51)
0.395 (10.03)
0.286 (7.26)
Z
5°
5°
Figure 9: 16-pin SOIC (DW) Mechanical Outline:
Order as part no. MX609DW
PackageTolerances
NOTE : All dime n sio ns in inche s (mm.)
Angles are in degrees
A
B
C
D
E
H
P
F
G
TYP. MAX.MIN.DIM.
K
J
W
T
Y
0.435 (11.05)
0.435 (11.05)
0.051 (1.30)
0.009 (0.22)
6°
30°
0.409 (10.40)
0.409 (10.40)
0.146 (3.70)
0.417 (10.60)
0.417 (10.60)
0.049 (1.24)
0.006 (0.152)
0.250 (6.35)
0.250 (6.35)
0.023 (0.58)
0.047 (1.19) 0.022 (0.55)0.018 (0.45)
0.380 (9.61)
0.380 (9.61)
0.128 (3.25)
0.048 (1.22)
45°
F
G
P
A
D
B
E
PIN 1
W
C
J
K
Y
WH
T
Figure 10: 24-pin PLCC (LH) Mechanical Outline:
Order as part no. MX609LH
PCN/PCS Delta Modulation CODEC 13 MX609
1998 MX-COM, Inc. www.mxcom.com Tel: 800 638 5577 336 744 5050 Fax: 336 744 5054 Doc. # 204800069.005
4800 Bethania Station Road, W inston-Salem, NC 27105-1201 USA All Trademarks and service marks are held by their respective companies.
NOTE : All dimensions in inches (mm.)
Angles are in degrees
Package Tolerances
A
B
C
E
E1
H
TYP. MAX.MIN.DIM.
J
J1
K
L
0.360 (9.14)
0.480 (12.19)
0.128 (3.25)
1.100 (27.94)
0.185 (4.70)
0.420 (10.67)
0.390 (9.91) 0.420 (10.67)
0.020 (0.51) 0.020 (0.51)
0.040 (1.02)0.066 (1.68)
1.080 (27.43)
0.330 (8.38)
0.100 (2.54)
0.045 (1.14)
0.065 (1.65)
0.015 (0.38)
P
0.010 (0.25)
T
Y
7°
E
Y
E1
T
C
P
J1
K
H
J
L
B
A
PIN 1
Figure 11: 22-pin PDIP (P) Mechanical Outline:
Order as part no. MX609P
NOTE : All dime n s io n s in inches (mm.)
Angles are in degrees
Package Tolerances
B
A
H
K
L
E
F
J1
JP
C
K1
E1
T
PIN1
A
B
C
E
E1
F
H
TYP. MAX.MIN.DIM.
J
J1
P
T
K1
K
L
0.230 (5.84)
0.384 (9.75)
0.515 (13.08)
0.171 (4.34)
1.080 (27.43)
0.165 (4.19)
0.100 (2.54)
0.115 (2.92)
0.466 (11.84)
0.408 (10.36) 0.418 (10.62)
1.000 (25.40)
0.020 (0.51)
0.018 (0.46)
0.058 (1.47)
0.075 (1.91) 0.080 (2.03)
0.080 (2.03)
1.060 (26.92)
0.376 (9.55)
0.0102 (0.259)
0.055 (1.40)
0.0098 (0.249)
Figure 12: 22-pin CERDIP (J) Mechanical Outline:
Order as part no. MX609J
