August 2001
2001 Fairc hild S emi c onduc tor Corporation FDC2612 Rev B2 (W)
FDC2612
200V N-Channel PowerTrench
MOSFET
General Description
This N-Channel MOSFET has been designed
specifically to improve the overall efficiency of DC/DC
converters using either synchronous or conventional
switching PWM controllers. It has been optimized for
low gate charge, low RDS(ON) and fast switching speed.
Applications
• DC/DC converter
Features
• 1.1 A, 200 V. RDS(ON) = 725 mΩ @ VGS = 10 V
• High performanc e trenc h technology for extremely
low RDS(ON)
• High power and current handling c apability
• Fast switching speed
• Low gate charge (8nC typical )
D
D
D
S
D
G
SuperSOT -6
TM
6
5
4
1
2
3
Absolute Maximum Ratings TA=25oC unless otherwise noted
Symbol Parameter Ratings Units
VDSS Drain-Sourc e V oltage 200 V
VGSS Gate-Source Voltage ± 20 V
IDDrain Current – Continuous (Note 1a) 1.1 A
– Pulsed 4
Maximum Power Dissipation (Note 1a) 1.6 WPD
(Note 1b) 0.8
TJ, TSTG Operating and Storage Junction Temperature Range −55 to +150 °C
Thermal Characteristics
RθJA Thermal Resistance, Junction-to-Am bient (Note 1a) 78 °C/W
RθJC Thermal Resistance, Junction-to-Case (Note 1) 30 °C/W
Package Marking and Ordering Information
Device Marking Device Reel Size Tape width Quantity
.612 FDC2612 7’’ 8mm 3000 units
FDC2612
FDC2612 Rev B2(W )
Electrical Characteristics TA = 25°C unless otherwise noted
Symbol Parameter Test Conditions Min Typ Max Units
Off Characteristics
BVDSS Drain–Source Breakdown Voltage VGS = 0 V, ID = 250 µA200 V
∆BVDSS
∆TJ
Breakdown Voltage Temperature
Coefficient ID = 250 µA, Referenced to 25°C246 mV/°C
IDSS Zero Gate Voltage Drain Current VDS = 160 V, VGS = 0 V 1 µA
IGSSF Gate–Body Leakage, Forward VGS = 20 V, VDS = 0 V 100 nA
IGSSR Gate–Body Leak age, Reverse VGS = –20 V , VDS = 0 V –100 nA
On Characteristics (Note 2)
VGS(th) Gate Threshold Voltage VDS = VGS,I
D = 250 µA244.5V
∆VGS(th)
∆TJ
Gate Threshold Voltage
Temperature Coeffic i ent ID = 250 µA, Referenced to 25°C–8.7 mV/°C
RDS(on) Static Drain–S ource
On Resistance VGS = 10 V, ID = 1.1 A
VGS = 10 V, ID = 1.1 A, TJ = 125°C605
1133 725
1430 mΩ
ID(on) On–Stat e Drain Current VGS = 10 V, VDS = 10 V 4 A
gFS Forward Transconductance VDS = 10 V, ID = 1.1 A 4.4 S
Dynam ic Ch aracteristics
Ciss Input Capacitance 234 pF
Coss Output Capacitance 18 pF
Crss Reverse Transfer Capaci t ance
VDS = 100 V, V GS = 0 V,
f = 1.0 MHz
8pF
Switching Characteristics (Note 2)
td(on) Turn–On Delay Time 6 12 ns
trTurn–On Rise Time 6 12 ns
td(off) Turn–Of f Delay Time 17 30 ns
tfTurn–Off Fall Time
VDD = 100 V, ID = 1 A,
VGS = 10 V, RGEN = 6 Ω
816ns
QgTotal Gate Charge 8 11 nC
Qgs Gate–Source Charge 1.6 nC
Qgd Gate–Drain Charge
VDS = 100 V, ID = 1.1 A,
VGS = 10 V
2.2 nC
Drain–Source Diode Characteristics and Maximum Ratings
ISMaximum Continuous Drai n–S ource Diode Forward Current 1.3 A
VSD Drain–Source Di ode Forward
Voltage VGS = 0 V, IS = 1.3 A(Note 2) 0.8 1.2 V
Notes:
1.RθJA is the sum of the junction-to-case and case-to-ambient thermal resistance where the case thermal reference is defined as the solder mounting surface of
the drain pins. RθJC is guaranteed by design while RθCA is determined by the user's board design.
a) 78°C/W when
mounted on a 1in2 pad
of 2 oz copper
b) 156°C/W when mounted
on a minimum pad of 2 oz
copper
Scale 1 : 1 on letter size paper
2. Pulse Test: Pulse Width < 300µs, Duty Cycle < 2.0%
FDC2612
FDC2612 Rev B2(W )
Typical Characteristics
0
1
2
3
4
0246810
VDS, DRAIN-SOU RCE V OLTAGE (V)
I
D
, DRAIN CURRENT (A)
6.5V
5.5V
VGS = 10V 6.0V
0.9
1
1.1
1.2
1.3
1.4
01234
ID, DRAIN CURRENT (A)
R
DS(ON)
, NORMALIZED
DRAIN-SOURCE ON-RESISTANCE
VGS = 4.0V
4.5V 5.0V 10V
6.0V
Figure 1. On-Region Characteristics. Figure 2. On-Resistance Variation with
Drain Current and Gate Voltage.
0.2
0.6
1
1.4
1.8
2.2
2.6
-50 -25 0 25 50 75 100 125 150
TJ, JUNCTION TEMPERATURE (oC)
R
DS(ON)
, NORMALIZED
DRAIN-SOURCE ON-RESISTANCE
ID = 1.1A
VGS =10V
0.5
0.7
0.9
1.1
1.3
1.5
45678910
VGS, GATE TO SOURCE VOLTAGE (V)
R
DS(ON)
, ON-RESISTANCE (OHM)
ID = 0.6A
TA = 125oC
TA = 25oC
Figure 3. On-Resistance Variation with
Temperature. Figure 4. On-Resistance Variation with
Gate-to-Source Voltage.
0
2
4
6
8
34567
VGS, GATE TO SOURCE VOLTAGE (V)
I
D
, DRAIN CURRENT (A)
TA = 125oC
-55oC
VDS = 25V
25oC
0.0001
0.001
0.01
0.1
1
10
0 0.2 0.4 0.6 0.8 1 1.2
VSD, BODY DIODE FORWARD VOLTAGE (V)
I
S
, REVERSE DRAIN CURRENT (A)
TA = 125oC
25oC
-55oC
VGS = 0V
Figure 5. Transfer Characteristics. Figure 6. Body Diode Forward Voltage Variation
with Source Current and Temperature.
FDC2612
FDC2612 Rev B2(W)
Typical Characteristics
0
3
6
9
12
15
0246810
Qg, GATE CHARGE (nC)
V
GS
, GATE-SOURCE VOLTAGE (V)
ID = 1.1A VDS = 50V
150V
100V
0
50
100
150
200
250
300
350
0 25 50 75 100 125 150
VDS, DRAIN TO SOURCE VOLTAGE (V)
CAPACITANCE (pF)
CISS
CRSS
COSS
f = 1MHz
VGS = 0 V
Figure 7. Gate Charge Characteristics. Figure 8. Capacitance Characteristics.
0.001
0.01
0.1
1
10
0.1 1 10 100 1000
VDS, DRAIN-SOURCE VOLTAGE (V)
I
D
, DRAIN CURRENT (A)
DC1s
100ms
100
µ
s
RDS(ON) LIMIT
VGS = 10V
SINGLE PULSE
RθJA = 156oC/W
TA = 25oC
10ms
1ms
0
10
20
30
40
0.001 0.01 0.1 1 10 100 1000
t1, TI ME (sec)
P(pk), PEAK TRANSIENT POWER (W)
SINGLE PULSE
RθJA = 156°C/W
TA = 25°C
Figure 9. Maximum Safe Operating Area. Figure 10. Single Pulse Maximum
Power Dissipation.
0.01
0.1
1
0.0001 0.001 0.01 0.1 1 10 100 1000
t1, TIME (sec)
r(t), NORMALIZED EFFECTIVE
TRANSIENT THERMAL RESISTANCE
RθJA(t) = r(t) + RθJA
RθJA = 156°C/W
TJ - TA = P * RθJA(t)
Duty Cycle, D = t1 / t2
P(pk)
t1t2
SINGLE PULSE
0.01
0.02
0.05
0.1
0.2
D = 0.5
Figure 11. Transient Thermal Response Curve.
Thermal characterization performed using the conditions described in Note 1b.
Transient thermal response will change depending on the circuit board design.
FDC2612
SuperSOTTM-6 Tape and Reel Data
May 2001, Rev. D
©2001 Fairchild Semiconductor Corporation
Embossed
Carrier Tape
SSOT-6 Packaging
Configuration: Figure 1.0
Components Leader Tape
500mm mini mum or
125 empty pockets
Tr ailer Ta pe
300mm mini mum or
75 empt y pock ets
SSOT -6 Tape Leader and Trailer
Configuration: Figure 2.0
Cover Tape
Carrier Tape
Note/Comments
Packaging Option
SSOT-6 Packaging Information
Standard
(no flow code) D87Z
Packaging type
Reel Size
TNR
7” Dia
TNR
13”
Qt y per Ree l/Tube /B ag 3,000 10,000
Box Dimen sion (mm) 193x183x80 355x333x40
Max qt y per Box 15,000 30,000
Weight per unit (g m) 0.0158 0.0158
Weight per Re el (kg) 0.1440 0.4700
F63TNR
Label
Customi ze Label
Antis t atic Cover Tape
SSOT-6 Unit Orientation
631
631631
631 631
Pi n 1
LOT: CBVK741B019
FSID: FDC633N
D/C1: D9842AB QTY1: SPEC REV:
SPEC:
QTY: 3000
D/C2: QTY2: CPN:
3000
CBVK741B019
FDC633N
Packaging Description:
SSOT-6 parts are shipped in tape. The carrier tape is
made from a dissipative (carbon filled) polycarbonate
resin. The cover tape is a multilayer film (Heat Activated
Adhesive in nature) primarily composed of pol yester film,
adhesive layer, sealant, and anti-static sprayed agent.
These reeled parts in standard option are shipped with
3,000 units per 7” or 177cm diameter reel. The reels are
dark blue in color and is made of polystyrene plastic (anti-
static c oated). Other option com es in 10,000 unit s per 13”
or 330cm diameter reel. Thi s and some other options are
described in the Packaging Information table.
These full reels are individually barcode labeled and
placed inside a pizza box (illustrated in figure 1.0) made of
recyclable corrugated brown paper with a Fairchild logo
printing. One pizza box contains five reels maximum. And
these pizza boxes are placed inside a barcode labeled
shipping box whi ch com es i n dif fe rent si ze s depending on
the number of parts shipped.
Barcode
Label
Barcode L abel
355mm x 333mm x 40mm
Intermediate contai ner for 13” reel option
193mm x 183mm x 80mm
Pizza Box for Standard Option
Barcode
Label
Barcode L abel sample
FAIRCHILD SEMICONDUCTO R CORPORATION (F63T
1998 Fairchild Semiconductor Corporation
P1
A0 D1
P0
F
W
E1
D0
E2
B0
Tc
Wc
K0
T
Dimensions are in inches and millimeters
Tape Size Reel
Option Dim A Dim B Dim C Dim D Dim N Dim W1 Dim W2 Dim W3 (LSL-USL)
8mm 7" Dia 7.00
177.8 0.059
1.5 512 +0.020/-0.008
13 +0.5/-0.2 0.795
20.2 2.165
55 0.331 +0.059/-0.000
8.4 +1.5/0 0.567
14.4 0.311 – 0.429
7.9 – 10.9
8m m 13" Dia 13.00
330 0.059
1.5 512 +0.020/-0.008
13 +0.5/-0.2 0.795
20.2 4.00
100 0.331 +0.059/-0.000
8.4 +1.5/0 0.567
14.4 0.311 – 0.429
7.9 – 10.9
See detail AA
Dim A
max
13" Diameter Option
7" Diameter Option
Dim A
Max
See detail AA
W3
W2 max Measured at Hub
W1 Measured at Hub
Dim N
Dim D
min
Dim C
B Min
DETAIL AA
Notes: A0, B0, and K0 dimensions are determined with respect to the EIA/Jedec RS-481
rotational and lateral movement requirements (see sketches A, B, and C).
20 deg maximum component rotation
0.5mm
maximum
0.5mm
maximum
Sketch C (Top View)
Component lateral movement
Typical
component
cavity
center line
20 deg m aximum
Typical
component
center line
B0
A0
Sketch B (Top View)
Component Rotation
Sketch A (Side or Front Sectional View)
Component Rotation
User Dire c tion of Feed
SSOT-6 Embossed Carrier Tape
Configuration: Fi
g
ure 3.0
SSOT-6 Reel Configuration: Fi
g
ure 4.0
Dimensions are in millimeter
Pkg type A0 B0 W D0 D1 E1 E2 F P1 P0 K0 T Wc Tc
SSOT-6
(8mm) 3.23
+/-0.10 3.18
+/-0.10 8.0
+/-0.3 1.55
+/-0.05 1.125
+/-0.125 1.75
+/-0.10 6.25
min 3.50
+/-0.05 4.0
+/-0.1 4.0
+/-0.1 1.37
+/-0.10 0.255
+/-0.150 5.2
+/-0.3 0.06
+/-0.02
SuperSOTTM-6 Tape and Reel Data, continued
July 1999, Rev. C
SuperSOT-6 (FS PKG Code 31, 33)
SuperSOTTM-6 Package Dimensions
September 1998, Rev. A
1:1
Scale 1:1 on letter size paper
Dimensions shown belo w are in:
inches [millimeters]
Pa rt Weight per unit (gram): 0.0158
©2000 Fairchild Semiconductor International
DISCLAIMER
FAIRCHILD SEMICONDUCTOR RESERVES THE RIGHT TO MAKE CHANGES WITHOUT FURTHER
NOTICE TO ANY PRODUCTS HEREIN TO IMPROVE RELIABILITY, FUNCTION OR DESIGN. FAIRCHILD
DOES NOT ASSUME ANY LIABILITY ARISING OUT OF THE APPLICATION OR USE OF ANY PRODUCT
OR CIRCUIT DESCRIBED HEREIN; NEITHER DOES IT CONVEY ANY LICENSE UNDER ITS PATENT
RIGHTS, NOR THE RIGHTS OF OTHERS.
TRADEMARKS
The following are registered and unregistered trademarks Fairchild Semiconductor owns or is authorized to use and is
not intended to be an exhaustive list of all such trademarks.
LIFE SUPPORT POLICY
FAIRCHILD’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT
DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF FAIRCHILD SEMICONDUCTOR CORPORATION.
As used herein:
1. Life support devices or systems are devices or
systems which, (a) are intended for surgical implant into
the body, or (b) support or sustain life, or (c) whose
failure to perform when properly used in accordance
with instructions for use provided in the labeling, can be
reasonably expected to result in significant injury to the
user.
2. A critical component is any component of a life
support device or system whose failure to perform can
be reasonably expected to cause the failure of the life
support device or system, or to affect its safety or
effectiveness.
PRODUCT STATUS DEFINITIONS
Definition of Terms
Datasheet Identification Product Status Definition
Advance Information
Preliminary
No Identification Needed
Obsolete
This datasheet contains the design specifications for
product development. Specifications may change in
any manner without notice.
This datasheet contains preliminary data, and
supplementary data will be published at a later date.
Fairchild Semiconductor reserves the right to make
changes at any time without notice in order to improve
design.
This datasheet contains final specifications. Fairchild
Semiconductor reserves the right to make changes at
any time without notice in order to improve design.
This datasheet contains specifications on a product
that has been discontinued by Fairchild semiconductor.
The datasheet is printed for reference information only.
Formative or
In Design
First Production
Full Production
Not In Production
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VCX™
