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®HS-303ARH, HS-303BRH
Radiation Hardened
CMOS Dual SPDT Analog Switch
The HS-303ARH and HS-303 BRH analog switches are
monolithic devices fabricated using Intersil’s dielectrically
isolated Radiation Hardened Silicon Gate (RSG) process
technology to insure latch-up free operation. They are pinout
compatible and functionally equivalent to the HS-303RH, but
offer improved 300kRAD(Si) total dose capability. These
switches offers low-resistance switching performance for
analog voltages up to the supply rails. “ON” resist ance is low
and stays reasonably constant over the full range of
operating voltage and current. “ON” resistance also stays
reasonably constant when exposed to radiation.
Break-before-make switching is controlled by 5V digital
inputs. The HS-303ARH should be operated with nomi nal
±15V supplies, while the HS-303BRH should be operated
with nominal ±12V supplies.
Specifications
Specifications for Rad Hard QML devices are controlled by
the Defense Supply Center in Columbus (DSCC). The SMD
numbers listed below must be used when orde ring.
Detailed Electrical Specifications for the HS-303ARH and
HS-303BRH are contained in SMD 5962-95813. A “hot-link”
is provided from our website for downloading
Features
• QML, Per MIL-PRF-38535
• Radiation Performance
- Total Dose: 3x105 RAD(Si)
- SEE: For LET = 60MeV-mg/cm2 at 60° Incident Angle,
<150pC Charge Transferred to the Output of an Off
Switch
• No Latch-Up, Dielectrically Isolated Device Islands
• Pinout and Functionally Compatible with Intersil
HS-303RH and HI-303 Series Analog Switch es
• Analog Signal Range Equal to the Supply Voltage Range
• Low Leakage . . . . . . . . . . . . . . . . 100nA (Max, Post-Rad)
•Low r
ON . . . . . . . . . . . . . . . . . . . . . .70Ω (Max, Post-Rad)
• Low Standby Supply Current . . . . . . . . . . +150µA/-100µA
(Max, Post-Rad)
Pinouts
HS1-303ARH, HS-303BRH (SBDIP), CDIP2-T14
TOP VIEW
HS9-303ARH, HS-303BRH (FLATPACK) CDFP3-F14
TOP VIEW
NC
GND
V+
V-
1
2
3
4
5
6
7
14
13
12
11
10
9
8
IN1
S3
D3
D1
S4
D4
D2
IN2
S2
S1
NC
GND
IN1
S3
D3
D1
S1
V+
V-
S4
D4
D2
IN2
S2
14
13
12
11
10
9
8
2
3
4
5
6
7
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Data Sheet July 7, 2008 FN6411.1
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
1-888-INTERSIL or 1-888-468-3774 |Intersil (and design) is a registered trademark of Intersil Americas Inc.
Copyright Intersil Americas Inc. 2006, 2008. All Rights Reserved
All other trademarks mentioned are the property of their respective owners.
2FN6411.1
July 7, 2008
Ordering Information
ORDERING NUMBER PART NUMBER TEMP. RANGE
(°C) PKG. PKG.
DWG. #
5962F9581304QCC HS1-303ARH-8 -5 5 to + 1 2 5 14 LD S B D I P D1 4 . 3
5962F9581304QXC HS9-303ARH-8 -55 to + 1 2 5 14 L D Fl a t p a c k K1 4 . A
5962F9581304V9A HS0-303ARH-Q -5 5 to + 1 2 5 14 Ld SBDI P D1 4 . 3
5962F9581304VCC HS1-303ARH-Q -5 5 to + 1 2 5 14 LD SBDI P D 14 . 3
5962F9581304VXC HS9-303ARH-Q -5 5 to + 1 2 5 14 LD Flat pack K1 4 . A
HS0-303ARH/SAMPLE HS 0-303 A R H/ S A M P L E -5 5 to + 1 2 5
HS1-303ARH/PROTO HS 1 - 30 3 A R H / P R O T O -5 5 to + 1 2 5 14 L D S B DI P D 1 4 . 3
HS9-303ARH/PROTO HS 9 - 30 3 A R H / P R O T O -5 5 to + 1 2 5 14 L D F latp a ck K1 4 . A
5962F9581305QCC HS1-303BRH-8 -5 5 to + 1 2 5 14 LD S B D I P D1 4 . 3
5962F9581305QXC HS9-303BRH-8 -55 to + 1 2 5 14 L D Fl a t p a c k K1 4 . A
5962F9581305V9A HS0-303BRH-Q -5 5 to + 1 2 5 14 LD SBDI P D 14 . 3
5962F9581305VCC HS1-303BRH-Q -5 5 to + 1 2 5 14 LD SBDI P D 14 . 3
5962F9581305VXC HS9-303BRH-Q -5 5 to + 1 2 5 14 LD Flat pack K1 4 . A
HS0-303BRH/SAMPLE HS 0-303 B R H/ S A M P L E -5 5 to + 1 2 5
HS1-303BRH/PROTO HS 1 - 30 3 B R H / P R O T O -5 5 to + 1 2 5 14 L D S B DI P D 1 4 . 3
HS9-303BRH/PROTO HS 9 - 30 3 B R H / P R O T O -5 5 to + 1 2 5 14 L D F latp a ck K1 4 . A
HS-303ARH, HS-303BRH
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All Intersil U.S. products are manufactured, assembled and tested utilizing ISO9000 quality systems.
Intersil Corporation’s quality certifications can be viewed at www.intersil.com/design/quality
Intersil products are sold by description only. Intersil Corporation reserves the right to make changes in circuit design, software and/or specifications at any time without
notice. Accordingly, the reader is cautioned to verify that data sheets are current before placing orders. Information furnished by Intersil is believed to be accurate and
reliable. However, no responsibility is assumed by Intersil or its subsidiaries for its use; nor for any infringements of patents or other rights of third parties which may result
from its use. No lice nse is gran t ed by i mpli catio n or other wise u nder an y p a tent or patent right s of I nter sil or it s sub sidi aries.
For information regarding Intersil Corporation and its products, see www.intersil.com
FN6411.1
July 7, 2008
Functional Diagram
Die Characteristics
DIE DIMENSIONS:
2690µm x 5200µm (106 milsx205 mils)
Thickness: 483µm ± 25.4µm (19 mils ± 1 mil)
INTERFACE MATERIALS:
Glassivation:
Type: PSG (Phosphorous Silicon Glass)
Thickness: 8.0kÅ ± 1.0kÅ
Top Metallization:
Type: AlSiCu
Thickness: 16.0kÅ ± 2kÅ
Substrate:
Radiation Hardened Silicon Gate,
Dielectric Isolation
Backside Finish:
Silicon
ASSEMBLY RELATED INFORMATION:
Substrate Potential:
Unbiased (DI)
ADDITIONAL INFORMATION:
Worst Case Current Density:
<2.0 x 105 A/cm2
Transistor Count:
196
Metallization Mask Layout HS-303ARH, HS-303BRH
N P
IN
D
TRUTH TABLE
LOGIC SW1 AND SW2 SW3 AND SW4
0OFFON
1ONOFF
D3
D1
S1
IN1
GND
V-
D4
D2
S2
IN2
S3
V+
S4
HS-303ARH, HS-303BRH
