LT8471 Dual Multitopology DC/DC Converters with 2A Switches and Synchronization Features n n n n n n n n n Description Dual 2A and One 500mA, 50V Internal Power Switch Channels 2A Primary Channels Can Be Buck, Boost, SEPIC, ZETA, Flyback or Inverting DC/DC Converter 500mA Skyhook Channel Efficiently Generates Boosted Input Voltage Wide Input Voltage Range of 2.6V to 50V UVLO and OVLO Programmable on OV/UV Pin Soft-Start Programmable for Each Channel Fixed Frequency PWM (Set by RT Pin or Synchronized to External Clock) Anti-Phase Switching Reduces Input Ripple 20-Lead TSSOP Package The LT(R)8471 is a dual PWM DC/DC converter containing two internal 2A, 50V switches and an additional 500mA switch to facilitate step-down and inverting conversion. Each 2A channel can be independently configured as a buck, boost, SEPIC, flyback or inverting converter. Capable of generating positive and negative outputs from a single input rail, the LT8471 is ideal for many local power supply designs. The LT8471 has an adjustable oscillator, set by a resistor placed from the RT pin to ground. Additionally, the LT8471 can be synchronized to an external clock. The free running or synchronized switching frequency range of the part can be set between 100kHz and 2MHz. Applications n n Additional features such as frequency foldback, soft-start, and power good are integrated. The LT8471 is available in a 20-lead TSSOP package. Dual Rail Power for Signal Chain. Buck/Buck, Buck/Boost, Boost/Boost, Boost/Invert, Invert/Invert, Buck/Invert L, LT, LTC, LTM, Linear Technology and the Linear logo are registered trademarks of Linear Technology Corporation. All other trademarks are the property of their respective owners. Typical Application 6V to 32V to 5V, Dual DC/DC Converter 1F E1 316k 47F x2 FB1 2.2F 59k 15H C3 475k 100k 100k GND LT8471 59k OV/UV 47F x2 FB2 316k PG1 E2 PG2 VOUT2 -5V 0.65A 10H C2 SS1 SS2 90 VOUT1 5V 1.5A 4 80 EFFICIENCY 70 3 60 50 POWER LOSS 2 40 30 VCC = 20 10 0 0 0.2 0.4 0.6 LOAD CURRENT (A) 0.8 POWER LOSS (W) C1 6V TO 32V 2.2F 10H VIN2 SHOUT EFFICIENCY (%) VIN1 1F Efficiency and Power Loss Load from VOUT1 to VOUT2 1 6V 18V 32V 0 1.0 8471 F10b SYNC RT 2.2F 0.1F 0.1F 187k 8471 TA01a 8471fc For more information www.linear.com/8471 1 LT8471 Absolute Maximum Ratings (Note 1) VIN1, VIN2 Voltages...................................... -0.3V to 50V C1, C2 Voltages........................................... -0.4V to 50V E1, E2 Voltages............................................ -60V to 50V VC1 to VE1 and VC2 to VE2 Voltages............. -0.4V to 60V VIN1 to VE1 and VIN2 to VE2 Voltages Low Side Configurations (Note 6)........... -0.4V to 40V High Side Configurations (Note 6).......... -0.4V to 60V VIN1 to VC1 and VIN2 to VC2 Voltages High Side Configurations (Note 6).......... -0.4V to 40V C3 Voltage.................................................. -0.4V to 50V RT Voltage.................................................... -0.3V to 5V SYNC Voltage............................................. -0.3V to 5.5V SS1, SS2.................................................... -0.3V to 2.5V FB1, FB2 Voltages...................................... -2.5V to 2.5V PG1, PG2 Voltages...................................... -0.3V to 50V OV/UV Voltage.............................................. -0.3V to 5V SHOUT Voltage .......................................... -0.3V to 50V Operating Junction Temperature Range LT8471E (Notes 2, 5).......................... -40C to 125C LT8471I (Notes 2, 5)........................... -40C to 125C LT8471H (Notes 2, 5).......................... -40C to 150C Storage Temperature Range................... -65C to 150C Lead Temperature (Soldering, 10 sec) FE Package........................................................ 300C Pin Configuration TOP VIEW C1 1 20 C2 E1 2 19 E2 VIN1 3 18 VIN2 PG1 4 FB1 5 OV/UV 6 RT 7 14 SHOUT SS1 8 13 C3 SYNC 9 12 GND GND 10 11 GND 17 PG2 21 GND 16 FB2 15 SS2 FE PACKAGE 20-LEAD PLASTIC TSSOP JA = 38C/W EXPOSED PAD (PIN 21) IS GND, MUST BE SOLDERED TO PCB Order Information LEAD FREE FINISH TAPE AND REEL PART MARKING* PACKAGE DESCRIPTION TEMPERATURE RANGE LT8471EFE#PBF LT8471EFE#TRPBF LT8471FE 20-Lead Plastic TSSOP -40C to 125C LT8471IFE#PBF LT8471IFE#TRPBF LT8471FE 20-Lead Plastic TSSOP -40C to 125C LT8471HFE#PBF LT8471HFE#TRPBF LT8471FE 20-Lead Plastic TSSOP -40C to 150C Consult LTC Marketing for parts specified with wider operating temperature ranges. *The temperature grade is identified by a label on the shipping container. Consult LTC Marketing for information on nonstandard lead based finish parts. For more information on lead free part marking, go to: http://www.linear.com/leadfree/ For more information on tape and reel specifications, go to: http://www.linear.com/tapeandreel/ 2 8471fc For more information www.linear.com/8471 LT8471 Electrical Characteristics The l denotes the specifications which apply over the full operating temperature range, otherwise specifications are at TA = 25C. VIN1 = VIN2 = 5V, unless otherwise noted (Note 2). PARAMETER CONDITIONS TYP MAX 50 V VOV/UV = 1.3V, Not Switching 2.2 3.3 mA Quiescent Current (VIN1, Skyhook Enabled) VOV/UV = 1.3V, C3 = 5V, Not Switching 2.4 4 mA Quiescent Current (VIN2) VOV/UV = 1.3V, Not Switching 29 42 A Quiescent Current in Shutdown (VIN1 + VIN2) VOV/UV = 0V 0.01 1 A Input Voltage (VIN1, VIN2) Quiescent Current (VIN1, Skyhook Disabled) MIN l Positive Feedback Voltage (FB1, FB2) 2.6 UNITS l 773 789 805 mV l l -806 -806 -788 -788 -770 -767 mV mV -100 30 0 200 100 nA nA Negative Feedback Voltage (FB1, FB2) (LT8471E,I) (LT8471H) Feedback Pin Bias Current (FB1, FB2) VFB = Positive Feedback Voltage, Current Out of Pin VFB = Negative Feedback Voltage Error Amp Transconductances Primary Channels, I = 2A 70 mhos Error Amp Voltage Gains Primary Channels 95 V/V Reference Line Regulation 2.6V VIN1 50V Switching Frequency, fOSC RT = 46.4k RT = 732k Switching Frequency in Foldback All Channels. Compared to Normal fOSC Switching Frequency Range Synchronizing l l 1.55 100 0.008 0.05 %/V 1.8 117 2.05 135 MHz kHz 1/8 l 100 SYNC High Level for Sync l 1.3 SYNC Low Level for Sync l Ratio 2000 kHz V 0.4 V 65 % VSYNC = 0V to 2V 35 Switching Phase Between Primary Channels RT = 46.4k RT = 732k 170 170 Skyhook Boost Voltage VSHOUT - VC2, Skyhook Enabled 3.0 Minimum Switch Off-Time Primary Channels (Note 7) Skyhook Channel (Note 7) 170 100 ns ns Minimum Switch On-Time Primary Channels(Note 7) Skyhook Channel (Note 7) 220 30 ns ns Switch Current Limit (Primary Channels) Minimum Duty Cycle (Note 3) Maximum Duty Cycle (Notes 3, 4) l l 2.1 1.35 2.55 1.8 3.2 2.5 A A Switch Current Limit (Skyhook) (Note 3) l 400 500 600 mA SYNC Clock Pulse Duty Cycle Recommended Minimum SYNC Ratio fSYNC /fOSC 3/4 4.25 Ratio 200 200 Deg Deg 5.4 V Primary Switches VCESAT IC1 or IC2 = 1.5A 300 mV Skyhook Switch VCESAT IC3 = 250mA 250 mV C1, C2 Leakage Current VC1 = VC2 = 12V, VE1 = VE2 = 0V, VOV/UV = 0V, Current into Pin 0.01 1 A C3 Leakage Current VC3 = 12V, VOV/UV = 0V 0.01 1 A E1, E2 Leakage Current VOV/UV = 0V, Current Out of Pin VC1 = VC2 = 20V, VE1 = VE2 = 5V VC1 = VC2 = 5V, VE1 = VE2 = -10V 0.01 0.01 1 1 A A Schottky Reverse Leakage VREVERSE = 12V VREVERSE = 50V 0.01 0.02 1 2 A A 8471fc For more information www.linear.com/8471 3 LT8471 Electrical Characteristics The l denotes the specifications which apply over the full operating temperature range, otherwise specifications are at TA = 25C. VIN1 = VIN2 = 5V, unless otherwise noted (Note 2). PARAMETER CONDITIONS Schottky Forward Voltage IDIODE = 100mA MIN TYP MAX 650 UNITS mV Start-Up Characteristics Soft-Start Charge Current VSS1, VSS2 = 50mV, Current Flows Out of SS1, SS2 Pins l 5.5 8.5 11.5 A OV/UV Current for OVLO Current into OV/UV Pin. VOV/UV Internally Clamped to 1.37V, Current Rising l 76 80 84 A 0.01 0.5 A 1.165 1.13 1.215 1.18 1.265 1.22 V V 0.3 V OV/UV Pin Bias Current VOV/UV =1V OV/UV Minimum Input Voltage High Active Mode, OV/UV Rising Active Mode, OV/UV Falling l l OV/UV Input Voltage Low Shutdown Mode l FB Pin Threshold for Power Good (Positive Output Voltage) FB Rising FB Falling l l 715 708 740 730 765 752 mV mV FB Pin Threshold for Power Good (Negative Output Voltage) FB Falling FB Rising l l -766 -755 -736 -727 -706 -699 mV mV PG1, PG2 Voltage Output Low VFB = 0.6V, IPG = 250A 0.32 0.6 V PG1, PG2 Leakage VPG1, VPG2 = 12V, PG Driver Off 0.01 1 A Note 1: Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. Exposure to any Absolute Maximum Rating condition for extended periods may affect device reliability and lifetime. Note 2: The LT8471E is guaranteed to meet performance specifications from 0C to 125C junction temperature. Specifications over the -40C to 125C operating junction temperature range are assured by design, characterization and correlation with statistical process controls. The LT8471I is guaranteed over the full -40C to 125C. The LT8471H is guaranteed over the full -40C to 150C operating junction temperature range. Operating lifetime is derated at junction temperatures greater than 125C. 4 Note 3: Current limit guaranteed by design and/or correlation to static test. Note 4: Current Limit measured at equivalent switching frequency of 1MHz. Note 5: This IC includes overtemperature protection that is intended to protect the device during momentary overload conditions. Junction temperature will exceed 150C when overtemperature protection is active. Continuous operation above the specified maximum operating junction temperature may impair device reliability. Note 6: Low side and high side configurations are discussed in the Switch Configurations and the Skyhook Regulator section. Note 7: Minimum switch on-time, off-time is guaranteed by design. 8471fc For more information www.linear.com/8471 LT8471 Typical Performance Characteristics Primary Switch Current Limit at 500kHz 3.5 0.6 2.0 1.5 1.0 0.3 0.2 40 20 60 80 DUTY CYCLE (%) 0 100 1 0.5 1.5 2 SWITCH CURRENT (A) 0 2.5 1.5 1.0 0.5 1.2 RT = 84.5k 0.8 0.6 0.4 0.2 0 -55 -35 -15 RT = 732k 5 25 45 65 TEMPERATURE (C) 85 105 125 8471 G07 NORMALIZED OSCILLATOR FREQUENCY (fSW /fNOM ) Oscillator Frequency 0.5 0.6 8471 G03 -805 795 0.8 -795 + FB 0.5 0.3 0 -50 -30 -10 10 30 50 70 90 110 130 150 TEMPERATURE (C) 8471 G05 0 -50 -30 -10 10 30 50 70 90 110 130 150 TEMPERATURE (C) 8471 G04 0.2 0.3 0.4 SWITCH CURRENT (A) Feedback Voltages -775 765 -765 2.5 1.00 -785 775 Switching Frequency During Soft-Start 0 -755 25 50 75 100 125 150 TEMPERATURE (C) 8471 G06 Internal UVLO for VIN1 and VIN2 2.4 0.75 0.50 0.25 0 -0.8 - FB 785 755 -50 -25 SUPPLY VOLTAGE (V) 2.0 0.1 805 FB VOLTAGE (mV) SWITCH CURRENT LIMIT (A) 2.5 0 8471 G02 1.0 1.0 0.2 Skyhook Current Limit vs Temperature 3.0 SWTICH CURRENT LIMIT (A) 0 8471 G01 Switch Current Limit at Minimum Duty Cycle 0.3 0.1 0.1 0 Skyhook Switch VCESAT 0.4 0.4 0.5 FREQUENCY (MHz) 0.5 SWITCH VCESAT (V) 2.5 0 CH1, CH2 Switch VCESAT 0.5 SWITCH VCESAT (V) SWITCH CURRENT LIMIT (A) 3.0 TA = 25C, unless otherwise specified. VIN1 2.3 VIN2 2.2 2.1 -0.4 0 FB VOLTAGE (V) 0.4 0.8 8471 G08 2.0 -50 -30 -10 10 30 50 70 90 110 130 150 TEMPERATURE (C) 8471 G09 8471fc For more information www.linear.com/8471 5 LT8471 Typical Performance Characteristics OV/UV Pin Current TA = 25C, unless otherwise specified. OV/UV Overvoltage Threshold 5 OV/UV Undervoltage Threshold 1.30 85 3 2 1 0 0.5 1 1.5 2 2.5 3 3.5 OV/UV VOLTAGE (V) 4 4.5 1.25 82 81 80 79 78 76 75 -50 -30 -10 10 30 50 70 90 110 130 150 TEMPERATURE (C) 8471 G11 5 8471 G10 SHOUT-C2 Regulation Voltage vs Temperature Minimum Switch On-Time/ Switch Off-Time 5 400 REGULATION VOLTAGE 4 3 MINIMUM VIN2-C2 VOLTAGE NEEDED TO OPERATE HIGH SIDE SWITCHES SHOUT- C2 VOLTAGE (V) SHOUT-C2 VOLTAGE (V) 4 3 2 1 1 0 -50 -30 -10 10 30 50 70 90 110 130 150 TEMPERATURE (C) 8471 G13 0 -55C 25C 125C 150C 0.5 0 1 1.5 2 SS1 VOLTAGE (V) 0.8 94 THRESHOLD (%) SKYHOOK DIODE VF (V) 95 0.6 0.4 0 -55C 25C 125C 150C 0 200 300 400 100 SKYHOOK DIODE CURRENT (mA) 300 250 MINIMUM ON-TIME 200 MINIMUM OFF-TIME 150 100 0 5 10 15 20 25 VIN (V) 30 35 40 8471 G15 PG Threshold vs Temperature (FB Falling) 1.0 0.2 2.5 350 8471 G14 Skyhook Diode Forward Voltage 6 1.10 -50 -30 -10 10 30 50 70 90 110 130 150 TEMPERATURE (C) 8471 G12 SHOUT-C2 Voltage vs SS1 5 2 1.20 1.15 77 SWITCH ON-TIME / SWITCH OFF-TIME (ns) 0 -40C 27C 125C 83 OV/UV VOLTAGE (V) OV/UV PIN CURRENT (A) CURRENT INTO PIN (mA) 84 4 500 8471 G16 93 92 + FB - FB 91 90 -50 -30 -10 10 30 50 70 90 110 130 150 TEMPERATURE (C) 8471 G17 8471fc For more information www.linear.com/8471 LT8471 Pin Functions C1, C2 (Pins 1, 20): Collector Pins. These are the collectors of the primary internal NPN power switches. If either pin is tied to a DC voltage, it must be locally bypassed; if either pin is a switching pin, minimize trace area connected to the pin to minimize EMI. When the Skyhook channel is used, the C2 pin must be tied to the input voltage of the Skyhook channel. C3 (Pin 13): Skyhook Collector Pin. This is the collector of the internal NPN power switch for the Skyhook channel. If the Skyhook channel is used, minimize the metal trace area connected to this pin to minimize EMI. If the Skyhook channel is not used, tie the C3 pin to GND. E1, E2 (Pins 2, 19): Emitter Pins. These are the emitters of the primary internal NPN power switches. Unless grounded, minimize trace area connected to these pins to minimize EMI. FB1, FB2 (Pins 5, 16): Feedback Pins for Primary Channels. Connect a resistor divider between VOUT, FB and GND to set the output voltage. GND (Pins 10, 11,12, Exposed Pad 21): Ground. All of the ground pins must be soldered directly to the local ground plane. The exposed pad metal of the package provides both electrical contact to ground and good thermal contact to the printed circuit board. OV/UV (Pin 6): Overvoltage/Undervoltage Pin. Tie to 1.215V (typical) or more to enable the device; ground to shut down. Configurable as a UVLO and OVLO by connecting to an external resistor divider. See the Applications Information section for more information. PG1, PG2 (Pins 4, 17): Power Good Pins. Connect pull-up resistors to these pins. These open-drain output pins are pulled low when their respective output voltages are more than 7.5% below their target output voltages (as set by the external feedback resistors). When the output voltage is above 92.5% of the target voltage, the respective PG pin driver turns off, allowing the PG voltage to rise and indicate that the regulated output voltage is good. RT (Pin 7): Timing Resistor Pin. Adjusts the switching frequency. Place a resistor from this pin to ground to set the frequency to a fixed free-running level. Do not float this pin. SHOUT (Pin 14): Skyhook Output Voltage Pin. This is the cathode of the internal Schottky diode and the output of the Skyhook boost converter. SS1, SS2 (Pins 8, 15): Soft Start Pins. Place a soft-start capacitor on each pin. Upon start-up, the SS pins will be charged by (nominally) 250k resistors to about 2.15V. SYNC (Pin 9): To synchronize the switching frequency to an outside clock, simply drive this pin with a clock. The high voltage level of the clock needs to exceed 1.3V, and the low level should be less than 0.4V. Drive this pin to less than 0.4V to revert to the internal free running clock. See the Applications Information section for more information. VIN1 (Pin 3): Input Supply Pin 1. This is the power supply pin for primary channel 1 and the Skyhook channel. This pin also provides power to additional circuitry common to all channels. VIN1 must be greater than 2.6V for any channel to operate. VIN1 must be locally bypassed. VIN2 (Pin 18): Input Supply Pin 2. This is the power supply pin for primary channel 2 and must be greater than 2.6V when channel 2 is in use. VIN2 must be locally bypassed. 8471fc For more information www.linear.com/8471 7 LT8471 Block Diagram R3A R3B 2.15V VIN2 250k OV/UV 1.37V UVLO SR22 S 1.215V + - 0.5V + - Q R 2.15V 250k SR21 S OV/UV LOGIC Q R 50mV SOFTSTART VC1 50mV SS2 VIN1 + - SKYHOOK DISABLE UVLO DRIVER Q3 Q3 SWITCH CONTROL AND COMPENSATION 2.15V SYNC BLOCK CURRENT LIMIT CONTROLLER 1.215V 0.789V VOLTAGE REFS -0.788V VC2 RT OSC FB2 PG2 GND PGOOD DET. 0.73V -0.788V -0.727V FB1 RPG1 PG1 PGOOD DET. 0.73V -0.727V -0.788V Q2 VOUT2 C2 RSENSE2 A42 RAMP GENERATOR R2A L2 E2 R2B D2 FREQUENCY FOLDBACK + - VC1 VIN1 SR11 - + R D1 Q1 S VOUT1 RSENSE1 A41 RAMP GENERATOR L1 C1 DRIVER Q COMPARATOR + - OSC C2 Q COMPARATOR + - 80m S A31 0.789V R + - OSC 40mV DRIVER + OSC 0.789V + - A43 CVCC VIN2 SR12 - A32 ADJUSTABLE OSCILLATOR VCC SHOUT-C2 VOLTAGE COMPARE - INTERNAL SUPPLY REG RPG2 C3 L3 VC2 VIN1 RT C3 PEAK DETECT C2 SOFTSTART SYNC DSH 0.5V + CSS2 SHOUT - + - CSS1 + - + SS1 E1 R1A C1 R1B FREQUENCY FOLDBACK 8471 BD 8 8471fc For more information www.linear.com/8471 LT8471 Operation The LT8471 consists of two primary channels, each with a 2A power switch. One Skyhook channel is also available with a 500mA power switch to support the primary channels when performing step-down conversions. The maximum voltage between VIN1 and E1 (or VIN2 and E2) is 40V when E1 (or E2) is grounded. This is the case for boost, SEPIC, flyback and dual-inductor inverting topologies. The maximum allowed voltage between VIN1 and E1 (or VIN2 and E2) is 60V when E1 (or E2) is allowed to toggle, such as in buck, ZETA and single-inductor inverting topologies. Primary Channels The two primary channels, 1 and 2, can be independently configured as boost, buck, SEPIC, ZETA, flyback or inverting DC/DC converters to adapt into various applications. Both channels use a constant-frequency, current mode control scheme to provide line and load regulation (refer to the Block Diagram). The channel 1 clock is in phase with the internal oscillator or the SYNC pin if it is toggling. In order to reduce transient switching spikes, the clock for channel 2 is approximately 180 out-of-phase with the channel 1 clock. At the start of each clock phase, an SR latch (SR11/SR12 in the Block Diagram) is set, turning on the internal power switch (Q1/Q2 in the Block Diagram) for the respective channel. An amplifier (A41/A42 in the Block Diagram) and a comparator (A31/A32 in the Block Diagram) monitor the current flowing through the internal power switch, turning the switch off when the current reaches a level determined by the voltage at VC1/ VC2. An error amplifier measures the output voltage through an external resistor divider tied to the FB1/FB2 pin and servos the VC1/ VC2 voltage. If the error amplifier's output (VC1/ VC2) increases, more current is delivered to the output; if it decreases, less current is delivered. An internal clamp on the VC1/ VC2 voltage provides current limit. Both of the primary channels contain a power good comparator which trips when the corresponding FB pin voltage is at 92.5% of its regulated value. The PG1 and PG2 outputs are driven by open-drain N-channel MOSFET devices that are off when the respective output is in regulation, allowing external resistors to pull the PG1/PG2 pins high. The PG1 and PG2 pin states are only valid when the respective channel is enabled and VIN1 is above 2.6V. Skyhook Channel When either channel is configured as a buck or singleinductor inverting converter, the respective VIN pin(s) must be boosted above the input voltage, VCC. The boosted supply provides base current to the appropriate Q1 and/ or Q2 NPN power switch. The Skyhook channel provides this boosted voltage to the SHOUT pin which must also be connected to VIN2 and/or VIN1 as needed. The Skyhook is a constant-frequency, voltage mode boost converter including a Schottky diode integrated on chip. The Skyhook output, SHOUT, is regulated to a fixed voltage (4.25V typical) above the C2 pin which must be connected to a DC voltage (typically VCC). If the Skyhook is not needed it can be disabled by tying the C3 pin to GND. This also reduces the current draw from VIN1. Refer to the Applications Information section for more information about the proper use of the Skyhook channel. The Skyhook operates as follows: An error amplifier measures the output voltage (SHOUT) through the SHOUT-C2 voltage comparator and servos an internal control voltage. The control voltage determines the on-time of the Q3 power switch for each cycle, and thus, the amount of current being delivered to SHOUT. Loop compensation is integrated in the chip. Comparator A43 monitors the current in the power switch Q3 in order to detect over current conditions. If current in excess of 500mA (typ) is detected, switch Q3 is immediately turned off. Start-Up Operation Several functions are provided to enable a clean start-up for the LT8471. * First, the OV/UV pin voltage is monitored by an internal voltage reference to give a precise turn-on voltage range. An external resistor (or resistor divider) can be connected from the input power supply to the OV/UV pin to provide a user-programmable undervoltage and overvoltage lockout function. * Second, the soft-start circuitry provides for a gradual ramp-up of the switch current for the primary channels 8471fc For more information www.linear.com/8471 9 LT8471 Operation and a gradual ramp-up of duty cycle for the Skyhook channel. When the part is brought out of shutdown, the external SS capacitors are first discharged (providing protection against OV/UV pin glitches and slow ramping). Next, internal 250k resistors pull the SS pins up to ~2.15V. By connecting an external capacitor to each of the SS pins, the voltage ramp rates on the pins can be set. Typical values for the soft-start capacitor range from 100nF to 1F. * Finally, the primary channels' switching frequency is folded back by 2, 4, or 8 times when the corresponding FB pin voltage is below certain thresholds (see the Typical Performance Characteristics section). This feature reduces the minimum duty cycle that the part can achieve, thus allowing better control of the switch current during start-up. The slope compensation function is disabled during foldback to increase the available current that can be delivered to the output. Thermal Shutdown Operation Not shown in the Block Diagram is the thermal shutdown circuit. If the temperature of the part exceeds approximately 164C, the SR21 and SR22 latches are set. A full soft-start cycle will then be initiated after the temperature drops below approximately 162.5C. The thermal shutdown circuit protects the power switches as well as the external components connected to the LT8471. Applications Information Input Supply Requirements VIN1 is the main power supply of the LT8471. It powers channel 1, the Skyhook channel and most of the internal control and bias circuits for both channels. It must be powered up to enable any channel of the LT8471. VIN2 is the power supply for channel 2, and only needs to be powered up when channel 2 is used. When VIN2 is not powered up, channel 2 will shut down. Switch Configurations and the Skyhook Regulator The primary channel NPN power switches can be connected in low side or high side configurations. A low side connection is when the power switch is on the lower voltage side of the inductor while the switch is on. The boost, SEPIC, flyback and dual-inductor inverting configurations use low side power switches. Conversely, a high side connection is when the power switch is on the higher voltage side of the inductor when it is on. The buck, ZETA and single-inductor inverting configurations use high side power switches. Channels 1 and 2 can be configured for high side or low side switching and do not need to be configured in the same way as the other. 10 In the low side configurations, the E pin is typically tied to ground and the respective C pin toggles. VIN for the respective channel must operate in a range of 2.6V to 40V. High side configurations require that the C pin be tied to a positive DC voltage supply and the respective E pin toggles. The channel's VIN pin should be at least 2.2V (typical) higher than the respective C pin to provide adequate drive to the base of the NPN power switch. When configured with a high side switch, the channel's VIN can operate up to 50V above ground, 60V above the respective E pin voltage, and 40V above the respective C pin voltage. The Skyhook boost regulator is available to provide additional VIN voltage when it is needed to support high side switch topologies. When enabled, the Skyhook output voltage (SHOUT) is regulated to 4.25V (typical) above the C2 pin voltage. Figure 1 shows an example where the application input voltage is 6V to 32V. The Skyhook boost converter regulates SHOUT, VIN1 and VIN2 to 10.25V to 36.25V insuring that the VIN1 and VIN2 pins are typically 4.25V above the C1 and C2 pins. More information about the Skyhook regulator is available in later sections. 8471fc For more information www.linear.com/8471 LT8471 Applications Information Internal Undervoltage Lockouts The LT8471 monitors VIN1 and VIN2 supply voltages in case either drops below a minimum operating level (typically about 2.35V and 2.25V, respectively). When VIN1 is detected low, all power switches are deactivated, and while sufficient VIN1 voltage persists, the soft-start capacitors for both SS1 and SS2 are discharged. After VIN1 is detected high, the channel 1 power switch is re-enabled and SS1 begins charging. When VIN2 is detected low, the channel 2 power switch is deactivated, and while sufficient VIN1 voltage persists, the soft-start capacitor for SS2 is discharged. After both VIN1 and VIN2 are detected high, the channel 2 power switch is re-enabled and SS2 begins charging. Driving SYNC high for an extended period of time effectively stops the operating clock and prevents latches SR11 and SR12 from becoming set (see the Block Diagram). As a result, the switching operation of the LT8471 stops, and all the power switches are turned off. The duty cycle of the SYNC signal must be between 35% and 65% for proper operation. Also, the frequency of the SYNC signal must meet the following two criteria: 1. SYNC may not toggle outside the frequency range of 100kHz to 2MHz unless it is set low to enable the freerunning oscillator. 2. The SYNC frequency can always be higher than the free-running oscillator frequency, fOSC, but should not be less than 25% below fOSC. Oscillator Operating Frequency Selection The internal free-running oscillator can set the operating frequency of the LT8471. When the SYNC pin is driven low (< 0.4V), the frequency of operation is set by a resistor from RT to ground. An internally trimmed timing capacitor resides inside the IC. The oscillator frequency is calculated using the following formula: There are several considerations in selecting the operating frequency of the converter. The first is staying clear of sensitive frequency bands, which cannot tolerate any spectral noise. For example, in products incorporating RF communications, the 455kHz IF frequency is sensitive to any noise, therefore switching above 600kHz is desired. Some communications have sensitivity to 1.1MHz, and in that case, a 1.5MHz switching converter frequency may be employed. The second consideration is the physical size of the converter. As the operating frequency goes up, the inductor and filter capacitors go down in value and size. The trade-off is efficiency, since the switching losses due to NPN base charge (see the Power and Thermal Calculation section), Schottky diode charge, and other capacitive loss terms increase proportionally with frequency. fOSC = 85.5 RT + 1 where fOSC is in MHz and RT is in k. Conversely, RT (in k) can be calculated from the desired frequency (in MHz) using: RT = 85.5 -1 fOSC Clock Synchronization Soft-Start The operating frequency of the LT8471 can be synchronized to an external clock source. To synchronize to the external source, simply provide a digital clock signal into the SYNC pin. The LT8471 will operate at the SYNC clock frequency. The LT8471 will revert to the internal freerunning oscillator clock after SYNC is driven low for a few free-running clock cycles. The LT8471 contains soft-start circuitry to limit peak switch currents during start-up. High start-up current is inherent in switching regulators since the feedback loop is saturated due to VOUT being far from its final value. The regulator tries to charge the output capacitor as quickly as possible, which results in large peak currents. The start-up current can be limited by connecting external capacitors (typically 100nF to 1F) to the SS1 and SS2 pins. The capacitors are slowly charged to ~2.15V by internal 8471fc For more information www.linear.com/8471 11 LT8471 Applications Information 250k resistors after the part is activated. SS1 pin voltages below ~0.8V reduce the duty cycle of the Skyhook channel, and below ~1.1V reduce the current limit of channel 1. SS2 voltages below ~1.1V reduce the current limit of channel 2. Thus, the gradual ramping of the SS voltages also gradually increases the current limits of the primary channels and the duty cycle of the Skyhook channel. This, in turn, allows the output capacitors for each channel to charge gradually toward its final value while limiting the start-up currents. In the event of a shutdown (OV/UV pin), internal undervoltage lockout (UVLO) or a thermal lockout, the soft-start capacitors are automatically discharged to <50mV before charging resumes, assuring that the soft-starting occurs after every reactivation of the chip. Shutdown The OV/UV pin is used to enable and disable the chip. When configured properly, the OV/UV pin can serve as both an undervoltage and an overvoltage detector as discussed further in the next section. When the OV/UV voltage is below 1.215V (typ) switching activity is disabled as shown in Figure 1 (lockout state). When OV/UV is below 300mV, LOCKOUT (POWER SWITCHES OFF, SS CAPACITORS DISCHARGED) 1.37V OV/UV (V) 1.215V OV/UV SINKS > 80A 0.0V ACTIVE (NORMAL OPERATION) Due to the 1.37V clamping circuit, OV/UV should always be connected through a resistor to limit the current. If the over and undervoltage functions are not used, the OV/UV pin can be driven digitally through a current limiting resistor. Figure 2 shows how to configure an overvoltage lockout (OVLO) and/or undervoltage lockout (UVLO) for the LT8471 VIN1 - OV/UV 1.37V R3B (OPTIONAL) LOCKOUT/ ACTIVE + - 1.18V COVLO CUVLO 75A/ 80A + SHUTDOWN (LOW QUIESCENT CURRENT) 8471 F02 8471 F01 Figure 1. Chip States vs OV/UV Voltage 12 When in the lockout state, the power switches are disabled and the SR21 and SR22 latches are set. This causes the soft-start capacitors to discharge until active operation is enabled. Although the power switches are disabled, the lockout state does not necessarily reduce quiescent current until the OV/UV voltage is near or below the shutdown threshold. R3A LOCKOUT (POWER SWITCHES OFF, SS CAPACITORS DISCHARGED) 0.3V quiescent current becomes very low and the part is completely in shutdown. Voltages between 1.215V and 1.37V enable the part (ACTIVE state) for normal operation. The OV/UV pin is internally clamped to approximately 1.37V and should always be connected through a resistor to limit the current. If the OV/UV pin current exceeds 80A (typ), switching is disabled and the part enters the lockout state. See the OV/UV pin current graph in the Typical Performance Characteristics section. Figure 2. Configurable OVLO and UVLO 8471fc For more information www.linear.com/8471 LT8471 Applications Information LT8471. Comparator CUVLO detects undervoltage conditions by comparing the OV/UV pin to typical thresholds of 1.215V (rising) and 1.18V (falling). The COVLOcomparator detects over voltage conditions by comparing the OV/UV pin current to typical thresholds of 80A (rising) and 75A (falling). Possible reasons to use the UVLO and/or OVLO functions are as follows: A switching regulator draws constant power from the source, so source current increases as source voltage drops. This looks like a negative resistance load to the source and can cause the source to current-limit or latch up under low source voltage conditions. UVLO prevents the regulator from operating at source voltages where these problems might occur. The OVLO function is used to stop the switching regulator(s) in cases where the input supply voltage overshoots higher than desired. As an example, VIN1 overvoltage and undervoltage thresholds can be set independently by properly choosing R3A and R3B. Use the following formulas to determine the resistor values: V + 1.37 * VUVLO - R3A = OVLO - 80A 1.18 * 80A R3B After R3A and R3B have been selected, the UVLO and OVLO rising and falling thresholds can be determined using: R3A + R3B + 80A * R3A R3B = 1.37 * OVLO+ V R3A + R3B + 75A * R3A R3B = 1.37 * OVLO - V R3A + R3B R3B = 1.215 * UVLO+ V R3A + R3B R3B = 1.18 * UVLO - V where: VOVLO+ and VOVLO- are the rising and falling OVLO thresholds, respectively. VUVLO+ and VUVLO- are the rising and falling UVLO thresholds, respectively. There are a few limitations in selecting the OVLO and UVLO threshold voltages. 1. The UVLO threshold must be at least 2.6V so that it's higher than the minimum operating voltage the input supply. If the UVLO function is not needed, R3B can be omitted and R3A can be calculated using: = V 1.18 * R3A UVLO - - 1.18 where: VOVLO+ is the desired rising OVLO threshold VUVLO- is the desired falling UVLO threshold V + - 1.37V R3A = OVLO 80A 2. The following relationship must be satisfied: V OVLO+ V UVLO - > 1.37 = 1.161 1.18 As the ratio of VOVLO to VUVLO gets closer to 1.161, the required resistances for R3A and R3B become smaller, thus increasing the operating current. 8471fc For more information www.linear.com/8471 13 LT8471 Applications Information The following example shows how to select R3A and R3B to disable the LT8471 for VIN1 voltages below 5V and above 15V. First, check that the ratio of the OVLO to the UVLO threshold is greater than 1.161. Here, the ratio is 15V/5V = 3V, which satisfies the second rule just mentioned. Next, calculate: R3A Choose R3A to be a standard value resistance of 118k. Next, calculate: Choose R3B to be a standard value resistance of 36.5k. After selecting the standard value resistors for R3A and R3B, calculate the final thresholds using the formulas previously provided. 118k + 36.5k + 80A * 118k 36.5k = 1.37 * OVLO+ = 15.24V 118k + 36.5k + 75A * 118k 36.5k = 1.37 * OVLO - = 14.65V V 118k + 36.5k = 1.215 * = 5.14V 36.5k V 118k + 36.5k = 1.18 * = 4.99V 36.5k UVLO+ UVLO - 14 V RA = RB * OUT - 1 VFB For example, for VOUT = 10V, choose R1B = 10k, then choose: 10V R1A = 10k * - 1 115k 0.789V 1.18V R3B = * 118k = 36.5k 5V - 1.18V V The output voltage is programmed with a resistor divider between the output and the FB pin. Choose 1% or better resistors according to: where VFB is the feedback voltage (0.789V typical for positive VOUT and -0.788V for negative VOUT). Reference designators are as shown in the Block Diagram. 15V 1.37 * 5V = - = 114.9k 80A 1.18 * 80A V Setting the Output Voltage (Primary Channels) Start-Up Sequencing Connecting one primary channel's PG pin to the other channel's SS pin is an easy way to sequence the start-up order of the outputs. For example, in most applications, connecting PG1 to SS2 will make the channel 1 output come up before the channel 2 output during the start-up. Because the skyhook channel does soft-start with the SS1 pin (see more details in the Soft-Start section), the following guidelines need to be applied if both power-up sequencing and the skyhook channel are used: 1. Connect PG1 directly to SS2 to make channel 1's output come up first (see Figure 12). 2. Connect a 147k resistor between PG2 and SS1 to make channel 2's output come up first. An example using a 147k resistor connected between PG2 and SS1 is shown in Figure 8a. In this application, channel 1 is configured as a boost converter, and channel 2 is configured as a buck converter. The buck converter has to start up first as its output is connected to the input of the boost converter. 8471fc For more information www.linear.com/8471 LT8471 Applications Information Power Switch Duty Cycle (Primary Channels) Inductor Selection (Primary Channels) In order to maintain loop stability and deliver adequate current to the load, the internal power switches (Q1 and Q2 in the Block Diagram) cannot remain on for 100% of each clock cycle. The maximum allowable duty cycle is given by: General Guidelines: The high frequency operation of the LT8471 allows for the use of small surface mount inductors. For high efficiency, choose inductors with high frequency core material, such as ferrite, to reduce core losses. To improve efficiency, choose inductors with more volume for a given inductance. The inductor should have low DCR (copper wire resistance) to reduce I2R losses, and must be able to handle the peak inductor current without saturating. Note that in some applications, the current handling requirements of the inductor can be lower, such as in the SEPIC topology, where each inductor only carries a fraction of the total switch current. Molded chokes or chip inductors usually do not have enough core area to support peak inductor currents in the 2A to 3A range. To minimize radiated noise, use a toroidal or shielded inductor. Note that the inductance of shielded core types will drop more as current increases, and will saturate more easily. See Table 1 for a list of inductor manufacturers. Thorough lab evaluation is recommended to verify that the following guidelines properly suit the final application. TP - MIN(OFF)TIME DCMAX = * 100% TP where TP is the clock period and MIN(OFF)TIME is typically 170ns (refer to the Electrical Characteristics section). The application should be designed so that the steady state duty cycle does not exceed DCMAX. Duty cycle equations for several common topologies are given below, where VD is the diode forward voltage drop and VCESAT is typically 300mV at 1.5A. VOUT - VCC + VD VOUT + VD - VCESAT DCBOOST VOUT + VD VCC + VD - VCESAT DCBUCK DC1L _INV Table 1. Inductor Manufacturers VOUT + VD VCC + VD - VCESAT + VOUT DC2L _INV VENDOR VOUT + VD VCC + VD - VCESAT + VOUT DCSEPIC VD + VOUT VCC + VOUT + VD - VCESAT DCZETA VD + VOUT VCC + VOUT + VD - VCESAT PART NUMBER Coilcraft MSS1038, MSS7341 and LPS4018 www.coilcraft.com Coiltronics DR, LD and CD Series www.coiltronics.com Sumida CDRH105R Series www.sumida.com Wurth Elektronik WE-LHMI and WE-TPC Series where VCC is the positive input voltage to the DC/DC converter. See the Typical Applications section for examples. The LT8471 can be used in configurations where the duty cycle is higher than DCMAX, but it must be operated in the discontinuous conduction mode so that the effective duty cycle is reduced. WEB www.we-online.com Minimum Inductance: Although there can be a tradeoff with efficiency, it is often desirable to minimize board space by choosing smaller inductors. When choosing an inductor, there are two conditions that limit the minimum inductance; (1) providing adequate load current, and (2) avoiding subharmonic oscillation. Choose an inductance that is high enough to meet both of these requirements. 8471fc For more information www.linear.com/8471 15 LT8471 Applications Information Adequate Load Current: Small value inductors result in increased ripple currents and thus, due to the limited peak switch current, decrease the average current that can be provided to a load (IOUT). In order to provide adequate load current, L should be at least: LBOOST > LBUCK > LSEPIC > DC * VCC V *I 2 * f * ILIM - OUT OUT - IOUT VCC * L2L _INV > f = Switching frequency. Negative values of L indicate that the output load current IOUT exceeds the switch current limit capability of the LT8471. Avoiding Subharmonic Oscillations: The LT8471's internal slope compensation circuit will prevent subharmonic oscillations that can occur when the duty cycle is greater than 50%, provided that the inductance exceeds a minimum value. In applications that operate with duty cycles greater than 50%, the inductance must be at least: DC * (VCC - VOUT ) V *I 2 * f * ILIM - OUT OUT VCC * L1L _INV > L ZETA > DC * VCC V *I 2 * f * ILIM - OUT OUT VCC * VCC = Positive input voltage to the DC/DC converter. See the Typical Applications section for examples. DC * VCC V *I 2 * f * ILIM - OUT OUT VCC * VCC * (2 * DC - 1) (1- DC) * f LBOOST > LSEPIC > VCC * (2 * DC - 1) (1- DC) * f L2L _INV > DC * VCC V *I 2 * f * ILIM - OUT OUT - IOUT VCC * DC * VCC V *I 2 * f * ILIM - OUT OUT - IOUT VCC * LBUCK > VCC * (2 * DC - 1) f L1L _INV > L ZETA > VCC * (2 * DC - 1) (1- DC) * f VCC * (2 * DC - 1) (1- DC) * f VCC * (2 * DC - 1) (1- DC) * f where: where: L = L1|| L2 for dual uncoupled inductor topologies. L = L1|| L2 for dual uncoupled inductor topologies. L = L1 = L2 for dual-coupled inductor topologies. L = L1 = L2 for dual-coupled inductor topologies. DC = Switch duty cycle in steady state. DC = Switch duty cycle in steady state. ILIM = Switch current limit, typically about 2.3A at 50% duty cycle (see the Typical Performance Characteristics section). VCC = Positive input voltage to the DC/DC converter. See the Typical Applications section for examples. f = Switching frequency. = Power conversion efficiency (typically 88% for boost, 75% for dual inductor, 85% for buck and 80% for 1L inverting topologies at high currents). 16 8471fc For more information www.linear.com/8471 LT8471 Applications Information Maximum Inductance: Excessive inductance can reduce current ripple to levels that are difficult for the current comparator (A3 in the Block Diagram) to easily distinguish, thus causing duty cycle jitter and/or poor regulation. The maximum inductance can be calculated using: LMAX = VCC - VCESAT * DC IMIN(RIPPLE) * f for inverting, boost, ZETA and SEPIC topologies, or: LMAX = (1- DC) * VCC - VCESAT * DC IMIN(RIPPLE) * f for the buck topology. Maximum Current Rating: Finally, the inductor(s) must be rated to handle the peak operating current to prevent inductor saturation resulting in efficiency loss. In steady state, the peak input inductor current (continuous conduction mode only) is given by: IL _ PEAK = VOUT * IOUT (VCC - VCESAT ) * DC + (BOOST) VCC * 2*L* f IL _ PEAK = VOUT * IOUT (VCC - VCESAT ) * DC + (1L _INV) VCC * 2*L* f IL _ PEAK = IOUT + where: LMAX = L1|| L2 for dual uncoupled inductor topologies. LMAX = L1 = L2 for dual-coupled inductor topologies. I(MIN)RIPPLE is typically 120mA. IL1_ PEAK = (VCC - VCESAT ) * DC * (1- DC) (BUCK) 2*L* f VOUT * IOUT (VCC - VCESAT ) * DC + (SEPIC) VCC * 2 * L1* f IL2 _ PEAK = IOUT + DC = Switch duty cycle in steady state. VCC = Positive input voltage to the DC/DC converter. See the Typical Applications section for examples. IL1_ PEAK = f = Switching frequency. VOUT * IOUT (VCC - VCESAT ) * DC + (2L _INV) VCC * 2 * L1* f IL2 _ PEAK = IOUT + IL1_ PEAK = (VOUT + VD ) * (1- DC) (SEPIC) 2 * L2 * f ( VOUT + VD ) * (1- DC) (2L _INV) 2 * L2 * f VOUT * IOUT (VCC - VCESAT ) * DC + (ZETA) VCC * 2 * L1* f IL2 _ PEAK = IOUT + ( VOUT - VD ) * (1- DC) (ZETA) 2 * L2 * f Note that the inductor current can be higher during load transients. It can also be higher during start-up if inadequate soft-start capacitance is used. 8471fc For more information www.linear.com/8471 17 LT8471 Applications Information Capacitor Selection (Primary Channels) Low ESR (equivalent series resistance) capacitors should be used at the output to minimize the output ripple voltage. Multilayer ceramic capacitors are an excellent choice, as they have an extremely low ESR and are available in very small packages. X5R or X7R dielectrics are preferred, as these materials retain their capacitance over wider voltage and temperature ranges. A 4.7F to 20F output capacitor is sufficient for most applications, but systems with very low output currents may need only a 1F or 2.2F output capacitor. Always use a capacitor with a sufficient voltage rating. Many capacitors rated at 2.2F to 20F, particularly 0805 or 0603 case sizes, have greatly reduced capacitance at the desired output voltage. Solid tantalum or OS-CON capacitors can be used, but they will occupy more board area than ceramic ones and will have higher ESR with greater output ripple. Low ESR capacitors should also be used as the input decoupling capacitors, which should be placed as closely as possible to the LT8471. Ceramic capacitors make a good choice for this purpose. A 2.2F to 4.7F input capacitor is sufficient for most applications. Standard bode plot analysis can be used to analyze and adjust the voltage feedback loop. As with any feedback loop, identifying the gain and phase contribution of the various elements in the loop is critical. Figure 3 shows the key equivalent elements of a boost/ buck/inverting converter. Because of the fast current control loop, the power stage of the IC, inductor and diode have been replaced by a combination of the equivalent transconductance amplifier gmp and the current controlled current source (which converts IVIN to * VIN * IVIN/VOUT for boost converters, IVIN to * VIN * DC/VOUT for buck and single inductor inverting converters). gmp acts as a current source where the peak input current, IVIN, is proportional to the VC voltage. is the efficiency of the switching regulator, and is typically about 88%. Note that the maximum output currents of gmp and gma are finite. The limits for gmp are in the Electrical Characteristics section (switch current limit), and gma is nominally limited to about 5A. - Table 2 shows a list of several ceramic capacitor manufacturers. Consult the manufacturers for detailed information on their entire selection of ceramic capacitors. + gmp IVIN BUCK AND SINGLE INDUCTOR INVERTING: * VIN * IVIN * DC VOUT Table 2. Ceramic Capacitor Manufacturers VENDOR WEB Kemet www.kemet.com Murata www.murata.com Taiyo-Yuden www.t-yuden.com TDK www.tdk.com VC CF RC RO VOUT BOOST: * VIN * IVIN VOUT + gma - RESR RL CPL COUT REFERENCE RA FB RB CC 8471 F03 Compensation Theory (Primary Channels) Like all other current mode switching regulators, the primary channels of LT8471 need to be compensated for stable and efficient operation. For each primary channel, two feedback loops are used--a fast current loop which does not require compensation, and a slower voltage loop which does. In order to reduce the PCB footprint, the voltage loop compensation network is integrated inside the LT8471. Therefore, only the inductor and the output capacitor are available for adjusting the loop stability. 18 CC: COMPENSATION CAPACITOR COUT: OUTPUT CAPACITOR CPL: PHASE LEAD CAPACITOR gma: TRANSCONDUCTANCE AMPLIFIER INSIDE IC gmp: POWER STAGE TRANSCONDUCTANCE AMPLIFIER RC: COMPENSATION RESISTOR RL: OUTPUT RESISTANCE DEFINED AS VOUT DIVIDED BY ILOAD(MAX) RO: OUTPUT RESISTANCE OF gma RA, RB: FEEDBACK RESISTOR DIVIDER NETWORK RESR: OUTPUT CAPACITOR ESR Figure 3. Boost/Buck/Inverting Converter Equivalent Model 8471fc For more information www.linear.com/8471 LT8471 Applications Information From Figure 3, the DC gain, poles and zeros can be calculated as follows: Error Amp Pole: P2 = 1 2 * * RO * CC Error Amp Zero: Z1= 1 2 * * RC * CC DC Gain: Boost Converters: V R ADC = (gma * RO ) * gmp * * IN * L VOUT 2 RB * RA + RB Buck Converters: ESR Zero: Z2 = 1 2 * * RESR * COUT High Frequency Pole: P3> Phase Lead Zero: Z4 = ADC = (gma * RO ) * gmp * ( * RL ) * RB RA + RB Phase Lead Pole: P4 = Single Inductor Inverting Converters: VIN ADC = (gma * RO ) * gmp * * * RL VIN + 2 * VOUT RB * RA + RB Output Pole: 3 1 2 * * R A * CPL 1 2 * * CPL * RA * RB RA + RB Error Amp Filter Pole: P5 = C 1 , CF < C R *R 10 2 * * C O * CF RC + RO RHP Zero: Boost Converters: P1= Buck Converters: P1= 2 2 * * RL * COUT 1 2 * * RL * COUT Single Inductor Inverting Converters: P1= fS 2 * VOUT + VIN ( 2 * * RL * COUT * VIN + VOUT ) Boost Converters: Z3 = (1- DC)2 * RL 2 * *L Buck Converters: Z3 = Single Inductor Inverting Converters: Z3 = (1- DC)2 * RL 2 * * DC * L 8471fc For more information www.linear.com/8471 19 LT8471 Applications Information Using the primary channel 1 in Figure 10a as an example, Table 3 shows the parameters used to generate the bode plot shown in Figure 4. 140 0 120 -45 PHASE -90 80 -135 60 -180 40 GAIN 20 -225 70 AT 20kHz -270 0 -20 Diode Selection (Primary Channels) PHASE (dB) GAIN (dB) 100 -315 10 100 1k 10k FREQUENCY (Hz) 100k -360 1M Schottky diodes, with their low forward-voltage drops and fast switching speeds, are recommended for use with the LT8471. Each of the primary channels need an external diode as the second switch. The diode conducts current only during the switch off-time. The average forward current in normal operation can be calculated from: ID(AVG) = IOUT * (1 - DC) 8471 F04 Figure 4. Bode Plot for Example Buck Converter In Figure 4, the phase is -110 when the gain reaches 0dB, giving a phase margin of 70. The crossover frequency is 20kHz. Table 3. Bode Plot Parameters PARAMETER The previous discussion is a good start for narrowing down the range of component values so that the overall design meets the stability requirements. To obtain good stability margin and transient response, some fine tuning of the external components, i.e., the inductor and output capacitor may be necessary. VALUE UNITS RL 3.3 Application Specific COMMENT COUT 94 F Application Specific where IOUT is the output load current, and DC is the switch duty cycle in steady state. Choose a diode rated to handle at least ID(AVG). Diodes with higher current rating should be selected to handle increased current during start-up, load transient and/or output short. Choose a Schottky diode with low parasitic capacitance to reduce reverse current spikes through the power switch of the LT8471. In addition, when operating at high ambient temperatures and with high reverse voltages across the Schottky, choose diodes with lower reverse leakage current to avoid excessive heating in the diode. Table 4 lists several Schottky diodes and their manufacturers. 1 m Application Specific RO 1.35 M Not Adjustable CC 1 nF Not Adjustable CF 10 pF Not Adjustable CPL 0 pF Optional/Adjustable RC 155 k Not Adjustable PARAMETER VR (V) IAVE (A) VF AT 1A (mV) RA 319 k Adjustable RB 59 k Adjustable VOUT 5 V Application Specific 12 V Application Specific gma 70 mho Not Adjustable 20 30 20 30 60 1 1 2 2 2 500 500 VIN Diodes, Inc. B120 B130 B220 B230 DFLS260L gmp 7.3 mho Not Adjustable Microsemi UPS140 40 1 450 L 10 H fS 0.45 MHz Fairchild SS16 60 1 700 International Rectifier 10BQ030 20BQ030 30 30 1 2 420 RESR 20 Application Specific Adjustable Table 4. Diode Vendors 410 VF AT 2A (mV) 500 500 620 470 470 8471fc For more information www.linear.com/8471 LT8471 Applications Information Skyhook Configuration Requirements The Skyhook provides the boosted VIN voltage required for channels operating in the high side configuration. High side channels have their respective C pin tied to a positive DC voltage supply (usually VCC) while the respective E pin toggles. The channel's VIN pin should be at least 2.2V (typical) higher than the respective C pin to provide adequate base drive for the NPN power switch. Internal circuits monitor the voltage difference between VIN1 and E1 (and VIN2 and E2). If the voltage difference is less than 2.2V (typical), the power switch will be turned off immediately for that clock cycle. Increasing voltage difference between VIN and the respective C pin increases power loss and reduces efficiency. VIN must not be more than 40V higher than the respective C pin for high side configurations. If use of Skyhook channel is not desired, then the boosted VIN voltage can instead be provided by an external power supply or by the output of the opposite channel if the voltage is high enough. The Skyhook output (SHOUT) is regulated to ~4.25V above the C2 pin voltage and can be connected to the appropriate VIN pin(s) as shown in the Typical Applications section. When in use, the Skyhook can only be configured as a boost converter (i.e., as in Figure 1a). Also, since SHOUT is regulated to ~4.25V above C2, the C2 pin must be connected to a DC voltage (usually VCC) and must not be toggling. Because of this requirement, if channel 2 is used while the Skyhook is operating, channel 2 must be in the high side configuration such as buck or single-inductor inverting. If not being used, the Skyhook channel can be disabled by connecting the C3 pin to ground. When the Skyhook channel is disabled VIN1 current is reduced. Capacitor and Diode Selection (Skyhook) A low ESR capacitor should be used at the Skyhook output to minimize voltage ripple. Ceramic capacitors make a good choice for this (see the discussion in the Capacitor Selection (Primary Channels) section). The capacitor value can affect stability. Read the upcoming Compensation (Skyhook) section for more information. For the best noise performance, the Skyhook output capacitor should be connected from SHOUT to GND, and the capacitors should be placed close to the pins (VIN1 or VIN2) that SHOUT is shorted to. The Skyhook output capacitor can also be connected from SHOUT to the C2 pin (usually VCC), as shown in Figure 8. By doing this, the output voltage of the Skyhook, or the boosted base drive voltage for the primary channels will have better tracking with the supply voltage of the channel. In addition, the voltage across the capacitor is lower, thus reducing the size and required voltage rating of the capacitor. The Skyhook has a Schottky diode built on-chip. Nevertheless, an external Schottky diode can be connected from C3 to SHOUT to improve performance when load currents are high. The diode choice can be made based on the discussion in the Diode Selection (Primary Channels) section. The output current (IOUT) for the Skyhook channel can be estimated as: IOUT (VCC + 4.25V) * (IOUT1 * DC1 + IOUT2 * DC2 ) * VCC * where: VCC = Input voltage of the Skyhook. IOUT1 = Average output current of channel 1 if VIN1 is connected to SHOUT (0 otherwise). IOUT2 = Average output current of channel 1 if VIN2 is connected to SHOUT (0 otherwise). DC1 = Duty cycle of channel 1 in steady state. DC2 = Duty cycle of channel 2 in steady state. = Power conversion efficiency of the Skyhook (typically 87%). = Channel 1/channel 2 power switch beta (typically 35) 8471fc For more information www.linear.com/8471 21 LT8471 Applications Information Inductor Selection (Skyhook) where: The general guidelines are the same as the ones for primary channels, and can be found in the previous section. DCSH = Skyhook duty cycle in steady state: Minimum Inductance: There are three conditions that limit the minimum inductance for the Skyhook boost converter: 1. Provide adequate load current; 2. Avoid excessive power switch current overshoot; 3. Maintain good loop stability (see the subsequent Compensation (Skyhook) section). Choose an inductance that satisfies the minimum requirements for all three criteria. At least 20% of additional margin is recommended for the inductance. Adequate Load Current: Starting by assuming the Skyhook operates in discontinuous mode (DCM), the minimum inductance (LDCM(MIN)) to provide adequate load current is: LDCM(MIN) > (IOUT1 * DC1+ IOUT2 * DC2) * 4.25V * 2 35 * * f *ILIM 2 4.25V + VDSH VC2 + 4.25V + VDSH VDSH = Skyhook diode forward voltage drop (see the Electrical Characteristics section). VCC= Input voltage of the Skyhook. ILIM = Skyhook switch fault current limit, typically 500mA. IOUT1 = Average output current of channel 1 if VIN1 is connected to SHOUT (0 otherwise). IOUT2 = Average output current of channel 2 if VIN2 is connected to SHOUT (0 otherwise). DC1 = Duty cycle of channel 1 in steady state. DC2 = Duty cycle of channel 2 in steady state. = Power conversion efficiency of Skyhook (typically 87%). f = Switching frequency. Next, verify if the Skyhook will actually operate in DCM with the following inequality: 1 1 ILIM * LDCM(MIN) * f * + <1 VCC 4.25V Skyhook Power Switch Current Overshoot: In order to avoid excessive current overshoot in the Skyhook power switch, LOS(MIN) should be: LOS(MIN) > If this inequality is true, then the Skyhook will operate in DCM, and IDCM(MIN) is the minimum inductance needed to provide adequate load current. Otherwise, the Skyhook will operate in continuous mode (CCM) when providing maximum load current, and the minimum inductance (LCCM(MIN)) needed is: LCCM(MIN) > DCSH * VCC (V + 4.25V) * (IOUT1 * DC1+ IOUT2 * DC2) 2 * f * ILIM - CC 35 * VCC * 22 DCSH VCC * tD IOS where: VCC = Input voltage of the Skyhook. tD = Skyhook fault current limit comparator delay (typically 50ns). IOS = The amount of overshoot current that can be tolerated (typically 100mA). Current Rating: The maximum switch current limit for the Skyhook is 500mA. Choose an inductor that has a saturation current of 500mA or higher to avoid saturating the inductor. 8471fc For more information www.linear.com/8471 LT8471 Applications Information Compensation (Skyhook) More Skyhook inductance can help with: Like the primary channels, the Skyhook is internally compensated, and the loop stability is adjusted through the inductor and the output capacitor. In most applications, a 15H Skyhook inductor such as Wurth 744025150. and a 0.47F Skyhook output capacitor (C3 in the Block Diagram) will give good stability. For high input voltage applications, more inductance is typically required to reduce the current overshoot. * Reducing peak inductor current. Adding a resistor between SHOUT and C2, to introduce a few mA of constant load, can help with: A good technique to compensate the Skyhook regulator is to start with a 15H Skyhook inductor and a 0.47F output capacitor (C3 in the Block Diagram), and use the subsequent list to make additional adjustments if needed. * Improving the loop stability, SHOUT undershoot and overshoot when the SHOUT current load is consistently very light (i.e., the primary channel(s) powered by SHOUT is not switching every cycle). More output capacitance (C3 in the Block Diagram) can help with: Thermal Considerations * Reducing the SHOUT overshoot and undershoot during primary channel(s) load steps. Less output capacitance (C3 in the Block Diagram) can help with: * Improving loop stability. * Reducing peak inductor current during start-up. Less Skyhook inductance can help with: * Improving loop stability when the SHOUT current load is consistently high (i.e., the primary channel(s) powered by SHOUT is switching every cycle). For the LT8471 to deliver its full output power, it is imperative that a good thermal path be provided to dissipate the heat generated within the package. This can be accomplished by taking advantage of the thermal pad on the underside of the IC. It is recommended that multiple vias in the printed circuit board be used to conduct heat away from the IC and into a copper plane with as much area as possible. Table 5. LT8471 Power Dissipation DEFINITION OF VARIABLES DC = Switch Duty Cycle IIN = Average Switch Current = Power Conversion Efficiency (typically 88% at high currents) PSWDC = Switch I2R Loss (DC) EQUATIONS DC = VOUT - VIN + VD VOUT + VD - VCESAT V *I IIN = OUT OUT * VIN DESIGN EXAMPLE DC = 12V - 5V + 0.45V 12V + 0.45V - 0.21V IIN = 12V * 0.67A 0.88 * 5V VALUE DC = 60.9% IIN = 1.85A PSWDC = DC * IIN2 * RSW PSWDC = 0.609 * (1.85A)2 * 200m PSWDC = 417mW PSWAC = 13ns * IIN * VOUT * fOSC PSWAC = (13ns) * 1.85A * 12V * (1MHz) PSWAC = 289mW RSW = Switch Resistance (typically 200m) PSWAC = Switch Dynamic Loss (AC) PBDC = Base Drive Loss (DC) PINP = Input Power Loss V *I * DC PBDC = IN IN 38 PBDC = 5V * 1.85A * 0.609 38 PBDC = 148mW PINP = 2.5mA * VIN PINP = 2.5mA * 5V PINP = 12.5mW PTOTAL = (PSWDC + PSWAC + PBDC) * 2 + PINP PTOTAL = (0.417 + 0.289 + 0.148) * 2 + 0.0125 PTOTAL = 1.72W 8471fc For more information www.linear.com/8471 23 LT8471 Applications Information Power and Thermal Calculations Power dissipation in the LT8471 chip comes from four primary sources: switch I2R losses, switch dynamic losses, NPN base drive DC losses, and miscellaneous input current losses. These formulas assume continuous mode operation, so they should not be used for calculating thermal losses or efficiency in discontinuous mode or at light load currents. The following example calculates the power dissipation in the LT8471 for a particular boost application on both CH1 and CH2 (VIN = 5V, VOUT = 12V, IOUT = 0.67A, fOSC = 1MHz, VD = 0.45V, VCESAT = 0.21V). To calculate die junction temperature, use the appropriate thermal resistance number and add in worst-case ambient temperature: TJ = TA + JA * PTOTAL where TJ = Die Junction Temperature, TA = Ambient Temperature, PTOTAL is the final result from the calculations shown in Table 5, and JA is the thermal resistance from the silicon junction to the ambient air. The JA value is 38C/W for the 20-lead TSSOP package. In practice, lower JA values can be realized if board layout is performed with appropriate grounding (accounting for heat sinking properties of the board) and other considerations listed in the Layout Guidelines section. Thermal Lockout A fault condition occurs when the die temperature exceeds 164C (see Operation Section), and the part goes into thermal lockout. The fault condition ceases when the die temperature drops by ~1.5C (nominal). VIN Ramp Rate While initially powering a switching converter application, the VIN ramp rate should be limited. High VIN ramp rates can cause excessive inrush currents in the passive components of the converter. This can lead to current and/or voltage overstress and may damage the passive components or 24 the chip. Ramp rates less than 500mV/s, depending on component parameters, will generally prevent these issues. Also, be careful to avoid hot-plugging. Hot-plugging occurs when an active voltage supply is "instantly" connected or switched to the input of the converter. Hot-plugging results in very fast input ramp rates and is not recommended. Finally, for more information, refer to Linear application note AN88, which discusses voltage overstress that can occur when an inductive source impedance is hot-plugged to an input pin bypassed by ceramic capacitors. Layout Guidelines As with all high frequency switchers, when considering layout, care must be taken to achieve optimal electrical, thermal and noise performance. One will not get advertised performance with a careless layout. To prevent noise, both radiated and conducted, the high speed switching current paths must be kept as short as possible. For each channel, the high speed switching current flows in a loop through the following components: * Boost: NPN power switch (C-E pins), external Schottky diode and output capacitor * Buck: NPN power switch (C-E pins), external Schottky diode and input capacitor * 1L Inverting: NPN power switch (C-E pins), external Schottky diode, input capacitor and output capacitor The area inside the loop formed by these components should be kept as small as possible. This is implemented in the suggested layouts shown in Figure 5, Figure 6 and Figure 7. Shortening the loop will also reduce the parasitic trace inductance. As the NPN switch turns off, the parasitic inductance can produce a flyback spike across the LT8471 switch. When operating at higher currents and output voltages, with poor layout, the spike can generate voltages across the switch that may exceed its absolute maximum rating. A ground plane should also be used under the switcher circuitry to prevent interplane coupling and overall noise. However, there should be no ground plane under the planes that are connected to the switching pins to keep the stray capacitance on the switching pins small. 8471fc For more information www.linear.com/8471 LT8471 Applications Information Board layout also has a significant effect on thermal resistance. The exposed package ground pad is the copper plate that runs under the LT8471 die. This is a good thermal path for conducting heat out of the package. Soldering the pad onto the board reduces die temperature and increases the power capability of the LT8471. Provide as much copper area as possible around this pad. Adding multiple feedthroughs around the pad to the ground plane will also help. Figure 5, Figure 6 and Figure 7 show the recommended component placement for various DC/DC converter topologies. CVCC CVCC CVOUT1 VOUT1 BUCK CHANNEL 1 L1 VCC CVIN1 D1 VOUT2 L2 CVOUT2 C1 1 20 C2 E1 2 19 E2 D2 VIN1 3 18 VIN2 CVIN2 17 4 5 21 1L INV CHANNEL 2 GND 16 6 15 7 14 8 13 9 12 10 11 SHOUT C3 L3 SKYHOOK CVCC VIAS TO GROUND PLANE REQUIRED TO IMPROVE THERMAL PERFORMANCE VIAS TO VIN1 VIAS TO VCC 8471 F05 Figure 5. Suggested Component Placement for a Buck and Single-Inductor Inverting Converter 8471fc For more information www.linear.com/8471 25 LT8471 Applications Information CVCC L1 VOUT1 D1 L2 C1 VOUT2 CVOUT1 SEPIC CHANNEL 1 VCC L3 CVIN1 D2 C VOUT2 C1 1 20 C2 E1 2 19 E2 VIN1 3 18 VIN2 17 4 5 21 BOOST CHANNEL 2 CVIN2 GND 16 6 15 7 14 8 13 9 12 10 11 SHOUT C3 VIAS TO GROUND PLANE REQUIRED TO IMPROVE THERMAL PERFORMANCE VIAS TO VIN1 VIAS TO VCC 8471 F06 Figure 6. Suggested Component Placement for a SEPIC and Boost Converter 26 8471fc For more information www.linear.com/8471 LT8471 Applications Information CVCC L1 L3 D1 VOUT1 BOOST CHANNEL 1 VCC L2 CVIN1 VOUT2 C1 D2 C1 1 20 C2 E1 2 19 E2 VIN1 3 18 VIN2 4 17 5 21 2L INV CHANNEL 2 CVOUT2 CVIN2 GND 16 6 15 7 14 8 13 9 12 10 11 SHOUT C3 VIAS TO GROUND PLANE REQUIRED TO IMPROVE THERMAL PERFORMANCE VIAS TO VIN1 VIAS TO VCC 8471 F07 Figure 7. Suggested Component Placement for a Boost and Dual-Inductor Inverting Converter 8471fc For more information www.linear.com/8471 27 LT8471 Typical Applications L1 33H VCC 5.3V TO 28V C4 2.2F VIN1 C3 1F VIN2 L3 15H C1 604k SHOUT FB1 C3 432k 27.4k E1 OV/UV 100k 147k LT8471 C5 2.2F SS1 PG1 C2 PG2 FB2 SS2 E2 SYNC 280k 0.1F VOUT1 18V 150mA C1 22F x4 GND 0.1F C1: 25V, X7R, 1206 C2, C3, C6: 10V, X7R, 1206 C4: 50V, X7R, 1206 C5: 50V, X7R, 1206 D1: MICROSEMI UPS140 L1: SUMIDA CDRH105RNP-330NC L2: COILCRAFT MSS1038-153 L3: WURTH 744025150 C6 2.2F D1 31.6k C2 22F x5 L2 15H 100k VOUT2 3.3V 0.8A RT 215k D2 8471 F08a Figure 8a. Wide Input Range Buck Converter with 3.3V Output and Boost Converter with 18V Output at 400kHz VOUT1 5V/DIV VOUT2 100mV/DIV AC-COUPLED VOUT2 2V/DIV VOUT1 500mV/DIV AC-COUPLED IL2 500mA/DIV IL2 500mA/DIV IL1 500mA/DIV IL1 500mA/DIV 5ms/DIV Figure 8b. Start-Up Waveforms 28 8471 F08b 500s/DIV 8471 F08c Figure 8c. Load Step on VOUT1 from 40mA to 135mA to 40mA 8471fc For more information www.linear.com/8471 LT8471 Typical Applications L1A, 15H * C8 2.2F VCC 6V TO 36V C4 2.2F C3 1F VIN1 C6 1F D1 C1 * VIN2 SHOUT 287k 453k C5 2.2F C2 FB2 OV/UV 20k C7 47nF E1 GND C3 C1: 25V, X7R, 1206 C2, C3: 10V, X7R, 1206 C4, C5, C8: 50V, X7R, 1206 C6: 100V, X7R, 1206 C7: 6.3V, X7R, 0603 D1: DIODES INC SBR3U100LP-7 D2: MICROSEMI UPS140 L1: COOPER BUSSMANN DRQ74-150-R L2: COILCRAFT MSS1038-123 L3: WURTH 744025 150 L1B 15H FB1 LT8471 L3 15H VOUT1 12V 20k 287k D2 232k E2 SS1 SS2 SYNC RT 0.1F 0.1F PG1 PG2 C1 22F x2 1.1A (VCC = 36V) 1.02A (VCC = 27V) 0.92A (VCC = 18V) 0.7A (VCC = 10V) 0.4A (VCC = 6V) C2 22F x2 VOUT2 -12V L2 12H 107k 1.1A (VCC = 36V) 1.02A (VCC = 27V) 0.92A (VCC = 18V) 0.7A (VCC = 10V) 0.4A (VCC = 6V) 8471 F09a Figure 9a. Tracking 12V Supplies from 6V to 36V Input at 800kHz 100 5 12.20 4 12.16 -12.30 EFFICIENCY VOUT1 (V) 3 POWER LOSS 12.12 -12.22 12.08 -12.18 40 2 20 1 12.04 0 1.0 12.00 0 0 0.2 0.4 0.6 LOAD CURRENT (A) 0.8 -12.26 VOUT1 = 12V VOUT2 = -12V 0 8471 F09b 0.2 0.4 0.6 LOAD CURRENT (A) VOUT2 (V) 60 POWER LOSS (W) EFFICIENCY (%) 80 -12.14 0.8 -12.10 1.0 8471 F09c Figure 9c. 12V and -12V Outputs vs Load Current (VCC = 18V, Load from VOUT1 to VOUT2) Figure 9b. Efficiency and Power Loss (VCC = 18V, Load from VOUT1 to VOUT2) IL2 1A/DIV IL1 1A/DIV VOUT2 500mV/DIV AC-COUPLED VOUT1 500mV/DIV AC-COUPLED 2.2ms/DIV 8471 F09d Figure 9d. Load Step Between VOUT1 and VOUT2 from 150mA to 780mA to 150mA (VCC = 18V) For more information www.linear.com/8471 8471fc 29 LT8471 Typical Applications VCC 6V TO 32V VIN1 C4 2.2F C3 1F L3 15H VIN2 SHOUT C6 1F C3 475k C7 2.2F C1 FB1 E1 L1 10H LT8471 D1 GND C5 2.2F PG1 C2 100k PG2 E2 SYNC 0.1F RT L2 10H 187k VOUT2 -5V 0.65A (VCC = 6V) 0.95A (VCC = 18V) 1.05A (VCC = 32V) C2 47F x2 316k D2 SS2 0.1F 59k FB2 SS1 1.6A (VCC = 6V) 1.5A (VCC = 18V) 1.5A (VCC = 32V) C1 47F x2 59k OV/UV 100k C1, C2: 10V, X7R, 1210 C3, C4, C5, C6, C7: 50V, X7R, 1206 D1, D2: DIODES INC SBR3U100LP-7 L1: WURTH 74437346 100 L2: WURTH 74437346 100 L3: WURTH 744025 150 316k VOUT1 5V 8471 F10a Figure 10a. Wide Input Range Converter with 5V Output Voltages at 450kHz 90 4 80 EFFICIENCY 3 60 50 POWER LOSS 2 40 30 VCC = 20 10 0 0 0.2 0.4 0.6 LOAD CURRENT (A) 0.8 POWER LOSS (W) EFFICIENCY (%) 70 1 6V 18V 32V 0 1.0 8471 F10b Figure 10b. Efficiency and Power Loss (Load from VOUT1 to VOUT2) VCC VCC VOUT1 VOUT1 1V/DIV 1V/DIV 100ms/DIV 8471 F10c 100ms/DIV 8471 F10d VCC Is Ramped from 0V Up to 6V and Then Back Down to 0V. Channel 1 Output Voltage Is Loaded by a 100 Resistor VCC Is Ramped from 0V Up to 6V and Then Back Down to 0V. Channel 1 Output Voltage Is Loaded by a 5 Resistor Figure 10c. Start-Up/Dropout Performance Figure 10d. Start-Up/Dropout Performance 30 8471fc For more information www.linear.com/8471 LT8471 Typical Applications L1 8.2H VCC 12V TO 18V D1 VIN1 C3 2.2F C4 2.2F VIN2 442k C3 FB1 SHOUT 255k 100k E1 LT8471 OV/UV 15k C5 2.2F PG1 C2 SS2 FB2 SS1 15k L2 8.2H 80.6k E2 SYNC 0.1F C1 10F x3 0.5A (VCC = 12V) 0.75A (VCC = 16V) GND PG2 0.1F VOUT1 24V C1 RT 154k C2 22F x2 VOUT2 5V 1.25A D2 8471 F11 C1, C4: 35V, X7R, 1206 C2: 10V, X7R, 1206 C3, C5: 25V, X7R, 1206 D1, D2: MICROSEMI UPS140 L1, L2: WURTH 74437346082 Figure 11. Boost Converter with 24V Output and Buck Converter with 5V Output at 550kHz 8471fc For more information www.linear.com/8471 31 LT8471 Package Description Please refer to http://www.linear.com/designtools/packaging/ for the most recent package drawings. FE Package 20-Lead Plastic TSSOP (4.4mm) (Reference LTC DWG # 05-08-1663 Rev J) Exposed Pad Variation CB 6.40 - 6.60* (.252 - .260) 3.86 (.152) 3.86 (.152) 20 1918 17 16 15 14 13 12 11 6.60 0.10 2.74 (.108) 4.50 0.10 6.40 2.74 (.252) (.108) BSC SEE NOTE 4 0.45 0.05 1.05 0.10 0.65 BSC 1 2 3 4 5 6 7 8 9 10 RECOMMENDED SOLDER PAD LAYOUT 4.30 - 4.50* (.169 - .177) 0.09 - 0.20 (.0035 - .0079) 0.25 REF NOTE: 1. CONTROLLING DIMENSION: MILLIMETERS MILLIMETERS 2. DIMENSIONS ARE IN (INCHES) 32 0 - 8 0.65 (.0256) BSC 0.50 - 0.75 (.020 - .030) 3. DRAWING NOT TO SCALE 1.20 (.047) MAX 0.195 - 0.30 (.0077 - .0118) TYP 0.05 - 0.15 (.002 - .006) FE20 (CB) TSSOP REV J 1012 4. RECOMMENDED MINIMUM PCB METAL SIZE FOR EXPOSED PAD ATTACHMENT *DIMENSIONS DO NOT INCLUDE MOLD FLASH. MOLD FLASH SHALL NOT EXCEED 0.150mm (.006") PER SIDE 8471fc For more information www.linear.com/8471 LT8471 Revision History REV DATE DESCRIPTION A 06/14 Clarified Applications Information Clarified Typical Applications B 08/14 Clarified Operation Paragraph 9 Clarified Applications Information 2nd Paragraph 10 Clarified Typical Application 34 C 05/15 PAGE NUMBER Added H-Grade Option 14 28, 29, 30, 31, 34 2, 3, 4 8471fc Information furnished by Linear Technology Corporation is believed to be accurate and reliable. However, no responsibility is assumed for its use. Linear Technology Corporation makes no representation that the interconnection its circuits as described herein will not infringe on existing patent rights. Forofmore information www.linear.com/8471 33 LT8471 Typical Application Efficiency and Power Loss VCC = 12V, with Load Current from VOUT2 to VOUT1 500kHz ZETA and 2L Inverting Converters Generates 5V Outputs with Low Output Ripple 90 L1A, 10H C7 2.2F C3 1F 280k L3 15H VIN1 80.6k SHOUT FB1 E1 GND LT8471 C3 15k C5 2.2F C2 FB2 C8 1F SS1 E2 SS2 SYNC RT 0.1F 70 D1 VIN2 OV/UV 182k * C1 L1B 10H 0.1F PG1 169k 100k PG2 * L2A 10H VOUT1, -5V 0.55A (VCC = 4V) 0.95A (VCC = 12V) 1.05A (VCC = 24V) C1 47F x3 50 80.6k * D2 2 40 POWER LOSS 30 1 20 10 15k L2B, 10H 3 60 POWER LOSS (W) VCC 4V TO 25V 80 C6 1F EFFICIENCY (%) * C4 2.2F 4 EFFICIENCY C2 47F x3 0 VOUT2, 5V 0.55A (VCC = 4V) 0.95A (VCC = 12V) 1.05A (VCC = 24V) C1, C2: 10V, X7R, 1210 C3, C4, C5, C7: 35V, X7R, 1206 C6, C8: 50V, X7R, 1206 D1, D2: MICROSEMI UPS140 L1, L2: COOPER BUSSMANN DRQ74-100-R L3: WURTH 744025 150 0.2 0.4 0.6 LOAD CURRENT (A) 0.8 0 1.0 8471 TA02b Output Voltage Ripple in CCM, VCC = 10V 100k 8471 TA02a 0 VOUT1 20mV/DIV AC-COUPLED VOUT2 20mV/DIV AC-COUPLED IL2 500mA/DIV IL1 500mA/DIV 1s/DIV 8471 TA02c Related Parts PART NUMBER DESCRIPTION LT8610/LT8611 42V, 2.5A, 96% Efficiency, 2.2MHz Synchronous Micropower VIN: 3.4V to 42V, VOUT(MIN) = 0.985V, IQ = 2.5A, ISD <1A, Step-Down DC/DC Converter with IQ = 2.5A and Input/ MSOP-16E and 3mm x 5mm QFN-24 Packages Output Current Limit/Monitor (LT8611 Only) LT8610A/ LT8610AB 42V, 3.5A, 96% Efficiency, 2.2MHz Synchronous Micropower VIN: 3.4V to 42V, VOUT(MIN) = 0.985V, IQ = 2.5A, ISD <1A, Step-Down DC/DC Converter with IQ = 2.5A MSOP-16E and 3mm x 5mm QFN-24 Package LT8582 40V, Dual 3A, 2.5MHz High Efficiency Boost Converter VIN: 2.5V to 22V, 40VMAX, VOUT(MAX) = 40V, IQ = 2.8A, ISD <1A, 7mm x 4mm DFN-24 Package LT3581 40V, 3.3A, 2.5MHz High Efficiency Boost Converter VIN: 2.5V to 22V, 40VMAX, VOUT(MAX) = 40V, IQ = 1mA, ISD <1A, 4mm x 3mm DFN-14 and MSOP-16E Packages LT8582 40V, Dual 3A Boost, Inverter, SEPIC, 2.5MHz High Efficiency Boost Converter VIN: 2.5V to 22V, 40VMAX, VOUT(MAX) = 40V, IQ = 2.1mA, ISD <1A, 7mm x 4mm DFN-24 Package LT3579/LT3579-1 40V, 3.3A Boost, Inverter, SEPIC, 2.5MHz High Efficiency Boost Converter VIN: 2.5V to 22V, 40VMAX, VOUT(MAX) = 40V, IQ = 1mA, ISD <1A, 4mm x 5mm QFN-20 and TSSOP-20E Packages LT3471 40V Dual 1.3A Boost, Inverter, 1.2MHz High Efficiency Boost Converter VIN: 2.4V to 16V, 40VMAX, VOUT(MAX) = 40V, IQ = 2.4mA, ISD <1A, 3mm x 3mm DFN Package 34 Linear Technology Corporation COMMENTS 1630 McCarthy Blvd., Milpitas, CA 95035-7417 For more information www.linear.com/8471 (408)432-1900 FAX: (408) 434-0507 www.linear.com/8471 8471fc LT 0515 REV C * PRINTED IN USA LINEAR TECHNOLOGY CORPORATION 2014