Datashee
t
Product structureSilicon monolithic integrated circuitThis product has no designed protection against radioactive rays
1/33 TSZ02201-0R2R0G100070-1-2
©2013 ROHM Co., Ltd. All rights reserved.
TSZ2211114001
www.rohm.com
31.May.2013 Rev.003
Serial EEPROM Series Standard EEPROM
I2C BUS EEPROM (2-Wire)
BR24T02-W
General Description
BR24T02-W is a serial EEPROM of I2C BUS interface method
Features
Completely conforming to the world standard I2C
BUS.
All controls available by 2 ports of serial clock
(SCL) and serial data (SDA)
Other devices than EEPROM can be connected to
the same port, saving microcontroller port
1.6V to 5.5V Single Power Source Operation most
suitable for battery use
1.6V to 5.5V wide limit of operating voltage, possible
FAST MODE 400KHz operation
Page Write Mode useful for initial value write at
factory shipment
Self-timed Programming Cycle
Low Current Consumption
Prevention of Write Mistake
¾ Write (Write Protect) Function Added
¾ Prevention of Write Mistake at Low Voltage
More than 1 million write cycles
More than 40 years data retention
Noise filter built in SCL / SDA terminal
Initial delivery state FFh
Packages W(Typ) x D(Typ) x H(Max)
BR24T02-W
Capacity Bit Format Type Power Source
Voltage Package
2Kbit 256×8
BR24T02-W
1.6V to 5.5V
DIP-T8
BR24T02F-W SOP8
BR24T02FJ-W SOP-J8
BR24T02FV-W SSOP-B8
BR24T02FVT-W TSSOP-B8
BR24T02FVJ-W TSSOP-B8J
BR24T02FVM-W MSOP8
BR24T02NUX-W VSON008X2030
SOP8
5.00mm x 6.20mm x 1.71mm
SOP- J8
4.90mm x 6.00mm x 1.65mm
Figure 1.
V
SON008X2030
2.00mm x 3.00mm x 0.60mm
TSSOP-B8
3.00mm x 6.40mm x 1.20mm
DIP-T8
9.30mm x 6.50mm x 7.10mm
TSSOP-B8J
3.00mm x 4.90mm x 1.10mm
MSOP8
2.90mm x 4.00mm x 0.90mm
SSOP-B8
3.00mm x 6.40mm x 1.35mm
Datasheet
2/33
BR24T02-W
TSZ02201-0R2R0G100070-1-2
©2013 ROHM Co., Ltd. All rights reserved.
TSZ2211115001
www.rohm.com
31.May.2013 Rev.003
Absolute Maximum Ratings (Ta=25°C)
Parameter Symbol Rating Unit Remark
Supply Voltage VCC -0.3 to +6.5 V
Power Dissipation Pd
450 (SOP8)
mW
Derate by 4.5mW/°C when operating above Ta=25°C
450 (SOP-J8) Derate by 4.5mW/°C when operating above Ta=25°C
300 (SSOP-B8) Derate by 3.0mW/°C when operating above Ta=25°C
330 (TSSOP-B8) Derate by 3.3mW/°C when operating above Ta=25°C
310 (TSSOP-B8J) Derate by 3.1mW/°C when operating above Ta=25°C
310 (MSOP8) Derate by 3.1mW/°C when operating above Ta=25°C
300 (VSON008X2030) Derate by 3.0mW/°C when operating above Ta=25°C
800 (DIP-T8) Derate by 8.0mW/°C when operating above Ta=25°C
Storage Temperature Tstg -65 to +150 °C
Operating Temperature Topr -40 to +85 °C
Input Voltage/
Output Voltage -0.3 to VCC+1.0 V
The Max value of input voltage / output voltage is not over 6.5V.
When the pulse width is 50ns or less, the Min value of input voltage
/ output voltage is not lower than -0.8V.
Junction
Temperature Tjmax 150 °C
Junction temperature at the storag e condition
Electrostatic discharge
voltage
(human body model) VESD -4000 to +4000 V
Memory Cell Characteristics (Ta=25°C, VCC=1.6V to 5.5V)
Parameter Limit Unit
Min Typ Max
Write Cycles
(
1
)
1,000,000 - - Times
Data Retention (1) 40 - - Years
(1) Not 100% TESTED
Recommended Operating Conditions
Parameter Symbol Rating Unit
Power Source Voltage VCC 1.6 to 5.5 V
Input Voltage VIN 0 to VCC
DC Characteristics
(
Unless otherwise specified, Ta= -40°C to +85°C
,
VCC=1.6V to 5.5V
)
Parameter Symbol Limit Unit Conditions
Min Typ Max
Input High Voltage1 VIH1 0.7VCC - VCC+1.0 V 1.7VVCC5.5V
Input Low Voltage1 VIL1 -0.3
(2) - +0.3VCC V 1.7VVCC5.5V
Input High Voltage2 VIH2 0.8VCC - VCC+1.0 V 1.6VVCC1.7V
Input Low Voltage2 VIL2 -0.3
(2) - +0.2VCC V 1.6VVCC1.7V
Output Low Voltage1 VOL1 - - 0.4 V IOL=3.0mA, 2.5VVCC5.5V (SDA)
Output Low Voltage2 VOL2 - - 0.2 V IOL=0.7mA, 1.6VVCC2.5V (SDA)
Input Leakage Current ILI -1 - +1 µA VIN=0 to VCC
Output Leakage Current ILO -1 - +1 µA VOUT=0 to VCC (SDA)
Supply Current (Write) ICC1 - - 2.0 mA
VCC=5.5V, fSCL=400kHz,
t
WR=5ms,
Byte write, Page write
Supply Current (Read) ICC2 - - 0.5 mA
VCC=5.5V, fSCL=400kHz
Random read, current read, sequential read
Standby Current ISB - - 2.0 µA
VCC=5.5V, SDASCL=VCC
A0,A1,A2=GND,WP=GND
(2) When the pulse width is 50ns or less, it is -0.8V.
Datasheet
3/33
BR24T02-W
TSZ02201-0R2R0G100070-1-2
©2013 ROHM Co., Ltd. All rights reserved.
TSZ2211115001
www.rohm.com
31.May.2013 Rev.003
AC Characteristics
(Unless otherwise specified, Ta= -40°C to +85°C, VCC=1.6V to 5.5V)
Parameter Symbol
Limit Unit
Min Typ Max
Clock Frequency fSCL - - 400 kHz
Data Clock High Period tHIGH 0.6 - - µs
Data Clock Low Period tLOW 1.2 - - µs
SDA,SCL(INPUT) Rise Time (1) t
R - - 1.0 µs
SDA,SCL (INPUT)Fall Time (1) t
F1 - - 1.0 µs
SDA(OUTPUT)Fall Time (1) t
F2 - - 0.3 µs
Start Condition Hold Time tHD:STA 0.6 - - µs
Start Condition Setup Time tSU:STA 0.6 - - µs
Input Data Hold Time tHD:DAT 0 - - ns
Input Data Setup Time tSU:DAT 100 - - ns
Output Data Delay Time tPD 0.1 - 0.9 µs
Output Data Hold Time tDH 0.1 - - µs
Stop Condition Setup Time tSU:STO 0.6 - - µs
Bus Free Time tBUF 1.2 - - µs
Write Cycle Time tWR - - 5 ms
Noise Spike Width (SDA and SCL) tI - - 0.1 µs
WP Hold Time tHD:WP 1.0 - - µs
WP Setup Time tSU:WP 0.1 - - µs
WP High Period tHIGH:WP 1.0 - - µs
(1) Not 100% TESTED.
Condition Input Data Level:VIL=0.2×VCC VIH=0.8×VCC
Input Data Timing Reference Level: 0.3×VCC/0.7×VCC
Output Data Timing Reference Level: 0.3×VCC/0.7×VCC
Rise/Fall Time : 20ns
Serial Input / Output Timing
SCL
SDA
(入力)
SDA
(出力)
tR tF1 tHIGH
tSU:DAT tLOW tHD:DAT
tDH
tPD
tBUF
tHD:STA
70%
30%
70%
70%
30%
70% 70%
30% 30%
70% 70%
30%
70% 70%
70%
70%
30%
30%
30% 30%
tF2
(INPUT)
(OUTPUT)
Input read at the rise edge of SCL
Data output in sync with the fall of SCL
Figure 2-(a). Serial Input / Output Timing
Figure 2-(b). Start-Stop Bit Timing
Figure 2-(c). Write Cycle Timing
Figure 2-(d). WP Timing at Write Execution
Figure 2-(e). WP Timing at Write Cancel
70% 70%
tSU:STA tHD:STA
START CONDITION
tSU:STO
STOP CONDITION
30%
30%
70%
70%
D0 ACK
tWRwrite data
(n-t h address) START CONDITIONSTOP CON DITION
70%
70%
DATA(1)
D0 ACK
D1
DATA(n)
ACK tWR
30%
70%
STOP CONDITION
tHD:WP
tSU:WP
30%
70%
DATA(1)
D0
D1 ACK
DATA(n)
ACK
tHIGH:WP
70% 70%
tWR
70%
Datasheet
4/33
BR24T02-W
TSZ02201-0R2R0G100070-1-2
©2013 ROHM Co., Ltd. All rights reserved.
TSZ2211115001
www.rohm.com
31.May.2013 Rev.003
Block Diagram
Figure 3. Block Diagram
Pin Configuration (TOP VIEW)
Pin Descriptions
Terminal
Name Input/
Output Descriptions
A0 Input
Slave address setting*
A1 Input
Slave address setting*
A2 Input
Slave address setting*
GND -
Reference voltage of all input / output, 0V
SDA Input/
Output Serial data input serial data output
SCL Input
Serial clock input
WP Input
Write protect terminal
VCC -
Connect the power source.
*A0, A1 and A2 are not allowed to use as open.
2
5
6
VCC
SCL
GND
BR24T02-W
1
3
4
7
8
WP
SDA
A
2
A
1
A
0
8bit
8
7
6
5 4
3
2
1
SDA
SCL
WP
VCC
GND
A
2
A
1
A
0
A
ddress
Decoder
Word
A
ddress
Register Data
Register
Control Circuit
High Voltage
Generating Circuit
Power Source
Voltage Detection
8bit
CK
START
STOP
2Kbit EEPROM Array
Datasheet
5/33
BR24T02-W
TSZ02201-0R2R0G100070-1-2
©2013 ROHM Co., Ltd. All rights reserved.
TSZ2211115001
www.rohm.com
31.May.2013 Rev.003
Figure 6. Output Lo
w
Voltage1 vs Output Low Current
(Vcc=2.5V) Figure 7. Output Lo
w
Voltage2 vs Output Low Current
(Vcc=1.6V)
Figure 4. Input High Voltage1,2 vs Supply Voltage
(A0, A1, A2, SCL, SDA, WP)
Figure 5. Input Lo
w
Voltage1,2 vs Supply Voltage
(A0, A1, A2, SCL, SDA, WP)
Typical Performance Curves
0
1
2
3
4
5
6
0123456
Supply Volt age: Vcc ( V)
Input Low V oltage : V
IL1
(V)
Ta=-40
Ta= 25
Ta= 85
SPEC
0
1
2
3
4
5
6
0123456
S upply Voltage: Vcc ( v)
Input High Vo ltage: V
IH1
(V)
Ta=-40
Ta= 25
Ta= 85
SPEC
0
0.2
0.4
0.6
0.8
1
0123456
O u t p ut Low Cur r ent: I
OL
(mA)
Output Low Voltage1: V
OL1
(V)
SPEC
Ta=-40
Ta= 25
Ta= 85
0
0.2
0.4
0.6
0.8
1
0123456
Output Low Curr ent: I
OL
(mA)
O utput Low V olt age2 : V
OL2
(V)
Ta=-40
Ta= 25
Ta= 85
SPEC
Datasheet
6/33
BR24T02-W
TSZ02201-0R2R0G100070-1-2
©2013 ROHM Co., Ltd. All rights reserved.
TSZ2211115001
www.rohm.com
31.May.2013 Rev.003
Figure 11. Supply Current (READ) vs Supply Voltage
(fSCL=400kHz)
Figure 8. Input Leakage Curre nt vs Supply Voltage
(A0, A1, A2, SCL, WP)
Figure 9. Output Leakage C urrent vs Supply Voltage
(SDA)
Figure 10. Supply Current (WRITE) vs Supply Voltage
(fSCL=400kHz)
Typical Performance Curvescontinued
0
0.2
0.4
0.6
0.8
1
1.2
0123456
S upply Volt age : Vcc(V)
Input Leak age Cur r ent : I
LI
(µA)
Ta=-40
Ta= 25
Ta= 85
SPEC
0
0.2
0.4
0.6
0.8
1
1.2
0123456
Supply Voltage : Vcc ( V)
O utput Leak a ge Cur r ent : I
LO
(µA)
Ta=-40
Ta= 25
Ta= 85
SPEC
0
0.5
1
1.5
2
2.5
3
0123456
Su pply Voltage : Vcc( V)
Supply Current (W RIT E) : I cc1(mA)
Ta=-40
Ta= 25
Ta= 85
SPEC
0
0.1
0.2
0.3
0.4
0.5
0.6
0123456
S uppl y Voltage : V cc (V )
S uppl y Current (RE AD) : I
CC2
(mA)
SPEC
Ta=-40℃
Ta= 25℃
Ta= 85℃
Datasheet
7/33
BR24T02-W
TSZ02201-0R2R0G100070-1-2
©2013 ROHM Co., Ltd. All rights reserved.
TSZ2211115001
www.rohm.com
31.May.2013 Rev.003
Figure 13. Clock Frequency vs Supply Voltage
Figure 14. Data Clock High Period vs Supply Voltage
Figure 12. S
t
andby Current vs Supply Voltage
Figure 15. Data Clock Low Period vs Supply Voltage
Typical Performance Curvescontinued
0
0.2
0.4
0.6
0.8
1
0123456
S upply Volt age : Vcc ( V)
Data Clock High Period : t HIGH(µs)
SPEC
Ta=-40℃
Ta= 25℃
Ta= 85℃
0
0.3
0.6
0.9
1.2
1.5
0123456
S uppl y Voltage : V cc(V )
Data Cloc k Low Period : t LOWs)
SPEC
Ta=-40℃
Ta= 25℃
Ta= 85℃
0.1
1
10
100
1000
10000
0123456
Supply Volt age : Vcc ( V)
Clock Frequency : f scl(kHz)
SPEC
Ta=-40℃
Ta= 25℃
Ta= 85℃
0
0.5
1
1.5
2
2.5
0123456
S upply Voltage : Vcc ( V)
S t andby Cur r ent : I
SB
(µA)
SPEC
Ta=-40℃
Ta= 25℃
Ta= 85℃
Datasheet
8/33
BR24T02-W
TSZ02201-0R2R0G100070-1-2
©2013 ROHM Co., Ltd. All rights reserved.
TSZ2211115001
www.rohm.com
31.May.2013 Rev.003
Figure 17. Start Condition Setup Time vs Supply Voltage
Figure 18. Input Data Hold Time vs Supply Voltage
(HIGH)
Figure 16. Start Condition Hold Time vs Supply Voltage
Figure 19. Input Data Hold Time vs Supply Voltage
(LOW)
Typical Performance Curvescontinued
0
0.2
0.4
0.6
0.8
1
0123456
Supply Voltage : Vc c(V)
Start Condition Hold Time : t
HD:STA
s)
SPEC
Ta=-40
Ta= 25
Ta= 85
-0.2
0
0.2
0.4
0.6
0.8
1
0123456
S uppl y Vol t age : V cc(V )
Start Condition Setup Time : t
SU:STA
s)
SPEC
Ta=-40℃
Ta= 25℃
Ta= 85℃
-200
-150
-100
-50
0
50
0123456
S uppl y Vol t age : V cc (V)
Input Data Hold Time : t
HD:DAT
(ns)
SPEC
Ta=-40
Ta= 25
Ta= 85
-200
-150
-100
-50
0
50
0123456
S uppl y V ol tage : V cc(V )
Input Data Hold Time : t
HD:DAT
(ns)
SPEC
Ta=-40℃
Ta= 25℃
Ta= 85℃
Datasheet
9/33
BR24T02-W
TSZ02201-0R2R0G100070-1-2
©2013 ROHM Co., Ltd. All rights reserved.
TSZ2211115001
www.rohm.com
31.May.2013 Rev.003
Figure 23. Output Data Delay Time vs Supply Voltage
(HIGH)
Figure 21. Input Data Setup Time vs Supply Voltage
(LOW)
Figure 22. Output Data Delay Time vs Supply Voltage
(LOW)
Figure 20. Input Data Setup Time vs Supply Voltage
(HIGH)
Typical Performance Curvescontinued
-200
-100
0
100
200
300
0123456
S uppl y Vol tage : Vcc(V )
Input Data Setup Time : t SU:DAT(ns)
SPEC
Ta=-40℃
Ta= 25℃
Ta= 85℃
-200
-100
0
100
200
300
0123456
S upply Voltage : Vcc(V)
Input Data Setup Time : t
SU:DAT
(ns)
SPEC
Ta=-40℃
Ta= 25℃
Ta= 85℃
0
0.5
1
1.5
2
0123456
Supply Volt age : Vcc ( V)
Output Data Delay Time : t
PD
(µs)
SPEC
SPEC
Ta=-40℃
Ta= 25℃
Ta= 85℃
0
0.5
1
1.5
2
0123456
Supply Volt age : Vcc ( V)
Output Data Delay Time : t
PD
(µs)
SPEC
SPEC
Ta=-40℃
Ta= 25℃
Ta= 85℃
Datasheet
10/33
BR24T02-W
TSZ02201-0R2R0G100070-1-2
©2013 ROHM Co., Ltd. All rights reserved.
TSZ2211115001
www.rohm.com
31.May.2013 Rev.003
Figure 24. Stop Condition Setup Time vs Suppl y Volta ge
Figure 27. Noise Spike Width vs Supply Voltage
(SCL H)
Figure 25. Bus Fr ee Time vs Supply Voltage
Figure 26. Write Cycle Time vs Supply Voltage
Typical Performance Curvescontinued
-0.5
0
0.5
1
1.5
2
0123456
S upply Voltage : Vcc ( V)
Stop Condit ion S etup Time : t
SU:STO
(µs)
SPEC
Ta=-40℃
Ta= 25℃
Ta= 85℃
0
0.5
1
1.5
2
0123456
S upply Volt age : Vc c ( V)
Bus Free Time : t
BUF
(µs)
SPEC
Ta=-40℃
Ta= 25℃
Ta= 85℃
0
1
2
3
4
5
6
0123456
S uppl y Vol t age : Vc c(V )
Write Cy cle Time : t
WR
(ms)
Ta=-40
Ta= 25
Ta= 85
SPEC
0
0.1
0.2
0.3
0.4
0.5
0.6
0123456
S uppl y V ol tage : V cc(V )
Nois e S pike Width ( S CL H) : t I s )
SPEC
Ta=-40℃
Ta= 25℃
Ta= 85℃
Datasheet
11/33
BR24T02-W
TSZ02201-0R2R0G100070-1-2
©2013 ROHM Co., Ltd. All rights reserved.
TSZ2211115001
www.rohm.com
31.May.2013 Rev.003
Figure 30. Noise Spike Width vs Supply Voltage
(SDA L)
Figure 31. WP Hold Time vs Supply Voltage
Figure 28. Noise Spike Width vs Supply Voltage
(SCL L)
Figure 29. Noise Spike Width vs Supply Voltage
(SDA H)
Typical Performance Curvescontinued
0
0.1
0.2
0.3
0.4
0.5
0.6
0123456
Supply Voltage : Vcc (V)
Nois e S pik e Widt h ( S CL L) : t I(µs )
SPEC
Ta=-40℃
Ta= 25℃
Ta= 85℃
0
0.1
0.2
0.3
0.4
0.5
0.6
0123456
Supply Voltage : Vcc(V)
Noise S pike Widt h( S DA L) : t I( µs )
SPEC
Ta=-40℃
Ta= 25℃
Ta= 85℃
0
0.2
0.4
0.6
0.8
1
1.2
0123456
Supply Voltage : Vcc (V)
WP Hold Time : t
HD:WP
s)
SPEC
Ta=-40℃
Ta= 25℃
Ta= 85℃
0
0.1
0.2
0.3
0.4
0.5
0.6
0123456
Supply Voltage : Vcc(V)
Noise Sp i ke Width (SDA H): tIs)
SPEC
Ta=-40℃
Ta= 25℃
Ta= 85℃
Datasheet
12/33
BR24T02-W
TSZ02201-0R2R0G100070-1-2
©2013 ROHM Co., Ltd. All rights reserved.
TSZ2211115001
www.rohm.com
31.May.2013 Rev.003
Figure 32. WP Setup Time vs Supply Voltage
Figure 33. WP High Period vs Supply Voltage
Typical Performance Curvescontinued
-0.6
-0.5
-0.4
-0.3
-0.2
-0.1
0
0.1
0.2
0123456
S uppl y Vol t a ge : Vcc(V )
WP Setup Time : t
SU:WP
s)
SPEC
Ta=-40℃
Ta= 25℃
Ta= 85℃
0
0.2
0.4
0.6
0.8
1
1.2
0123456
S uppl y V ol tage: V cc (V )
WP High Period : t
HIGH:WP
( µs)
SPEC
Ta=-40℃
Ta= 25℃
Ta= 85℃
Datasheet
13/33
BR24T02-W
TSZ02201-0R2R0G100070-1-2
©2013 ROHM Co., Ltd. All rights reserved.
TSZ2211115001
www.rohm.com
31.May.2013 Rev.003
Timing Chart
1. I2C BUS Data Communication
I2C BUS data communication starts by start condition input, and ends by s top condition input. Data is always 8bit long,
and acknowledge is always required after each byte. I2C BUS data communication with several devices is possible by
connecting with 2 communication lines: serial data (SDA) and serial clock (SCL).
Among the devices, there should b e a “master” that genera tes clock and control comm unication start and end. T he rest
become “slave” which are controlled by an address pecul iar to each device, like this EEPROM. The device that outputs
data to the bus during data communication is called “transmitter”, and the device that receives data is cal led “receiver”.
2. Start Condition (Start Bit Recognition)
(1) Before executing each command, start condition (start bit) where SDA goes from 'HIGH' down to 'LOW' when SCL is
'HIGH' is necessary.
(2) T his IC always detects whether SDA a nd SCL are in start condition (start bit) or not, therefore, unless this condition
is satisfied, any command cannot be executed.
3. Stop Condition (Stop Bit Recognition)
(1) Each command can be ended by a stop condition (stop bit) where SDA goes from 'LOW' to 'HIGH' while SCL is
'HIGH'.
4. Acknowledge (ACK) Signal
(1) T he ackno wledge (ACK) signal is a software rule to show whether data transfer has been made normally or not. In a
master-slave communication, the device (Ex. µ-COM sends slave address input for write or read command, to this
IC ) at the transmitter (sending) side releases the bus after output of 8bit data.
(2) The device (Ex. This IC receives the slave address input for write or read command from the µ-COM) at the
receiver (receiving) side sets SDA 'LOW' during the 9th clock cycle, and outputs acknowledge signal (ACK signal)
showing that it has received the 8bit data.
(3) This IC, after recognizing start condition and slave address (8bit), outputs acknowledge signal (ACK signal) 'LOW'.
(4) After receiving 8bit data (word address and write data) during each write operation, this IC outputs acknowledge
signal (ACK signal) 'LOW'.
(5) During read operation, this IC outputs 8bit data (read data) and detects acknowledge signal (ACK signal) 'LOW'.
When acknowledge si gnal (ACK signal) is detected, and stop condition is not sent from the master (µ-COM) side,
this IC continues to output data. When ackno wledge signal (ACK signal) is not detected, this IC stops data transfer,
recognizes stop condition (stop bit), and ends read operation. Then this IC becomes ready for another transmission.
5. Device Addressing
(1) Slave address comes after start condition from master.
(2) The significant 4 bits of slave address are used for recognizing a device type.
The device code of this IC is fixed to '1010' .
(3) Next slave addresses (A2 A1 A0 --- device address) are for selecting devices, and plural ones can be used on a
same bus according to the number of device addresses.
(4) The most insignificant bit ( W/R --- READ / WRITE ) of slave address is used for designating write or read
operation, and is as shown below.
Setting W/R to 0 ------- write (setting 0 to word address setting of random read)
Setting W/R to 1 ------- read
Slave Address Maximum Number of
Connected Buses
1 0 1 0 A2 A1 A0 R/W
―― 8
89 89 89
S P
condition condition
ACK STOPACKDATA DATAADDRES
S
START R/W ACK
1-7
SDA
SCL 1-7 1-7
Figure 34. Data Transfer Timing
Datasheet
14/33
BR24T02-W
TSZ02201-0R2R0G100070-1-2
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TSZ2211115001
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31.May.2013 Rev.003
Write Comm and
1. Write Cycle
(1) Arbitrary data can be written to this EEPROM. When writing only 1 byte, Byte Write is normally used, and when
writing continuous data of 2 bytes or more, simultaneous write is possible by Page Write cycle. The maximum
number of bytes is specified per device of each capacity. Up to 8 arbitrary bytes can be written.
(2) During internal write execution, all input commands are ignored, therefore ACK is not returned.
(3) Data is written to the address designated by word address (n-th address)
(4) By issuing stop bit after 8bit data input, internal write to memory cell starts.
(5) When internal write is started, command is not accepted for tWR (5ms at maximum).
(6) Using page write cycle, writing in bulk is done as follows: When data of more than 8 bytes is sent, the bytes in
excess overwrite the data already sent first.
(Refer to "Internal Address Increment”)
(7) As for page write cycle of BR24T02-W, where 2 or more bytes of data is intended to be written, after the 5
significant bits of word addres s are designated arbitraril y, on ly the value of 3 least significant bits in t he address is
incremented internally, so that data up to 8 bytes of memory only can be written.
In the case BR24T02-W, 1 page=8bytes, but the page write cycle time is 5ms at maximum for 8byte bulk write.
It does not stand 5ms at maximum × 8byte=40ms (Max)
2. Internal Address Increment
Page write mode (in the case of BR24T 02-W )
3. Write Protect (WP) Terminal
Write Protect (WP) Function
When WP terminal is set at VCC (H level), data rewrite of all addresses is prohibited. When it is set at GND (L level),
data rewrite of all address is e nabled. Be sur e to connect this termin al to VCC or GND, or control it to H l evel or L level.
Do not leave it open.
In case of using it as ROM, it is recommended to connect it to pull up or VCC.
At extremely low voltage at power ON / OFF, by setting the W P terminal 'H', write error can be prevented.
A1 A2 WA
7 D7
1 1 0 0
W
R
I
T
E
S
T
A
R
T
R
/
W
S
T
O
P
WORD
ADDRESS DATA
SLAVE
ADDRESS
A0 WA
0 D0
A
C
K
SDA
LINE
A
C
K
A
C
K
Figure 35. Byte Write Cycle
Figure 36. Page Write Cycle
W
R
I
T
E
S
T
A
R
T
R
/
W
A
C
K
S
T
O
P
WORD
ADDRESS(n) DATA(n)
SDA
LINE
A
C
K
A
C
K
DATA(n+7)
A
C
K
SLAVE
ADDRESS
1 0 0
1
A0
A1
A2 W
A
7 D0
D7 D0
W
A
0
For example, when it is started from address 06h,
then, increment is made as below,
06h07h00h01h・・・ please take note.
06h・・・06 in hexadecimal, therefore,
00000110 becomes a binary number.
WA7 WA4 WA3 WA2 WA1 WA0
0 00000
0 00001
0 00010
0 0110
0 0111
0 0000
Increment
06h
Significant bit is fixed.
No digit up
Datasheet
15/33
BR24T02-W
TSZ02201-0R2R0G100070-1-2
©2013 ROHM Co., Ltd. All rights reserved.
TSZ2211115001
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31.May.2013 Rev.003
Read Command
1. Read Cycle
Read cycle is when data of EEPROM is read. Read cycle could be random read cycle or current read cycle. Random
read cycle is a command to read data by designating a spec ific address, an d is used generally. Current read cycle is a
command to read data of internal address re gister without designating an a ddress, and is used when to v erif y just after
write cycle. In both the read cycles, sequential read cycle is available where the next address data can be read in
succession.
(1) In random read cycle, data of designated word address can be read.
(2) When the command just before current read cycle is random read cycle, current read cycle (each including
sequential read cycle), data of incremented last read address (n)-th, i.e., data of the (n+1)-th address is output.
(3) When ACK signal 'LOW' after D0 is detected, and stop condition is not sent from master (µ-COM) side, the next
address data can be read in succession.
(4) Read c ycl e is ended by stop condition where 'H' is input to ACK signal after D0 and SDA signal goes from ‘L’ to ‘H’
while SCL signal is 'H'.
(5) When 'H' is not input to ACK signal after D0, sequential read gets in, and the next data is output.
Therefore, read command cycle cannot be ended. To end read command cycle, be sure to input 'H' to ACK signal
after D0, and the stop condition where SDA goes from ‘L’ to ‘H’ while SCL signal is 'H'.
(6) Sequential read is ended by stop condition where 'H' is input to ACK signal after arbitrary D0 and SDA is asserted
from ‘L to ‘H’ while SCL signal is 'H'.
Figure 37. Random Read Cycle
Figure 38. Current Read Cycle
Figure 39. Sequential Read Cycle (in the case of current read cycle)
W
R
I
T
E
S
T
A
R
T
R
/
W
A
C
K
S
T
O
P
WORD
ADDRESS(n)
SDA
LINE
A
C
K
A
C
K
DATA(n)
A
C
K
SLAVE
ADDRESS
10 0 1 A0 A1 A2 WA
7 A0 D0
SLAVE
ADDRESS
10 0
1A1 A2
S
T
A
R
T
D7
R
/
W
R
E
A
D
WA
0
S
T
A
R
T
S
T
O
P
SDA
LINE
A
C
K
DATA(n)
A
C
K
SLAVE
ADDRESS
10 0 1 A0 A1 A2 D0 D7
R
/
W
R
E
A
D
R
E
A
D
S
T
A
R
T
R
/
W
A
C
K
S
T
O
P
DATA
(
n
)
SDA
LINE
A
C
K
A
C
K
DATA
(
n+x
)
A
C
K
SLAVE
ADDRESS
10 0
1A0
A1
A2 D0 D7 D0 D7
Datasheet
16/33
BR24T02-W
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31.May.2013 Rev.003
Sof tware Reset
Software reset is executed to avoid malfunction after power on and during command input. Software reset has several
kinds and 3 kinds of them are shown in the figure below. (Refer to Figure 40-(a), Figure 40-(b), and Figure 40-(c).) Within
the dummy clock input area, the SDA bus is released ('H' by pull up) and ACK output an d read data '0' (both 'L' level) may
be output from EEPROM. Therefore, if 'H' is input forcibly, output may conflict and over current may flow, leading to
instantaneous power failure of system power source or influence upon devices.
Acknowledge Polling
During internal write execution, all input commands are ignored, therefore ACK is not returned. During internal automatic
write execution after write cycle input, next command (slave address) is sent. If the first ACK signal sends back 'L', then it
means end of write operation, else 'H' is returned, which means writing is still in progress. By the use of acknowledge
polling, next command can be exec uted without waiting for tWR = 5ms.
To write continuously, W/R = 0, then to carry out current read cycle after write, slave address with W/R = 1 is sent. If
ACK signal sends back 'L', and then execute word address input and data output and so forth.
1 2 13 14
SCL
Dummy clock×14 Start×2
SCL
Figure 40-(a). The Case of Dummy Clock×14 + START+START+ Command Input
Start command from START input.
2 1 8 9
Dummy clock×9 Start
Figure 40-(b). The Case of START + Dummy Clock×9 + START + Command Input
Start
Normal command
Normal command
Normal command
Normal command
Start×9
SDA
SDA
SCL
SD
1 2 3 8 9 7
Figure 40-(c). START×9 + Command Input
Normal command
Normal command
SDA
Slave
address
Word
address
S
T
A
R
T
First write command
A
C
K
H
A
C
K
L
Slave
address
Slave
address
Slave
address Data
Write command
During internal write,
ACK = HIGH is returned.
After completion of internal write,
ACK=LOW is returned, so input next
word address and data in succession.
tWR
tWR
Second write command
S
T
A
R
T
S
T
A
R
T
S
T
A
R
T
S
T
A
R
T
S
T
O
P
S
T
O
P
A
C
K
H
A
C
K
H
A
C
K
L
A
C
K
L
Figure 41. Case of Continuous Write by Acknowledge Polling
Datasheet
17/33
BR24T02-W
TSZ02201-0R2R0G100070-1-2
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31.May.2013 Rev.003
WP Valid Timing (Write Cancel)
WP is usually fixed to ' H' or ' L', but when W P is used to ca nc el write cycle and so on, obse rve the fo llo wing WP valid timing.
During write cycle execution, inside cancel valid area, by setting WP='H', write cycle can be cancelled. In both byte write
cycle and page write cycle, the area from the first start condition of command to the rise of clock to take in D0 of data(in
page write cycle, the first byte data) is the cancel invalid area.
WP input in this area becomes ‘Don't care’. The area from the rise of SCL to take in D0 to the stop condition input is the
cancel valid area. Furthermore, after the execution of forced end by WP, the IC enters standby status.
Command Cancel by Start Condition and Stop Condition
During command input, by continuously inputting start condition and stop condition, command can be cancelled. (Figure
43.) However, within ACK out put area and during data read, SDA bus may output 'L'. In this case, start condition and stop
condition cannot be input, so reset is not available. Therefore, execute software reset. When command is cancelled by
start-stop condition during random read cycle, sequential read cycle, or current read cycle, internal setting address is not
determined. Therefore, it is not possib le to carr y out current read c ycle in s uccession. To carry out read cycle in s uccession ,
carry out random read cycle.
Rise of D0 taken clock
SCL
D0 ACK
Enlarged view
SCL
SDA ACK D0
Rise of SDA
SDA
WP
WP cancel invalid area WP cancel valid area
Data is not written.
Figure 42. WP Valid Timing
Slave
address D7 D6 D5 D4 D3 D2 D1 D0 Data tWR
SDA D1
S
T
A
R
T
A
C
K
L
A
C
K
L
A
C
K
L
A
C
K
L
S
T
O
P
Word
address
Enlarged view
WP cancel invalid area
Figure 43. Case of Cancel by Start, Stop Condition during Slave Address Input
SCL
SDA 1 1 0 0
Start condition Stop condition
Datasheet
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BR24T02-W
TSZ02201-0R2R0G100070-1-2
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31.May.2013 Rev.003
I/O Peripheral Circuit
1. Pull-up resistance of SDA terminal
SDA is NMOS open drain, so it requir es a pu ll up r esistor. A s for this resistance v alue (RPU), select an appropriate value
from microcontroller VIL, IL, and VOL-IOL characteristics of this IC. If RPU is large, operating frequency is limited. The
smaller the RPU, the larger is the supply current (Read).
2. Maximum value of RPU
The maximum value of RPU is determined by the following factors.
(1) SDA rise time to be determined by the capacitance (CBUS) of bus line and RPU of SDA should be tR or lower.
Furthermore, AC timing should be satisfied even when SDA rise time is slow.
(2) The bus. electric potential
A to be determined by the input current leak total (IL) of device connected to bus at
output of 'H' to the SDA line and RPU should sufficiently secure the input 'H' level (VIH) of microcontroller and
EEPROM including recommended noise margin of 0.2VCC.
VCC-ILRPU-0.2 Vcc V
IH
Ex.) Vcc =3V IL=10µA VIH=0.7 Vcc
From (2)
30 [k]
3. Minimum Value of RPU
The minimum value of RPU is determined by the following factors.
(1) When IC outputs LOW, it should be satisfied that VOLMAX=0.4V and IOLMAX=3mA.
(2) VOLMAX=0.4V should secure the input 'L' level (VIL) of microcontroller and EEPROM
including recommended no ise margin 0.1VCC.
VOLMAX V
IL-0.1 VCC
Ex.) Vcc =3V, VOL=0.4V, IOL=3mA, microcontroller, EEPROM VIL=0.3Vcc
from (1)
867 []
And VOL=0.4 [V]
V
IL=0.3×3
=0.9 [V]
Therefore, the condition (2) is satisfied.
4. Pull-up Resistance Of SCL Terminal
When SCL control is made at the CMOS output port, there is no need for a pull up resistor. But when there is a time
where SCL be comes 'Hi-Z', add a pull up resistor. As for the pull up resistor value, one of several k to several ten k
is recommended in considerat ion of drive performance of output port of microcontroller.
R
PU 0.8VccVIH
IL
RPU 0.8×30.7×3
10×10-6
Figure 44. I/O Circuit Diagram
Microcontroller
RPU A SDA terminal
IL IL
Bus line
Capacity
CBUS
BR24TXX
R
PU
Vcc-VOL
R
PU
IOL
VccVOL
IOL
RPU 30.4
3×103
Datasheet
19/33
BR24T02-W
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31.May.2013 Rev.003
Cautions on Microcontrol ler Connection
1. RS
In I2C BUS, it is recommended that SDA port is of open drai n input/output. However, when using CMOS input / output of
tri state to SDA port, insert a series resistance RS bet we en the pull up resistor RPU and the SDA terminal of EEPROM.
This is to control over current that may occur when PMOS of the microcont roller and NMO S of EEPROM are turned ON
simultaneously. RS also plays the role of protecting the SDA terminal again st surge. Therefore, even when SDA port is
open drain input/output, RS can be us ed.
2. Maximum Value of RS
The maximum value of RS is determined by the following relations.
(1) SDA rise time to be determined by the capacitance (CBUS) of bus line and RPU of SDA should be tR or lower.
Furthermore, AC timing should be satisfied even when SDA rise time is slow.
(2) The bus’ electric potential
A to be determined by RPU and RS the moment when EEPROM outputs 'L' to SDA
bus should sufficiently secure the input 'L' level (VIL) of microcontroller including recommended noise margin of
0.1VCC.
Ex.) Vcc=3V VIL=0.3Vcc VOL=0.4V RPU=20kΩ
3. Minimum Value of RS
The minimum value of RS is determined by over current at bus collision. When over current flows, noises in power
source line and instantaneous power failure of power source may occur. When allowable over current is defined as I,
the following relation must be satisfied. Determine the allowable current in consideration of the impedance of power
source line in set and so forth. Set the over current to EEPROM at 10mA or lower.
Ex.) Vcc=3V I=10mA
RPU
Microcontroller
RS
EEPROM
Figure 45. I/O Circuit Diagram Figure 46. Input / Output Collision Timing
A
CK
'L' output of EEPROM
'H' output of microcontroller
Over current flows to SDA line by 'H'
output of microcontroller and 'L'
output of EEPROM.
SCL
SDA
Figure 47. I/O Circuit Diagram
RPU
Micro controller
RS
EEPROM
IOL
A
Bus line
capac ity
CBUS
VOL
VCC
VIL
RS
+VOL+0.1VccVIL
×RPU
VILVOL0.1Vcc
1.1VccVIL
1.67 [k]
RS 0.3×30.40.1×3
1.1×30.3×3 ×20×103
Microcontroller EEPROM
'L'output
R
S
R
PU
'H' output
Over current I
Figure 48. I/O Circuit Diagram
RS 3
10×103
300 []
I
R
S Vcc
I
(VccVOL)×RS
RPU+RS
Vcc
RS
Datasheet
20/33
BR24T02-W
TSZ02201-0R2R0G100070-1-2
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31.May.2013 Rev.003
I / O Equivalent Circuit
1. Input (A0, A1, A2, SCL, WP)
2. Input / Output (SDA)
Figure 49. Input Pin Circuit Diagram
Figure 50. Input / Output Pin Circuit Diagram
Datasheet
21/33
BR24T02-W
TSZ02201-0R2R0G100070-1-2
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31.May.2013 Rev.003
Power-Up / Down Conditions
At power ON, the IC’s internal circuits may go through unstable low voltage area as the V CC rises, making the IC’s inte rnal
logic circuit not completely reset, hence, malfunction may occur. To prevent this, the IC is equipped with POR circuit and
LVCC circuit. To assure the o peration, observe the following conditions at power ON.
1. Set SDA = 'H' and SCL ='L' or 'H’
2. Start power source so as to satisfy the recommended conditions of tR, tOFF, and Vbot for operating POR circuit.
tOFF
tR
Vbot
0
VCC
3. Set SDA and SCL so as not to become 'Hi-Z'.
When the above conditions 1 and 2 cannot be observed, take the following countermeasures.
(1) In the case when the above condition 1 c annot be observed such that SDA becomes 'L' at power ON.
Control SCL and SDA as shown below, to make SCL a nd SDA, ' H' and 'H'.
(2) In the case when the above condition 2 c annot be observed.
After power source becomes stable, execute software reset (Page 16).
(3) In the case when the above conditions 1 and 2 cannot be observed.
Carry out (1), and then carry out (2).
Low Voltage Malfunction Prev ention Function
LVCC circuit prevents data rewrite operation at low power, and pr events write error. At LVCC voltage (Typ =1.2V) or belo w,
data rewrite is prevented.
Noise Countermeasures
1. Bypass Capacitor
When noise or surge gets in the power source line, malfunct ion may occur, therefore, it is recommende d to connect a
bypass capac itor (0.1µF) between IC VCC and GND pins. Connect the capacitor as close to IC as possible. In addition,
it is also recommended to connect a bypass capacitor between board’s VCC and GND.
Recommended conditions of tR, tOFF,Vbot
tR t
OFF V
bot
10ms or below 10ms or larger 0.3V or below
100ms or below 10ms or larger 0.2V or below
Figure 51. Rise Waveform Diagram
Figure 52. When SCL= 'H' and SDA= ' L' Figure 53. When SCL= ' L' and SDA='L'
tLOW
tSU:DAT
tDH
A
fter Vcc becomes stable
SCL
VCC
SDA
tSU:DAT
A
fter Vcc becomes stable
Datasheet
22/33
BR24T02-W
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31.May.2013 Rev.003
Operational Notes
1. Described numeric values and data are design representative values onl y, and the va lues are not guaranteed.
2. We be lieve that the applic ation circuit examples in this document are recommenda ble. However, i n actual use, confirm
characteristics further sufficiently. If changing the fixed number of external parts is desired, make your decision with
sufficient margin in consideration of static characteristics, transient characteristics, and fluctuations of external parts
and our LSI.
3. Absolute maximum ratings
If the absolute maximum ratings such as supply voltage, operating temperature range, and so on are exceeded, LSI
may be destroyed. Do not supply voltage or subject the IC to temperatures exceeding the absolute maximum ratings.
In the case of fear of exceeding the absolute maximum ratings, take physical safety countermeasures such as addi ng
fuses, and see to it that conditions exceeding the absolute maximum ratings should not be supplied to the LSI.
4. GND electric potential
Set the voltage of GND terminal lowest at any operating condition. Make sure that each terminal voltage is not lower
than that of GND terminal.
5. Thermal design
Use a thermal design that allo ws for a sufficient margin by taking into account the p ermissible power dissipation (Pd) in
actual operating conditions.
6. Short between pins and mounti ng errors
Be careful when mounting the IC on printed circuit boards. The IC may be damaged if it is mounted in a wrong
orientation or if pins are shorted together. Short circuit ma y be caus ed by conductive particles caught between the pins.
7. Operating the IC in the presence of strong electromagnetic field may cause malfunction, therefore, evaluate design
sufficiently.
Datasheet
23/33
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31.May.2013 Rev.003
Part Numbering
B R 2 4 T 0 2 x x x - W x x
BUS Type
24I2C
Operating Temperature/
Power Source Voltage
-40 to +85/
1.6V to 5.5V
Capacity
02=2K
Package
Blank :DIP-T8
F :SOP8
FJ :SOP-J8
FV : SSOP-B8
FVT : TSSOP-B8
FVJ : TSSOP-B8J
FVM : MSOP8
NUX : VSON008X2030
Double Cell
Packaging and Fo rming Specification
E2 : EMBOSSED tape and reel
(SOP8,SOP-J8, SSOP-B8,TSSOP-B8, TSSOP-B8J)
TR : Embossed tape and reel
(MSOP8, VSON008X2030)
None : Tube
(DIP-T8)
Datasheet
24/33
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31.May.2013 Rev.003
Physical Dimensions Tape and Reel Information
Order quantity needs to be multiple of the minimum quantity.
<Tape and Reel information>
TubeContainer
Quantity
Direction of feed 2000pcs
Direction of products is fixed in a container tube
(Unit : mm)
DIP-T8
0°−15°
7.62
0.3±0.1
9.3±0.3
6.5±0.3
85
14
0.51Min.
3.4±0.3
3.2±0.2
2.54 0.5±0.1
Datasheet
25/33
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31.May.2013 Rev.003
Order quantity needs to be multiple of the minimum quantity.
<Tape and Reel information>
Embossed carrier tapeTape
Quantity
Direction
of feed
The direction is the 1pin of product is at the upper left when you hold
reel on the left hand and you pull out the tape on the right hand
2500pcs
E2
()
Direction of feed
Reel 1pin
(Unit : mm)
SOP8
0.9±0.15
0.3MIN
4
°
+
6
°
4
°
0.17 +0.1
-
0.05
0.595
6
43
8
2
5
1
7
5.0±0.2
6.2±0.3
4.4±0.2
(MAX 5.35 include BURR)
1.27
0.11
0.42±0.1
1.5±0.1
S
0.1 S
Datasheet
26/33
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TSZ2211115001
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31.May.2013 Rev.003
Order quantity needs to be multiple of the minimum quantity.
<Tape and Reel information>
Embossed carrier tapeTape
Quantity
Direction
of feed
The direction is the 1pin of product is at the upper left when you hold
reel on the left hand and you pull out the tape on the right hand
2500pcs
E2
()
Direction of feed
Reel 1pin
(Unit : mm)
SOP-J8
4°+6°
4°
0.2±0.1
0.45MIN
234
5678
1
4.9±0.2
0.545
3.9±0.2
6.0±0.3
(MAX 5.25 include BURR)
0.42±0.1
1.27
0.175
1.375±0.1
0.1 S
S
Datasheet
27/33
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31.May.2013 Rev.003
Order quantity needs to be multiple of the minimum quantity.
<Tape and Reel information>
Embossed carrier tapeTape
Quantity
Direction
of feed
The direction is the 1pin of product is at the upper left when you hold
reel on the left hand and you pull out the tape on the right hand
2500pcs
E2
()
Direction of feed
Reel 1pin
(Unit : mm)
SSOP-B8
0.08
M
0.3MIN
0.65
(0.52)
3.0±0.2
0.15±0.1
(MAX 3.35 include BURR)
S
S
0.1
1234
5678
0.22
6.4±0.3
4.4±0.2
+0.06
0.04
0.1
1.15±0.1
Datasheet
28/33
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TSZ2211115001
www.rohm.com
31.May.2013 Rev.003
Direction of feed
Reel
Order quantity needs to be multiple of the minimum quantity.
<Tape and Reel information>
Embossed carrier tapeTape
Quantity
Direction
of feed The direction is the 1pin of product is at the upper left when you hold
reel on the left hand and you pull out the tape on the right hand
3000pcs
E2
()
1pin
(Unit : mm)
TSSOP-B8
0.08 S
0.08 M
4 ± 4
234
8765
1
1.0±0.05
1PIN MARK
0.525
0.245+0.05
0.04
0.65
0.145+0.05
0.03
0.1±0.05
1.2MAX
3.0±0.1
4.4±0.1
6.4±0.2
0.5±0.15
1.0±0.2
(MAX 3.35 include BURR)
S
Datasheet
29/33
BR24T02-W
TSZ02201-0R2R0G100070-1-2
©2013 ROHM Co., Ltd. All rights reserved.
TSZ2211115001
www.rohm.com
31.May.2013 Rev.003
Direction of feed
Reel
Order quantity needs to be multiple of the minimum quantity.
<Tape and Reel information>
Embossed carrier tapeTape
Quantity
Direction
of feed The direction is the 1pin of product is at the upper left when you hold
reel on the left hand and you pull out the tape on the right hand
2500pcs
E2
()
1pin
(Unit : mm)
TSSOP-B8J
0.08 M
0.08 S
S
4 ± 4
(MAX 3.35 include BURR)
578
1234
6
3.0±0.1
1PIN MARK
0.95±0.2
0.65
4.9±0.2
3.0±0.1
0.45±0.15
0.85±0.05
0.145
0.1±0.05
0.32
0.525
1.1MAX
+0.05
0.03
+0.05
0.04
Datasheet
30/33
BR24T02-W
TSZ02201-0R2R0G100070-1-2
©2013 ROHM Co., Ltd. All rights reserved.
TSZ2211115001
www.rohm.com
31.May.2013 Rev.003
Direction of feed
Reel
Order quantity needs to be multiple of the minimum quantity.
<Tape and Reel information>
Embossed carrier tapeTape
Quantity
Direction
of feed The direction is the 1pin of product is at the upper right when you hold
reel on the left hand and you pull out the tape on the right hand
3000pcs
TR
()
1pin
(Unit : mm)
MSOP8
0.08 S
S
4.0±0.2
8
3
2.8±0.1
1
6
2.9±0.1
0.475
4
57
(MAX 3.25 include BURR)
2
1PIN MARK
0.9MAX
0.75±0.05
0.65
0.08±0.05
0.22 +0.05
0.04
0.6±0.2
0.29±0.15
0.145 +0.05
0.03
4°
+6°
4°
Datasheet
31/33
BR24T02-W
TSZ02201-0R2R0G100070-1-2
©2013 ROHM Co., Ltd. All rights reserved.
TSZ2211115001
www.rohm.com
31.May.2013 Rev.003
Order quantity needs to be multiple of the minimum quantity.
<Tape and Reel information>
Embossed carrier tapeTape
Quantity
Direction
of feed
The direction is the 1pin of product is at the upper right when you hold
reel on the left hand and you pull out the tape on the right hand
4000pcs
TR
()
Direction of feed
Reel 1pin
(Unit : mm)
VSON008X2030
5
1
8
4
1.4±0.1
0.25
1.5±0.1
0.5
0.3±0.1
0.25 +0.05
0.04
C0.25
0.6MAX
(0.12)
0.02+0.03
0.02 3.0±0.1
2.0±0.1
1PIN MARK
0.08 S
S
Datasheet
32/33
BR24T02-W
TSZ02201-0R2R0G100070-1-2
©2013 ROHM Co., Ltd. All rights reserved.
TSZ2211115001
www.rohm.com
31.May.2013 Rev.003
Marking Diagrams (TOP VIEW)
DIP-T8 (TOP VIEW)
BR24T02
Part Number Marking
LOT Numbe
r
SOP8 (TOP VIEW) Part Number Marking
LOT Number
1PIN MARK
SOP-J8 (TOP VIEW) Part Number Marking
LOT Number
1PIN MARK
TSSOP-B8 (TOP VIEW)
Part Number Marking
LOT Number
1PIN MARK
TSSOP-B8J (TOP VIEW) Part Number Marking
LOT Numbe
r
1PIN MARK
SSOP-B8 (TOP VIEW) Part Number Marking
LOT Number
1PIN MARK
VSON008X2030 (TOP VIEW) Part Number Marking
LOT Numbe
r
1PIN MARK
MSOP8 (TOP VIEW) Part Number Marking
LOT Number
1PIN MARK
T 0 2
T 0 2 T 0 2
T 0 2
T 0 2
T 0 2 T 0 2
Datasheet
33/33
BR24T02-W
TSZ02201-0R2R0G100070-1-2
©2013 ROHM Co., Ltd. All rights reserved.
TSZ2211115001
www.rohm.com
31.May.2013 Rev.003
Revision History
Date Revision Changes
18.Mar.2012 001 New Release
25.Feb.2013 002
Update some English words, sentences’ descriptions, grammar and
formatting.
Add tF2 in Serial Input / Output Timing
31.May.2013 003
P1 Change format of package line-up table.
P.2 Add VESD in Absolute Maximum Ratings
P.4 Add directions in Pin Descriptions
Datasheet
Datasheet
Notice - Rev.004
© 2013 ROHM Co., Ltd. All rights reserved.
Notice
General Precaution
1) Before you use our Products, you are requested to carefully read this document and fully understand its contents.
ROHM shall not be in any way responsible or liable for failure, malfunction or accident arising from the use of any
ROHM’s Products against warning, caution or note contained in this document.
2) All information contained in this document is current as of the issuing date and subject to change without any prior
notice. Before purchasing or using ROHM’s Products, please confirm the latest information with a ROHM sales
representative.
Precaution on using ROHM Products
1) Our Products are designed an d manufactured for applicat io n in ordinar y electronic eq uip ments (such as AV equipment ,
OA equipment, telecommunication equipment, home electronic appliances, amusement equipment, etc.). If you
intend to use our Products in devices requiring extremely high reliability (such as medical equipment, transport
equipment, traffic equipment, aircraft/spacecraft, nuclear power controllers, fuel controllers, car equipment including car
accessories, safety devices, etc.) and whose malfunction or failure may cause loss of human life, bodily injury or
serious damage to property (“Specific Applications”), please consult with the ROHM sales representative in advance.
Unless otherwise agreed in writing by ROHM in advance, ROHM shall not be in any way responsible or liable for any
damages, expenses or losses incurred b y you or third parti es arising from the use of an y ROHM’s Prod ucts for Specific
Applications.
2) ROHM designs and manufactures its Products subject to strict quality control system. However, semiconductor
products can fail or malfunction at a certain rate. Please be sure to implement, at your own responsibilities, adequate
safety measures including but not limited to fail-safe d esign against the physical injur y, damage to any property, which
a failure or malfunction of our Products may cause. T he following are examples of safety measures:
[a] Installation of protection circuits or other protective devices to improve system safety
[b] Installation of redundant circuits to reduce the impact of single or multiple circuit failure
3) Our Products are designed and manufactured for use under standard conditions and not under any special or
extraordinary environments or conditions, as exemplified below. Accordingly, ROHM shall not be in any way
responsible or liable for any damages, expenses or losses arising from the use of any ROHM’s Products under any
special or extraordinary environments or conditions. If you intend to use our Products under any special or
extraordinary environments or conditions (as exemplified below), your independent verification and confirmation of
product performance, reliability, etc, prior to use, must be necessary:
[a] Use of our Products in any types of liquid, including water, oils, chemicals, and organic solvents
[b] Use of our Products outdoors or in places where the Products are exposed to direct sunlight or dust
[c] Use of our Products in places where the Products are exposed to sea wind or corrosive gases, including Cl2,
H2S, NH3, SO2, and NO2
[d] Use of our Products in places where the Products are exposed to static electricity or electromagnetic waves
[e] Use of our Products in proximity to heat-produci ng comp onents, plastic cords, or other flammable items
[f] Sealing or coating our Products with resin or other coating materials
[g] Use of our Products without cleaning residue of flu x (even if you use no-clean type fluxes, cleaning residue of
flux is recommended); or Washing our Products by using water or water-soluble cleaning agents for cleaning
residue after soldering
[h] Use of the Products in places subject to dew condensation
4) The Products are not subject to radiation-proof design.
5) Please verify and confirm cha racteristics of the final or mounted products in using the Products.
6) In particular, if a transient load (a large amount of load applied in a short period of time, such as pulse) is applied,
confirmation of performance characteristics after on-board mounting is strongly recommended. Avoid applying power
exceeding nor mal rated power; exceeding the power rating under steady-state loading condition may negatively affect
product performance and reliability.
7) De-rate Power Dissipation (P d) dependi ng on Ambient temp erature (T a). When used i n sealed area, co nfirm the actual
ambient temperature.
8) Confirm that operation temperature is within the specified ra nge described in the product specification.
9) ROHM shall n ot be in any way responsible or liable for failure induce d under deviant condition from what is defined in
this document.
Datasheet
Datasheet
Notice - Rev.004
© 2013 ROHM Co., Ltd. All rights reserved.
Precaution for Mounting / Circuit board design
1) When a highly active halogenous (chlor ine, bromine, etc.) flux is used, the residue of flux ma y negatively affect product
performance and reliability.
2) In principle, the reflow soldering method must be used; if flow soldering method is preferred, please consult with the
ROHM representative in advance.
For details, please refer to ROHM Mounting specificati on
Precautions Regarding Application Examples and External Circuits
1) If change is made to the constant of an external circuit, please allow a sufficient margin considering variations of the
characteristics of the Products and external components, including transient characteristics, as well as static
characteristics.
2) You agree that application notes, reference designs, and associated data and information contained in this document
are presented only as guidance for Products use. Therefore, in case you use such information, you are solely
responsible for it and you must exercise you r own indepen dent verificatio n and judgmen t in the use of such information
contained in this document. ROHM shall not be in an y way responsible or liable for any damag es, expenses or losses
incurred by you or third parties arising from the use of such information.
Precaution for Electrostatic
This Product is electrostatic sensitive product, which may be damaged due to electrostatic discharge. Please take proper
caution in your manufacturing process and storage so that voltage exceeding the Products maximum rating will not be
applied to Products. Please t ake special care under dry con dition (e.g. Grounding of human body / equipment / sol der iron,
isolation from charged objects, setting of Ionizer, friction prevention and temperature / humidity control).
Precaution for Storage / Transportation
1) Product performance and soldered conn ections may deteriorate if the Products are stored in the places where:
[a] the Products are exposed to sea winds or corrosive g ases, i nclud ing Cl2, H2S, NH3, SO2, and NO2
[b] the temperature or humidity exceeds those recommende d b y ROHM
[c] the Products are exposed to direct sunshine or condensation
[d] the Products are exposed to high Electrostatic
2) Even under ROHM recommended storage condition, solderability of products out of recommende d storage time period
may be degraded. It is strongly recommended to confirm solderability before using Products of which storage time is
exceeding the recommen de d storage time period.
3) Store / transport cartons in the correct direction, which is indicated on a carton with a symbol. Otherwise bent leads
may occur due to excessive stress applied when dropping of a carton.
4) Use Products within the specified time after opening a hum idity barrier bag. Baking is required before using Products of
which storage time is exceeding the recommended storage time period.
Precaution for Product Label
QR code printed on ROHM Products label is for ROHM’s internal use only.
Precaution for Disposition
When disposing Products pl ease dispose them properly using an authorized industry waste company.
Precaution for Foreign Exchange and Fo reign Trade act
Since our Products might fall under controlled goods prescribed by the applicable foreign exchange and foreign trade act,
please consult with ROHM representative in case of export.
Precaution Regarding Intellectual Pro perty Rights
1) All information and data including but not limited to application example contained in this document is for reference
only. ROHM does not warrant that foregoi ng information or data will not infringe any int ellectual property rights or any
other rights of any third party regarding such information or data. ROHM shall not be in any way responsible or liable
for infringement of any intellectual property rights or other damages arising from use of such information or data.:
2) No license, expressly or implied, is grante d hereby under any intellectual property rights or other rights of ROHM or any
third parties with respect to the information contained in this document.
Datasheet
Datasheet
Notice - Rev.004
© 2013 ROHM Co., Ltd. All rights reserved.
Other Precaution
1) The information contained in this document is provided on an “as is” basis and ROHM does not warrant that all
information contained in this document is accurate and/or error-free. ROHM shall not be in any way responsible or
liable for any damages, expenses or losses incurred by you or third parties resulting from inaccuracy or errors of or
concerning such information.
2) This document may not be reprinted or reproduced, in whole or in part, without prior written consent of ROHM.
3) The Products may not be disassembled, converted, modified, reproduced or otherwise changed without prior written
consent of ROHM.
4) In no event shall you use in any way whatsoever the Products and the related technical information contained in the
Products or this document for any military purposes, including b ut not limited to, the development of m ass-destruction
weapons.
5) The proper names of companies or products described in this document are trademarks or registered trademarks of
ROHM, its affiliated compani es or third parties.