REVISIONS
LTR DESCRIPTION DATE (YR-MO-DA) APPROVED
A
Boilerplate update, part of 5 year review. ksr 06-10-26 Raymond Monnin
THE ORIGINAL FIRST SHEET OF THIS DRAWING HAS BEEN REPLACED.
REV
SHEET
REV
SHEET
REV STATUS REV A A A A A A A A A A A A A
OF SHEETS SHEET 1 2 3 4 5 6 7 8 9 10 11 12 13
PMIC N/A PREPARED BY
Kenneth S. Rice
DEFENSE SUPPLY CENTER COLUMBUS
STANDARD
MICROCIRCUIT
DRAWING
CHECKED BY
Charles Reusing
COLUMBUS, OHIO 43218-3990
http://www.dscc.dla.mil
THIS DRAWING IS AVAILABLE
FOR USE BY ALL
DEPARTMENTS
APPROVED BY
Michael A. Frye
AND AGENCIES OF THE
DEPARTMENT OF DEFENSE
DRAWING APPROVAL DATE
89-10-16
MICROCIRCUIT, MEMORY, DIGITAL,
CMOS, 2K X 8 STATIC RAM (SRAM),
MONOLITHIC SILICON
AMSC N/A
REVISION LEVEL
A
SIZE
A
CAGE CODE
67268
5962-89690
SHEET
1 OF
13
DSCC FORM 2233
APR 97 5962-E009-07
.
STANDARD
MICROCIRCUIT DRAWING
SIZE
A
5962-89690
DEFENSE SUPPLY CENTER COLUMBUS
COLUMBUS, OHIO 43218-3990
REVISION LEVEL
A
SHEET 2
DSCC FORM 2234
APR 97
1. SCOPE
1.1 Scope. This drawing describes device requirements for MIL-STD-883 compliant, non-JAN class level B microcircuits in
accordance with MIL-PRF-38535, appendix A.
1.2 Part or Identifying Number (PIN). The complete PIN is as shown in the following example:
5962-89690 01 J A
Drawing number Device type
(see 1.2.1)
Case outline
(see 1.2.2)
Lead finish
(see 1.2.3)
1.2.1 Device type(s). The device type(s) identify the circuit function as follows:
Device type Generic number Circuit function Acess time
01 1/ 2K X 8 CMOS SRAM 25 ns
02 1/ 2K X 8 CMOS SRAM 20 ns
1.2.2 Case outline(s). The case outline(s) are as designated in MIL-STD-1835 and as follows:
Outline letter Descriptive designator Terminals Package style
J GDIP1-T24 or CDIP2-T24 24 dual-in-line package
K GDFP2-F24 or CDFP3-F24 24 flat package
L GDIP3-T24 or CDIP4-T24 24 dual-in-line package
X CQCC1-N32 32 rectangular chip carrier package
Y See Figure 1 24 rectangular chip carrier package
Z CQCC3-N28 28 rectangular chip carrier package
3 CQCC1-N28 28 rectangular chip carrier package
1.2.3 Lead finish. The lead finish is as specified in MIL-PRF-38535, appendix A.
1.3 Absolute maximum ratings. 2/
Supply voltage range (VCC) ------------------------------------ -0.5 V dc to 7 V dc
Input voltage range 2/ ------------------------------------------ 0.5 V to VCC +0.5 V
Output voltage range in high impedance state ---------- -0.5 V dc to 7 V dc
Output current----------------------------------------------------- 20 mA
Storage temperature range------------------------------------ -65°C to +150°C
Power dissipation, (PD) ---------------------------------------- 864 mW
Lead temperature (soldering, 10 seconds) ---------------- +275°C
Junction temperature (TJ) ------------------------------------- +175°C
Thermal resistance, junction-to-case (ΘJC):.
Cases J, K, L, X, Z, and 3------------------------------ See MIL-STD-1835
Case Y ------------------------------------------------------ 20°C/W
1.4 Recommended operating conditions.
Supply voltage range (VCC) ------------------------------------ 4.5 V dc minimum to 5.5 V dc maximum
High level Input voltage range (VIH) ------------------------- 2.2 V dc minimum to VCC + 0.5 V dc maximum
Low level Input voltage range (VIL) 3/ ---------------------- -0.5 V dc minimum to 0.8 V dc maximum
Case operating temperature range (TC) -------------------- -55°C to +125°C
1/ Generic numbers are listed on the Standardized Military Drawing Source Approval Bulletin at the end of this document and
will also be listed in MIL-HDBK-103.
2/ All voltages are with respect to GND.
3/ VIL (minimum) of -3 V dc for short pulse durations of 20 ns or less. Prolonged operation at VIL levels below -1 V dc will
result in excessive currents that may damage the device.
STANDARD
MICROCIRCUIT DRAWING
SIZE
A
5962-89690
DEFENSE SUPPLY CENTER COLUMBUS
COLUMBUS, OHIO 43218-3990
REVISION LEVEL
A
SHEET 3
DSCC FORM 2234
APR 97
2. APPLICABLE DOCUMENTS
2.1 Government specification, standards, and handbooks. The following specification, standards, and handbooks form a
part of this drawing to the extent specified herein. Unless otherwise specified, the issues of these documents are those cited in
the solicitation or contract.
DEPARTMENT OF DEFENSE SPECIFICATION
MIL-PRF-38535 - Integrated Circuits, Manufacturing, General Specification for.
DEPARTMENT OF DEFENSE STANDARDS
MIL-STD-883 - Test Method Standard Microcircuits.
MIL-STD-1835 - Interface Standard Electronic Component Case Outlines.
DEPARTMENT OF DEFENSE HANDBOOKS
MIL-HDBK-103 - List of Standard Microcircuit Drawings.
MIL-HDBK-780 - Standard Microcircuit Drawings.
(Copies of these documents are available online at http://assist.daps.dla.mil/quicksearch/ or http://assist.daps.dla.mil or from
the Standardization Document Order Desk, 700 Robbins Avenue, Building 4D, Philadelphia, PA 19111-5094.)
2.2 Order of precedence. In the event of a conflict between the text of this drawing and the references cited herein, the text
of this drawing takes precedence. Nothing in this document, however, supersedes applicable laws and regulations unless a
specific exemption has been obtained.
3. REQUIREMENTS
3.1 Item requirements. The individual item requirements shall be in accordance with MIL-PRF-38535, appendix A for non-
JAN class level B devices and as specified herein. Product built to this drawing that is produced by a Qualified Manufacturer
Listing (QML) certified and qualified manufacturer or a manufacturer who has been granted transitional certification to MIL-
PRF-38535 may be processed as QML product in accordance with the manufacturers approved program plan and qualifying
activity approval in accordance with MIL-PRF-38535. This QML flow as documented in the Quality Management (QM) plan
may make modifications to the requirements herein. These modifications shall not affect form, fit, or function of the device.
These modifications shall not affect the PIN as described herein. A "Q" or "QML" certification mark in accordance with MIL-
PRF-38535 is required to identify when the QML flow option is used.
3.2 Design, construction, and physical dimensions. The design, construction, and physical dimensions shall be as
specified in MIL-PRF-38535, appendix A and herein.
3.2.1 Terminal connections. The terminal connections shall be as specified on figure 2.
3.2.2 Truth table. The truth table shall be as specified on figure 3.
3.2.3 Case outlines. The case outlines shall be in accordance with 1.2.2 herein and figure 1.
3.2.4 Load circuit and switching waveforms. The load circuit and switching waveforms shall be as specified on figure 4.
3.2.5 Die overcoat. Polyimide and silicone coatings are allowable as an overcoat on the die for alpha particle protection
only. Each coated microcircuit inspection lot (see inspection lot as defined in MIL-PRF-38535) shall be subjected to and pass
the internal moisture content test at 5000 ppm (see method 1018 of MIL-STD-883). The frequency of the internal water vapor
testing shall not be decreased unless approved by the preparing activity for class M. The TRB will ascertain the requirements
as provided by MIL-PRF-38535 for classes Q and V. Samples may be pulled any time after seal.
3.3 Electrical performance characteristics. Unless otherwise specified herein, the electrical performance characteristics
are as specified in table I and shall apply over the full case operating temperature range.
3.4 Electrical test requirements. The electrical test requirements shall be the subgroups specified in table II. The electrical
tests for each subgroup are described in table I.
STANDARD
MICROCIRCUIT DRAWING
SIZE
A
5962-89690
DEFENSE SUPPLY CENTER COLUMBUS
COLUMBUS, OHIO 43218-3990
REVISION LEVEL
A
SHEET 4
DSCC FORM 2234
APR 97
TABLE I. Electrical performance characteristics.
│ │ │ │ │ Limits │
Test │Symbol │ Conditions │Group A │ Device │ │ Unit
│ │ -55°C < TC < +125°C │subgroups │ type │ Min │ Max │
│ │ 4.5 V < VCC < 5.5 V │ │ │ │ │
│ │ VSS = 0 V │ │ │ │ │
│ │ unless otherwise specified │ │ │ │ │
│ │ 1/ 2/ 3/ 4/ │ │ │ │ │
│ │ │ │ │ │ │
│ │ │ │ │ │ │
Operating supply current │ICC1 │tAVAV = tAVAV (minimum), │ 1,2,3 │ 01 │ │ 135 │ mA
│ │VCC = 5.5 V, CE = VIL, │ │ │ │ │
│ │all other inputs at VIL │ │ 02 │ │ 150 │
│ │ │ │ │ │ │
│ │ │ │ │ │ │
Standby power supply │ICC2 │CE ≥ VIH, all other inputs │ 1,2,3 │ 01 │ │ 45 │ mA
current TTL │ │ ≤ VIL or ≥ VIH, VCC = 5.5 V, │ │ │ │ │
│ │ f = 0 MHz │ │ 02 │ │ 50 │
│ │ │ │ │ │ │
Standby power supply │ICC3 │CE ≥ (VCC - 0.2 V), f = 0 Mhz, │ 1,2,3 │ All │ │ 20 │ mA
current CMOS │ │VCC = 5.5 V, all other inputs │ │ │ │ │
│ │ < 0.2 V or > (VCC -0.2 V) │ │ │ │ │
│ │ │ │ │ │ │
│ │ │ │ │ │ │
Input leakage current, │IILK │VCC = 5.5 V, │ 1,2,3 │ All │ -10 │ 10 │ µA
any input │ │VIN = 0 V to 5.5 V, │ │ │ │ │
│ │ │ │ │ │ │
│ │ │ │ │ │ │
Off-state output leakage │IOLK │VCC = 5.5 V │ 1,2,3 │ All │ -10 │10 │ µA
current │ │VIN = 0 V to 5.5 V, │ │ │ │ │
│ │ │ │ │ │ │
│ │ │ │ │ │ │
Output high voltage │VOH │ IOUT = -4.0 mA, VCC = 4.5 V, │ 1,2,3 │ All │ 2.4 │ │ V
│ │ VIL = 0.8 V, VIH = 2.2 V │ │ │ │ │
│ │ │ │ │ │ │
│ │ │ │ │ │ │
Output low voltage │VOL │ IOUT = 8 mA, VCC = 4.5 V, │ 1,2,3 │ All │ │ 0.4 │ V
│ │ VIL = 0.8 V, VIH = 2.2 V │ │ │ │ │
│ │ │ │ │ │ │
│ │ │ │ │ │ │
Input capacitance 5/ │CIN │VIN = 0 V, │ 4 │ All │ │ 8 │ pF
│ │ f = 1.0 Mhz, TA = +25°C, │ │ │ │ │
│ │see 4.3.1c │ │ │ │ │
│ │ │ │ │ │ │
Output capacitance 5/ │COUT │VOUT= 0 V, │ 4 │ All │ │ 8 │ pF
│ │ f = 1 Mhz, TA = +25°C, │ │ │ │ │
│ │see 4.3.1c │ │ │ │ │
│ │ │ │ │ │ │
Read cycle time │tAVAV │ │ 9, 10 11 │ 01 │ 25 │ │ ns
│ │ │ │ │ │ │
│ │ │ │ 02 │ 20 │ │
See footnotes at end of table.
STANDARD
MICROCIRCUIT DRAWING
SIZE
A
5962-89690
DEFENSE SUPPLY CENTER COLUMBUS
COLUMBUS, OHIO 43218-3990
REVISION LEVEL
A
SHEET 5
DSCC FORM 2234
APR 97
TABLE I. Electrical performance characteristics - Continued.
│ │ │ │ │ Limits │
Test │ Symbol │ Conditions │Group A │ Device │ │ Unit
│ │ -55°C < TC < +125°C │subgroups │ type │ Min │ Max │
│ │ 4.5 V < VCC < 5.5 V │ │ │ │ │
│ │ VSS = 0 V │ │ │ │ │
│ │ unless otherwise specified │ │ │ │ │
│ │ 1/ 2/ 3/ 4/ │ │ │ │ │
│ │ │ │ │ │ │
│ │ │ │ │ │ │
Address access time │tAVQV │ │ 9, 10, 11 │ 01 │ │ 25 │ ns
│ │ │ │ 02 │ │ 20 │
│ │ │ │ │ │ │
│ │ │ │ │ │ │
Output hold after address │tAVQX │ │ 9, 10, 11 │ 01 │ 0 │ │ ns
change │ │ │ │ 02 │ │ │
│ │ │ │ │ 0 │ │
│ │ │ │ │ │ │
Output enable to output │tOLQX │ │ 9, 10, 11 │ 01 │ 0 │ │ ns
active 5/ 6/ │ │ │ │ 02 │ │ │
│ │ │ │ │ 0 │ │
│ │ │ │ │ │ │
Output enable access │tOLQV │ │ 9, 10, 11 │ 01 │ │ 16 │ ns
time │ │ │ │ 02 │ │ │
│ │ │ │ │ │ 15 │
│ │ │ │ │ │ │
Chip enable to output │tELQX │ │ 9, 10, 11 │ 01 │ 0 │ │ ns
active 5/ 6/ │ │ │ │ 02 │ │ │
│ │ │ │ │ 0 │ │
│ │ │ │ │ │ │
Chip enable access time │tELQV │ │ 9, 10, 11 │ 01 │ │ 25 │ ns
│ │ │ │ 02 │ │ │
│ │ │ │ │ │ 20 │
│ │ │ │ │ │ │
Chip enable to output │tEHQZ │ │ 9, 10, 11 │ 01 │ │ 15 │ ns
in high Z 5/ 6/ │ │ │ │ 02 │ │ │
│ │ │ │ │ │ 15 │
│ │ │ │ │ │ │
Write recovery time │tWHAV │ │ 9, 10, 11 │ 01 │ 0 │ │ ns
│ │ │ │ 02 │ │ │
│ │ │ │ │ 0 │ │
│ │ │ │ │ │ │
Chip enable to end of │tELWH │ │ 9, 10, 11 │ 01 │ 20 │ │ ns
write │ │ │ │ 02 │ │ │
│ │ │ │ │ 15 │ │
│ │ │ │ │ │ │
Address valid to end of │tAVWH │ │ 9, 10, 11 │ 01 │ 20 │ │ ns
write │ │ │ │ 02 │ │ │
│ │ │ │ │ 15 │ │
│ │ │ │ │ │ │
Address to WE setup time │tAVWL │ │ 9, 10, 11 │ 01 │ 0 │ │ ns
│ │ │ │ 02 │ │ │
│ │ │ │ │ 0 │ │
│ │ │ │ │ │ │
Address to CE setup time │tAVEL │ │ 9, 10, 11 │ 01, 02 │ 0 │ │ ns
│ │ │ │ │ │ │
│ │ │ │ │ │ │
See footnotes at end of table.
STANDARD
MICROCIRCUIT DRAWING
SIZE
A
5962-89690
DEFENSE SUPPLY CENTER COLUMBUS
COLUMBUS, OHIO 43218-3990
REVISION LEVEL
A
SHEET 6
DSCC FORM 2234
APR 97
TABLE I. Electrical performance characteristics - Continued.
│ │ │ │ │ Limits │
Test │ Symbol │ Conditions │Group A │ Device │ │ Unit
│ │ -55°C < TC < +125°C │subgroups │ type │ Min │ Max │
│ │ 4.5 V < VCC < 5.5 V │ │ │ │ │
│ │ VSS = 0 V │ │ │ │ │
│ │ unless otherwise specified │ │ │ │ │
│ │ 1/ 2/ 3/ 4/ │ │ │ │ │
│ │ │ │ │ │ │
│ │ │ │ │ │ │
Output enable to output │tOHQZ │ │ 9, 10, 11 │ 01 │ │ 16 │ ns
in high Z 5/ 6/ │ │ │ │ 02 │ │ 15 │
│ │ │ │ │ │ │
│ │ │ │ │ │ │
Write enable pulse width │tWLWH │ │ 9, 10, 11 │ 01 │ 20 │ │ ns
│ │ │ │ 02 │ │ │
│ │ │ │ │ 15 │ │
│ │ │ │ │ │ │
Data setup to end of write │tDVWH │ │ 9, 10, 11 │ 01 │ 15 │ │ ns
│ │ │ │ 02 │ │ │
│ │ │ │ │ 12 │ │
│ │ │ │ │ │ │
Data hold after end of write│tWHDX │ │ 9, 10, 11 │ 01 │ 0 │ │ ns
│ │ │ │ 02 │ │ │
│ │ │ │ │ 0 │ │
│ │ │ │ │ │ │
Chip enable pulse width │tELEH │ │ 9, 10, 11 │ 01 │ 20 │ │ ns
during write │ │ │ │ 02 │ │ │
│ │ │ │ │ 15 │ │
│ │ │ │ │ │ │
Write enable pulse setup │tWLEH │ │ 9, 10, 11 │ 01 │ 20 │ │ ns
time │ │ │ │ 02 │ │ │
│ │ │ │ │ 15 │ │
│ │ │ │ │ │ │
Write enable to output │tWLQZ │ │ 9, 10, 11 │ 01 │ │ 15 │ ns
in high Z 5/ 6/ │ │ │ │ 02 │ │ │
│ │ │ │ │ │ 15 │
1/ All voltages referenced to VSS.
2/ Negative undershoots to a minimum of -0.3 V are allowed with a maximum of 50 ns pulse width.
3/ AC measurements assume transition time < 5 ns and input level are from VSS to 3.0 V. Output load is specified on
figure 4. Reference timing levels are 1.5 V.
4/ For timing waveforms, see figure 4.
5/ Tested initially and after any design and or process changes which may affect this parameters, and therefore shall be
guaranteed to the limits specified in table I. Transition measured ±500 mV from steady-state value.
6/ This parameter measured ±500 mV from steady-state output voltage. Load capacitance is 5.0 pF, see figure 4.
3.5 Marking. Marking shall be in accordance with MIL-PRF-38535, appendix A. The part shall be marked with the PIN
listed in 1.2 herein. In addition, the manufacturer's PIN may also be marked. For packages where marking of the entire SMD
PIN number is not feasible due to space limitations, the manufacturer has the option of not marking the "5962-" on the device.
3.5.1 Certification/compliance mark. A compliance indicator “C” shall be marked on all non-JAN devices built in
compliance to MIL-PRF-38535, appendix A. The compliance indicator “C” shall be replaced with a "Q" or "QML" certification
mark in accordance with MIL-PRF-38535 to identify when the QML flow option is used.
STANDARD
MICROCIRCUIT DRAWING
SIZE
A
5962-89690
DEFENSE SUPPLY CENTER COLUMBUS
COLUMBUS, OHIO 43218-3990
REVISION LEVEL
A
SHEET 7
DSCC FORM 2234
APR 97
NOTES:
1. Dimensions are in inches.
2. Metric equivalents are given for general information only.
FIGURE 1. Case outline Y (24-terminal, .308" x .408" x .078"), rectangular chip carrier package.
STANDARD
MICROCIRCUIT DRAWING
SIZE
A
5962-89690
DEFENSE SUPPLY CENTER COLUMBUS
COLUMBUS, OHIO 43218-3990
REVISION LEVEL
A
SHEET 8
DSCC FORM 2234
APR 97
Device types
01and 02
Case outlines
J,K,L,Y
3, Z
X
Terminal
number
Terminal Symbol
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
A7
A6
A5
A4
A3
A2
A1
A0
I/O 0
I/O 1
I/O 2
VSS
I/O 3
I/O 4
I/O 5
I/O 6
I/O 7
CE
A10
OE
WE
A9
A8
VCC
- - -
- - -
- - -
- - -
- - -
- - -
- - -
- - -
A7
A6
A5
A4
A3
A2
NC
NC
A1
A0
I/O 1
I/O 2
I/O 3
VSS
I/O 4
I/O 5
I/O 6
I/O 7
I/O 8
CE
NC
NC
A10
OE
WE
A9
A8
VCC
- - -
- - -
- - -
- - -
NC
NC
NC
A7
A6
A5
A4
A3
A2
A1
A0
NC
I/O 0
I/O 1
I/O 2
VSS
NC
I/O 3
I/O 4
I/O 5
I/O 6
I/O 7
CE
A10
OE
WE
NC
A9
A8
NC
NC
VCC
FIGURE 2. Terminal connections.
Inputs
I/O
CE WE OE
I/O 0 - I/O 7
Mode
Power
H X X
L H L
L H H
L L X
HI - Z
Data output
HI - Z
Data input
Standby
Read
Read
Write
Standby
Active
Active
Active
FIGURE 3. Truth table.
STANDARD
MICROCIRCUIT DRAWING
SIZE
A
5962-89690
DEFENSE SUPPLY CENTER COLUMBUS
COLUMBUS, OHIO 43218-3990
REVISION LEVEL
A
SHEET 9
DSCC FORM 2234
APR 97
NOTES:
1. tr and tf ≤ 5 ns.
2. All switching characteristics and timing requirements assume test conditions as depicted in configuration (a) and
configuration (b) with timing references of 1.5 V (50% reference point) as shown in the subsequent timing diagrams.
FIGURE 4. Load circuit and switching waveforms.
STANDARD
MICROCIRCUIT DRAWING
SIZE
A
5962-89690
DEFENSE SUPPLY CENTER COLUMBUS
COLUMBUS, OHIO 43218-3990
REVISION LEVEL
A
SHEET 10
DSCC FORM 2234
APR 97
NOTE: When
WE is high, address is valid prior to or simultaneously with the high-to-low transition of CE .
FIGURE 4. Load circuit and switching waveforms - Continued.
STANDARD
MICROCIRCUIT DRAWING
SIZE
A
5962-89690
DEFENSE SUPPLY CENTER COLUMBUS
COLUMBUS, OHIO 43218-3990
REVISION LEVEL
A
SHEET 11
DSCC FORM 2234
APR 97
NOTES:
1. CE or WE must be high during address transitions.
2. The internal write time of the memory if defined by the overlap of CE low and WE low. Both signals must be low to
initiate a write, and either signal can terminate a write by going high. The data input setup and hold timing should be
referenced to the rising edge of the signal that terminates the write. Data I/O pins enter high-impedance state, as
shown when CE is held low during write.
FIGURE 4. Load circuit and switching waveforms - Continued.
STANDARD
MICROCIRCUIT DRAWING
SIZE
A
5962-89690
DEFENSE SUPPLY CENTER COLUMBUS
COLUMBUS, OHIO 43218-3990
REVISION LEVEL
A
SHEET 12
DSCC FORM 2234
APR 97
3.6 Certificate of compliance. A certificate of compliance shall be required from a manufacturer in order to be listed as an
approved source of supply in MIL-HDBK-103 (see 6.6 herein). The certificate of compliance submitted to DSCC-VA prior to
listing as an approved source of supply shall affirm that the manufacturer's product meets the requirements of MIL-PRF-
38535, appendix A and the requirements herein.
3.7 Certificate of conformance. A certificate of conformance as required in MIL-PRF-38535, appendix A shall be provided
with each lot of microcircuits delivered to this drawing.
3.8 Notification of change. Notification of change to DSCC-VA shall be required for any change that affects this drawing.
3.9 Verification and review. DSCC, DSCC's agent, and the acquiring activity retain the option to review the manufacturer's
facility and applicable required documentation. Offshore documentation shall be made available onshore at the option of the
reviewer.
4. VERIFICATION
4.1 Sampling and inspection. Sampling and inspection procedures shall be in accordance with MIL-PRF-38535,
appendix A.
4.2 Screening. Screening shall be in accordance with method 5004 of MIL-STD-883, and shall be conducted on all
devices prior to quality conformance inspection. The following additional criteria shall apply:
a. Burn-in test, method 1015 of MIL-STD-883.
(1) Test condition D. The test circuit shall be maintained by the manufacturer under document revision level control
and shall be made available to the preparing activity upon request. The test circuit shall specify the inputs, outputs,
biases, and power dissipation, as applicable, in accordance with the intent specified in method 1015 of MIL-STD-
883.
(2) TA = +125°C, minimum.
b. Interim and final electrical test parameters shall be as specified in table II herein, except interim electrical parameter
tests prior to burn-in are optional at the discretion of the manufacturer.
4.3 Quality conformance inspection. Quality conformance inspection shall be in accordance with method 5005 of MIL-
STD-883 including groups A, B, C, and D inspections. The following additional criteria shall apply.
4.3.1 Group A inspection.
a. Tests shall be as specified in table II herein.
b. Subgroups 5 and 6 in table I, method 5005 of MIL-STD-883 shall be omitted.
c. Subgroup 4 (CIN and COUT measurement) shall be measured only for the initial test and after process or design
changes which may affect capacitance. Sample size is fifteen devices with no failures and all input and output
terminals tested.
d. Subgroups 7 and 8 tests shall include verification of the truth table.
4.3.2 Groups C and D inspections.
a. End-point electrical parameters shall be as specified in table II herein.
b. Steady-state life test conditions, method 1005 of MIL-STD-883.
(1) Test condition D. The test circuit shall be maintained by the manufacturer under document revision level
control and shall be made available to the preparing activity upon request. The test circuit shall specify the
inputs, outputs, biases, and power dissipation, as applicable, in accordance with the intent specified in method
1015 of MIL-STD-883.
(2) TA = +125°C, minimum.
(3) Test duration: 1,000 hours, except as permitted by method 1005 of MIL-STD-883.
STANDARD
MICROCIRCUIT DRAWING
SIZE
A
5962-89690
DEFENSE SUPPLY CENTER COLUMBUS
COLUMBUS, OHIO 43218-3990
REVISION LEVEL
A
SHEET 13
DSCC FORM 2234
APR 97
TABLE II. Electrical test requirements. 1/ 2/ 3/
MIL-STD-883 test requirements
Subgroups
(per method
5005, table I)
Interim electrical parameters
(method 5004)
---
Final electrical test parameters
(method 5004)
1*, 2, 3, 7*, 8A, 8B,
9, 10,11
Group A test requirements
(method 5005)
1,2,3,4**,(7,8A,8B)***,
9, 10,11
Groups C and D end-point electrical
parameters (method 5005)
2, 3, 7, 8A, 8B
1/ * indicates PDA applies to subgroups 1 and 7.
2/ ** see 4.3.1c.
3/ *** see 4.3.1d.
5. PACKAGING
5.1 Packaging requirements. The requirements for packaging shall be in accordance with MIL-PRF-38535, appendix A.
6. NOTES
6.1 Intended use. Microcircuits conforming to this drawing are intended for use for Government microcircuit applications
(original equipment), design applications, and logistics purposes.
6.2 Replaceability. Microcircuits covered by this drawing will replace the same generic device covered by a contractor-
prepared specification or drawing.
6.3 Configuration control of SMD's. All proposed changes to existing SMD's will be coordinated with the users of record for
the individual documents. This coordination will be accomplished using DD Form 1692, Engineering Change Proposal.
6.4 Record of users. Military and industrial users shall inform Defense Supply Center Columbus (DSCC) when a system
application requires configuration control and the applicable SMD. DSCC will maintain a record of users and this list will be
used for coordination and distribution of changes to the drawings. Users of drawings covering microelectronics devices (FSC
5962) should contact DSCC-VA, telephone (614) 692-0544.
6.5 Comments. Comments on this drawing should be directed to DSCC-VA, Columbus, Ohio 43218-3990, or telephone
(614) 692-0547.
6.6 Approved sources of supply. Approved sources of supply are listed in MIL-HDBK-103. The vendors listed in MIL-
HDBK-103 have agreed to this drawing and a certificate of compliance (see 3.6 herein) has been submitted to and accepted
by DSCC-VA.
STANDARD MICROCIRCUIT DRAWING BULLETIN
DATE: 06-10-26
Approved sources of supply for SMD 5962-89690 are listed below for immediate acquisition information only and shall
be added to MIL-HDBK-103 and QML-38535 during the next revision. MIL-HDBK-103 and QML-38535 will be revised
to include the addition or deletion of sources. The vendors listed below have agreed to this drawing and a certificate
of compliance has been submitted to and accepted by DSCC-VA. This information bulletin is superseded by the next
dated revision of MIL-HDBK-103 and QML-38535. DSCC maintains an online database of all current sources of
supply at http://www.dscc.dla.mil/Programs/Smcr/.
Standard
microcircuit drawing
PIN 1/
Vendor
CAGE
number
Vendor
similar part
number 2/
5962-8969001JA
61772
3/
0C7V7
IDT6116SA25DB
CY6116A-25DMB
QP6116A-25DMB
5962-8969001KA
3/
3/
0C7V7
3DTT2
IDT6116SA25EB
CY7C128A-25KMB
QP7C128A-25KMB
P4C116-25FMB
5962-8969001LA
3/
3/
61772
3DTT2
3/
0C7V7
SMJ68CE16-25JDM
CY7C128A-25DMB
IDT6116SA25TDB
P4C116-25DMB
MT5C1608C-25883C
QP7C128A-25DMB
5962-8969001XA
3/
3/
3/
CY6117A-25LMB
IDT6116SA25L32B
SMJ68CE16-25FGM
5962-8969001YA
3/
3/
3DTT2
0C7V7
IDT6116SA25L24B
CY7C128A-25LMB
P4C116-25LMB
QP7C128A-25LMB
5962-89690013A
3/
3/
0C7V7
3DTT2
CY6116A-25LMB
IDT6116SA25L28B
QP6116A-25LMB
P4C116-25L28MB
5962-8969001ZA
3/
MT5C1608EC-25883C
5962-8969002JA
61772
3/
0C7V7
IDT6116SA20DB
CY6116A-20DMB
QP6116A-20DMB
5962-8969002KA
3/
3/
0C7V7
3DTT2
IDT6116SA20EB
CY7C128A-20KMB
QP7C128A-20KMB
P4C116-20FMB
5962-8969002LA
3/
61772
3DTT2
3/
0C7V7
CY7C128A-20DMB
IDT6116SA20TDB
P4C116-20DMB
MT5C1608C-20883C
QP7C128A-20DMB
See footnotes at end of table.
Page 1 of 2
STANDARD MICROCIRCUIT DRAWING BULLETIN – Continued.
Standard
microcircuit drawing
PIN 1/
Vendor
CAGE
number
Vendor
similar part
number 2/
5962-8969002XA
3/
3/
CY6117A-20LMB
IDT6116SA20L32B
5962-8969002YA
3/
3/
3DTT2
0C7V7
IDT6116SA20L24B
CY7C128A-20LMB
P4C116-20LMB
QP7C128A-20LMB
5962-8969002ZA
3/
MT5C1608EC-20883C
5962-89690023A
3/
3/
3/
0C7V7
3DTT2
CY6116A-20LMB
IDT6116SA20L28B
MT5C1608EC-20883C
QP6116A-20LMB
P4C116-20L28MB
1/ The lead finish shown for each PIN representing a hermetic package is the
most readily available from the manufacturer listed for that part. If the
desired lead finish is not listed, contact the Vendor to determine its
availability.
2/ Caution: Do not use this number for item acquisition. Items acquired to
this number may not satisfy the performance requirements of this drawing.
3/ Not available from an approved source.
Vendor CAGE Vendor name
number and address
0C7V7 QP Semiconductor
2945 Oakmead Village Court
Santa Clara, CA 95051
3DTT2 Pyramid Semiconductor Corporation
1340 Bordeaux Drive
Sunnyvale, CA 94089
61772 Integrated Device Technology, Inc.
2975 Stender Way
Santa Clara, CA 95054
The information contained herein is disseminated for convenience only and the
Government assumes no liability whatsoever for any inaccuracies in the
information bulletin.
Page 2 of 2
