AO4821
12V Dual P-Channel MOSFET
General Description Product Summary
V
DS
I
D
(at V
GS
=-4.5V) -9A
R
DS(ON)
(at V
GS
=-4.5V) < 19mΩ
R
DS(ON)
(at V
GS
=-2.5V) < 24mΩ
R
DS(ON)
(at V
GS
=-1.8V) < 30mΩ
100% UIS Tested
100% Rg Tested
Symbol
V
DS
V
GS
I
DM
T
J
, T
STG
Symbol
t ≤ 10s
Steady-State
Steady-State
R
θJL
W
2
Maximum Junction-to-Lead °C/W
°C/W
Maximum Junction-to-Ambient
A D
32 90
40
Maximum Junction-to-Ambient
A
T
A
=25°C
T
A
=70°C
Power Dissipation
B
P
D
Pulsed Drain Current
C
Continuous Drain
Current
T
A
=25°C
A
I
D
-9
-7
-60
The AO4821 uses advanced trench technology to provide
excellent R
DS(ON)
, low gate charge and operation with gate
voltages as low as 1.8V. This device is suitable for use as
a load switch.
V
Maximum UnitsParameter
Absolute Maximum Ratings T
A
=25°C unless otherwise noted
-12V
V±8Gate-Source Voltage
Drain-Source Voltage -12
°C/W
R
θJA
48
74 62.5
°C
Thermal Characteristics UnitsParameter Typ Max
1.28
T
A
=70°C
Junction and Storage Temperature Range -55 to 150
G1
S1
G2
S2
D1
D1
D2
D2
2
4 5
1
3
8
6
7
Top View
SOIC-8
Top View Bottom View
Pin1
G1
D1
1
S1
Rg
G2
D2
S2
Rg
Rev 4: Nov 2010 www.aosmd.com Page 1 of 5
AO4821
Symbol Min Typ Max Units
BV
DSS
-12 V
V
DS
=-12V, V
GS
=0V -1
T
J
=55°C -5
I
GSS
±10 µA
V
GS(th)
Gate Threshold Voltage -0.35 -0.53 -0.85 V
I
D(ON)
-60 A
16 19
T
J
=125°C 22 27
19 24 mΩ
23 30 mΩ
g
FS
45 S
V
SD
-0.56 -1 V
I
S
-3 A
C
iss
1390 1740 2100 pF
C
oss
230 334 435 pF
C
rss
120 200 280 pF
R
g
0.9 1.3 1.7 kΩ
Q
g
(4.5V) 15 19 23 nC
Q
gs
3.6 4.5 5.4 nC
Q
gd
3 5.3 7.4 nC
t
D(on)
240 ns
t
r
580 ns
t
D(off)
7µs
t
f
4.2 µs
t
rr
18 22 26 ns
Q
rr
14 17 20 nC
THIS PRODUCT HAS BEEN DESIGNED AND QUALIFIED FOR THE CONSUMER MARKET. APPLICATIONS OR USES AS CRITICAL
COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS ARE NOT AUTHORIZED. AOS DOES NOT ASSUME ANY LIABILITY ARISING
OUT OF SUCH APPLICATIONS OR USES OF ITS PRODUCTS. AOS RESERVES THE RIGHT TO IMPROVE PRODUCT DESIGN,
FUNCTIONS AND RELIABILITY WITHOUT NOTICE.
Body Diode Reverse Recovery Time
Drain-Source Breakdown Voltage
On state drain current
I
D
=-250µA, V
GS
=0V
V
GS
=-4.5V, V
DS
=-5V
V
GS
=-4.5V, I
D
=-9A
Reverse Transfer Capacitance
I
F
=-9A, dI/dt=500A/µs
V
GS
=0V, V
DS
=-6V, f=1MHz
SWITCHING PARAMETERS
Electrical Characteristics (T
J
=25°C unless otherwise noted)
STATIC PARAMETERS Parameter Conditions
I
DSS
µA
V
DS
=V
GS
I
D
=-250µA
V
DS
=0V, V
GS
= ±8V
Zero Gate Voltage Drain Current
Gate-Body leakage current
Forward Transconductance
Diode Forward Voltage
R
DS(ON)
Static Drain-Source On-Resistance mΩ
I
S
=-1A,V
GS
=0V
V
DS
=-5V, I
D
=-9A
V
GS
=-1.8V, I
D
=-6A
V
GS
=-2.5V, I
D
=-8A
Gate resistance V
GS
=0V, V
DS
=0V, f=1MHz
Turn-Off Fall Time
Total Gate Charge V
GS
=-4.5V, V
DS
=-6V, I
D
=-9A
Gate Source Charge
Gate Drain Charge
Body Diode Reverse Recovery Charge I
F
=-9A, dI/dt=500A/µs
Maximum Body-Diode Continuous Current
Input Capacitance
Output Capacitance
Turn-On DelayTime
DYNAMIC PARAMETERS
Turn-On Rise Time
Turn-Off DelayTime V
GS
=-4.5V, V
DS
=-6V, R
L
=0.67Ω,
R
GEN
=3Ω
A. The value of R
θJA
is measured with the device mounted on 1in
2
FR-4 board with 2oz. Copper, in a still air environment with T
A
=25°C. The
value in any given application depends on the user's specific board design.
B. The power dissipation P
D
is based on T
J(MAX)
=150°C, using ≤ 10s junction-to-ambient thermal resistance.
C. Repetitive rating, pulse width limited by junction temperature T
J(MAX)
=150°C. Ratings are based on low frequency and duty cycles to keep
initialT
J
=25°C.
D. The R
θJA
is the sum of the thermal impedence from junction to lead R
θJL
and lead to ambient.
E. The static characteristics in Figures 1 to 6 are obtained using <300µs pulses, duty cycle 0.5% max.
F. These curves are based on the junction-to-ambient thermal impedence which is measured with the device mounted on 1in
2
FR-4 board with
2oz. Copper, assuming a maximum junction temperature of T
J(MAX)
=150°C. The SOA curve provides a single pulse ratin g.
Rev 4: Nov 2010 www.aosmd.com Page 2 of 5
AO4821
17
5
2
10
0
18
40
0
10
20
30
40
50
60
0 0.5 1 1.5 2 2.5 3
-V
GS
(Volts)
Figure 2: Transfer Characteristics (Note E)
-I
D
(A)
10
15
20
25
30
0 5 10 15 20
-I
D
(A)
Figure 3: On-Resistance vs. Drain Current and Gate
Voltage (Note E)
R
DS(ON)
(mΩ
Ω
Ω
Ω)
V
GS
=-2.5V
1.0E-05
1.0E-04
1.0E-03
1.0E-02
1.0E-01
1.0E+00
1.0E+01
0.0 0.2 0.4 0.6 0.8 1.0
-V
SD
(Volts)
Figure 6: Body-Diode Characteristics (Note E)
-I
S
(A)
25°C
125°C
0.8
1
1.2
1.4
1.6
0 25 50 75 100 125 150 175
Temperature (°C)
Figure 4: On-Resistance vs. Junction Temperature
(Note E)
Normalized On-Resistance
I
D
=-9A, V
GS
=-4.5V
I
D
=-8A, V
GS
=-2.5V
10
15
20
25
30
35
40
45
0 2 4 6 8
-V
GS
(Volts)
Figure 5: On-Resistance vs. Gate-Source Voltage
(Note E)
R
DS(ON)
(mΩ
Ω
Ω
Ω)
25°C
125°C
V
DS
=-5V
V
GS
=-1.8V
V
GS
=-4.5V
I
D
=-9A
25°C
125°C
0
10
20
30
40
50
60
012345
-V
DS
(Volts)
Fig 1: On-Region Characteristics (Note E)
-I
D
(A)
V
GS
=-1.5V
-3V
-4.5V
-2V
-2.5V
I
D
=-6A, V
GS
=-1.8V
Rev 4: Nov 2010 www.aosmd.com Page 3 of 5
AO4821
0
0.5
1
1.5
2
2.5
3
3.5
4
4.5
0 5 10 15 20
Q
g
(nC)
Figure 7: Gate-Charge Characteristics
-V
GS
(Volts)
0
400
800
1200
1600
2000
2400
2800
0 2 4 6 8 10 12
-V
DS
(Volts)
Figure 8: Capacitance Characteristics
Capacitance (pF)
C
iss
C
oss
C
rss
V
DS
=-6V
I
D
=-9A
1
10
100
1000
10000
0.00001 0.001 0.1 10 1000
Pulse Width (s)
Figure 10: Single Pulse Power Rating Junction-to-
Ambient (Note F)
Power (W)
T
A
=25°C
0.0
0.1
1.0
10.0
100.0
0.01 0.1 1 10 100
-V
DS
(Volts)
-I
D
(Amps)
Figure 9: Maximum Forward Biased Safe
Operating Area (Note F)
10
µ
s
10s
1ms
DC
R
DS(ON)
limited
T
J(Max)
=150°C
T
A
=25°C
100
µ
10ms
0.01
0.1
1
10
0.00001 0.0001 0.001 0.01 0.1 1 10 100 1000
Pulse Width (s)
Figure 11: Normalized Maximum Transient Thermal Impedance (Note F)
Z
θ
θ
θ
θJA
Normalized Transient
Thermal Resistance
T
on
T
P
D
In descending order
D=0.5, 0.3, 0.1, 0.05, 0.02, 0.01, single pulse
D=T
on
/T
T
J,PK
=T
A
+P
DM
.Z
θJA
.R
θJA
R
θJA
=90°C/W
Rev 4: Nov 2010 www.aosmd.com Page 4 of 5
AO4821
-
+
VDC
Ig
Vds
DUT
-
+
VDC
Vgs
Vgs
10V
Qg
Qgs Qgd
Charge
Gate Charge Test Circuit & Waveform
Ig
Vgs
-
+
VDC
DUT
L
Vgs
Vds
Isd
Isd
Diode Recovery Test Circuit & Waveforms
Vds -
Vds +
I
F
dI/dt
I
RM
rr
Vdd
Vdd
Q = - Idt
t
rr
-
+
VDC
DUT Vdd
Vgs
Vds
Vgs
RL
Rg
Vgs
Vds
10%
90%
Resistive Switching Test Circuit & Waveforms
t t
r
d(on)
t
on
t
d(off)
t
f
t
off
Rev 4: Nov 2010 www.aosmd.com Page 5 of 5