LTM4600
1
4600fd
For more information www.linear.com/LTM4600
LOAD CURRENT (A)
0
EFFICIENCY (%)
50
60
70
6
4600 TA01b
40
30
20 2 4 8
80
90
100
10
1.2VOUT
1.5VOUT
2.5VOUT
3.3VOUT
10A High Efficiency
DC/DC µModule
The LT M
®
4600 is a complete 10A, DC/DC step down power
supply. Included in the package are the switching control-
ler, power FETs, inductor, and all support components.
Operating over an input voltage range of 4.5V to 20V, the
LTM4600 supports an output voltage range of 0.6V to 5V,
set by a single resistor. This high efficiency design delivers
10A continuous current (14A peak), needing no heat sinks
or airflow to meet power specifications. Only bulk input
and output capacitors are needed to finish the design.
The low profile package (2.82mm) enables utilization of
unused space on the bottom of PC boards for high density
point of load regulation. High switching frequency and an
adaptive on-time current mode architecture enables a very
fast transient response to line and load changes without
sacrificing stability. Fault protection features include
integrated overvoltage and short circuit protection with
a defeatable shutdown timer. A built-in soft-start timer is
adjustable with a small capacitor.
The LTM4600 is packaged in a compact (15mm × 15mm)
and low profile (2.82mm) over-molded Land Grid Array
(LGA) package suitable for automated assembly by stan-
dard surface mount equipment. The LTM4600 is RoHS
compliant.
n Telecom and Networking Equipment
n Servers
n Industrial Equipment
n Point of Load Regulation
n Complete Switch Mode Power Supply
n Wide Input Voltage Range: 4.5V to 20V
n 10A DC, 14A Peak Output Current
n Parallel Tw o µModule
®
DC/DC Converters for 20A
Output Current
n 0.6V to 5V Output Voltage
n 1.5% Output Voltage Regulation
n Ultrafast Transient Response
n Current Mode Control
n RoHS Compliant Package
n Up to 92% Efficiency
n Programmable Soft-Start
n Output Overvoltage Protection
n Optional Short-Circuit Shutdown Timer
n Small Footprint, Low Profile (15mm × 15mm ×
2.82mm) Surface Mount LGA Package
10A µModule Power Supply with 4.5V to 20V Input
Efficiency vs Load Current
with 12VIN (FCB = 0)
VIN
CIN
4600 TA01a
LTM4600
PGND SGND
VOUT
VOSET
VIN
4.5V TO 20V
V
OUT
1.5V
10A
COUT
66.5k
Typical applicaTion
FeaTures
applicaTions
DescripTion
L, LT , LT C , LT M , µModule and OPTI-LOOP are registered trademarks of Linear Technology
Corporation. All other trademarks are the property of their respective owners. Protected by U.S.
Patents including 5481178, 6100678, 6580258, 5847554, 6304066.
LTM4600
2
4600fd
For more information www.linear.com/LTM4600
FCB, EXTVCC, PGOOD, RUN/SS, VOUT ......... 0.3V to 6V
VIN, SVIN, fADJ ............................................ 0.3V to 20V
VOSET, COMP ............................................ 0.3V to 2.7V
Operating Temperature Range (Note 2)....40°C to 85°C
Junction Temperature ........................................... 125°C
Storage Temperature Range .................. 55°C to 125°C
Peak Solder Reflow Body Temperature ................. 24C
(Note 1)
RUN/SS
FCB
PGOOD
VIN
PGND
VOUT
COMP
SGND
EXTVCC
VOSET
fADJ
SVIN
LGA PACKAGE
104-LEAD (15mm × 15mm × 2.82mm)
TOP VIEW
TJMAX = 125°C, θJA = 15°C/W, θJC = 6°C/W,
θJA DERIVED FROM 95mm × 76mm PCB WITH 4 LAYERS
WEIGHT = 1.7g
pin conFiguraTionabsoluTe MaxiMuM raTings
orDer inForMaTion
PART NUMBER PAD OR BALL FINISH
PART MARKING* PACKAGE
TYPE
MSL
RATING
TEMPERATURE RANGE
(SEE NOTE 2)DEVICE FINISH CODE
LTM4600EV#PBF Au (RoHS) LTM4600EV e4 LGA 3 –40°C to 85°C
LTM4600IV#PBF LTM4600IV
• Consult Marketing for parts specified with wider operating temperature
ranges. *Pad or ball finish code is per IPC/JEDEC J-STD-609.
• Terminal Finish Part Marking: www.linear.com/leadfree
• Recommended LGA and BGA PCB Assembly and Manufacturing
Procedures: www.linear.com/umodule/pcbassembly
• LGA and BGA Package and Tray Drawings: www.linear.com/packaging
LTM4600
3
4600fd
For more information www.linear.com/LTM4600
SYMBOL PARAMETER CONDITIONS MIN TYP MAX UNITS
VIN(DC) Input DC Voltage l4.5 20 V
VOUT(DC) Output Voltage FCB = 0V
VIN = 5V or 12V, VOUT = 1.5V, IOUT = 0A
l
1.478
1.470
1.50
1.50
1.522
1.530
V
V
Input Specifications
VIN(UVLO) Under Voltage Lockout Threshold IOUT = 0A 3.4 4 V
IINRUSH(VIN) Input Inrush Current at Startup IOUT = 0A. VOUT = 1.5V, FCB = 0
VIN = 5V
VIN = 12V
0.6
0.7
A
A
IQ(VIN) Input Supply Bias Current IOUT = 0A, EXTVCC Open
VIN = 12V, VOUT = 1.5V, FCB = 5V
VIN = 12V, VOUT = 1.5V, FCB = 0V
VIN = 5V, VOUT = 1.5V, FCB = 5V
VIN = 5V, VOUT = 1.5V, FCB = 0V
Shutdown, RUN = 0.8V, VIN = 12V
1.2
42
1.0
52
35
75
mA
mA
mA
mA
µA
IS(VIN) Input Supply Current VIN = 12V, VOUT = 1.5V, IOUT = 10A
VIN = 12V, VOUT = 3.3V, IOUT = 10A
VIN = 5V, VOUT = 1.5V, IOUT = 10A
1.52
3.13
3.64
A
A
A
Output Specifications
IOUTDC Output Continuous Current Range
(See Output Current Derating Curves for
Different VIN, VOUT and TA)
VIN = 12V, VOUT = 1.5V 0 10 A
ΔVOUT(LINE)
VOUT
Line Regulation Accuracy VOUT = 1.5V, IOUT = 0A, FCB = 0V,
VIN = 4.5V to 20V
l0.15 0.3 %
ΔVOUT(LOAD)
VOUT
Load Regulation Accuracy VOUT = 1.5V, IOUT = 0A to 10A, FCB = 0V
VIN = 5V
VIN = 12V (Notes 3, 4)
l
±1
±1.5
%
%
VOUT(AC) Output Ripple Voltage VIN = 12V, VOUT = 1.5V, IOUT = 0A, FCB = 0V 10 15 mVP-P
fs Output Ripple Voltage Frequency VOUT = 1.5V, IOUT = 5A, FCB = 0V 850 kHz
tSTART Turn-On Time VOUT = 1.5V, IOUT = 1A
VIN = 12V
VIN = 5V
0.5
0.7
ms
ms
ΔVOUTLS Voltage Drop for Dynamic Load Step VOUT = 1.5V, Load Step: 0A/µs to 5A/µs
COUT=3•22µF 6.3V, 470µF 4V POSCAP,
See Table 2
36 mV
tSETTLE Settling Time for Dynamic Load Step Load: 10% to 90% to 10% of Full Load 25 µs
IOUTPK Output Current Limit Output Voltage in Foldback
VIN = 12V, VOUT = 1.5V
VIN = 5V, VOUT = 1.5V
14
14
A
A
Control Stage
VOSET Voltage at VOSET Pin IOUT = 0A, VOUT = 1.5V l 0.591
0.594
0.6
0.6
0.609
0.606
V
V
VRUN/SS RUN ON/OFF Threshold 0.8 1.5 2 V
IRUN(C)/SS Soft-Start Charging Current VRUN/SS = 0V –0.5 –1.2 –3 µA
IRUN(D)/SS Soft-Start Discharging Current VRUN/SS = 4V 0.8 1.8 3 µA
VIN – SVIN EXTVCC = 0V, FCB = 0V 100 mV
The l denotes the specifications which apply over the –40°C to 85°C
temperature range, otherwise specifications are at TA = 25°C, VIN = 12V. Per typical application (front page) configuration.
elecTrical characTerisTics
LTM4600
4
4600fd
For more information www.linear.com/LTM4600
Note 1: Stresses beyond those listed under Absolute Maximum Ratings
may cause permanent damage to the device. Exposure to any Absolute
Maximum Rating condition for extended periods may affect device
reliability and lifetime.
Note 2: The LTM4600E is guaranteed to meet performance specifications
from 0°C to 85°C. Specifications over the –40°C to 85°C operating
temperature range are assured by design, characterization and correlation
with statistical process controls. The LTM4600I is guaranteed over the
–40°C to 85°C temperature range.
Note 3: Test assumes current derating versus temperature.
Note 4: Guaranteed by correlation.
The l denotes the specifications which apply over the –40°C to 85°C
temperature range, otherwise specifications are at TA = 25°C, VIN = 12V. Per typical application (front page) configuration.
elecTrical characTerisTics
SYMBOL PARAMETER CONDITIONS MIN TYP MAX UNITS
IEXTVCC Current into EXTVCC Pin EXTVCC = 5V, FCB = 0V, VOUT = 1.5V,
IOUT = 0A
16 mA
RFBHI Resistor Between VOUT and VOSET Pins 100 kΩ
VFCB Forced Continuous Threshold 0.57 0.6 0.63 V
IFCB Forced Continuous Pin Current VFCB = 0.6V –1 –2 µA
PGOOD Output
ΔVOSETH PGOOD Upper Threshold VOSET Rising 7.5 10 12.5 %
ΔVOSETL PGOOD Lower Threshold VOSET Falling –7.5 –10 –12.5 %
ΔVOSET(HYS) PGOOD Hysteresis VOSET Returning 2 %
VPGL PGOOD Low Voltage IPGOOD = 5mA 0.15 0.4 V
LTM4600
5
4600fd
For more information www.linear.com/LTM4600
LOAD CURRENT (A)
0
EFFICIENCY (%)
50
60
70
6
4600 G02
40
30 2 4 8
80
90
100
10
0.6VOUT
1.2VOUT
1.5VOUT
2.5VOUT
3.3VOUT
Efficiency
vs Load Current
with
5VIN (FCB = 0)
LOAD CURRENT (A)
0
100
90
80
70
60
50
40
30 6
4600 G01
2 4 8 10
EFFICIENCY (%)
0.6VOUT
1.2VOUT
1.5VOUT
2.5VOUT
Efficiency
vs Load Current
with 12VIN (FCB = 0)
Efficiency vs Load Current
with 18VIN (FCB = 0)
LOAD CURRENT (A)
0
EFFICIENCY (%)
6
4600 G03
2 4 8 10
80
90
100
70
60
50
40
30
1.5VOUT
1.8VOUT
2.5VOUT
3.3VOUT
Efficiency
vs Load Current
with Different FCB Settings
LOAD CURRENT (A)
20
50
40
30
90
80
70
60
4600 G04
EFFICIENCY (%)
0.1 10
1
FCB = GND
FCB > 0.7V
VIN = 12V
VOUT = 1.5V
1.2
V Transient Response
1.5
V Transient Response
(See Figure 18 for all curves)
Typical perForMance characTerisTics
25µs/DIV 4600 G05
1.2V AT 5A/µs LOAD STEP
COUT = 3 • 22µF 6.3V CERAMICS
470µF 4V SANYO POSCAP
C3 = 100pF
VOUT = 50mV/DIV
IOUT = 5A/DIV
25µs/DIV 4600 G06
1.5V AT 5A/µs LOAD STEP
COUT = 3 • 22µF 6.3V CERAMICS
470µF 4V SANYO POSCAP
C3 = 100pF
1.8V Transient Response
2.5V Transient Response
3.3V Transient Response
25µs/DIV 4600 G07
1.8V AT 5A/µs LOAD STEP
COUT = 3 • 22µF 6.3V CERAMICS
470µF 4V SANYO POSCAP
C3 = 100pF
25µs/DIV 4600 G08
2.5V AT 5A/µs LOAD STEP
COUT = 3 • 22µF 6.3V CERAMICS
470µF 4V SANYO POSCAP
C3 = 100pF
25µs/DIV 4600 G09
3.3V AT 5A/µs LOAD STEP
COUT = 3 • 22µF 6.3V CERAMICS
470µF 4V SANYO POSCAP
C3 = 100pF
LTM4600
6
4600fd
For more information www.linear.com/LTM4600
(See Figure 18 for all curves)
VIN (V)
0
5.5
5.0
4.5
4.0
3.5
3.0
2.5
2.0
1.5
1.0
0.5
05 15
4600 G14
10 20
VOUT (V)
5V
3.3V
2.5V
1.8V
1.5V
1.2V
fADJ = OPEN
SEE FREQUENCY ADJUSTMENT DISCUSSION
FOR 12VIN TO 5VOUT AND 5VIN TO 3.3VOUT
CONVERSION
0.6V
Start
-Up, IOUT = 0A
Start-Up, I
OUT
= 10A
(Resistive Load)
Short-Circuit Protection,
IOUT = 0A
Short-Circuit Protection,
IOUT = 10A
VIN to VOUT Step-Down Ratio
Typical perForMance characTerisTics
12V Input Load Regulation vs
Temperature
LOAD CURRENT
0
–0.45
LOAD REGULATION %
–0.40
–0.35
–0.10
–0.15
–0.20
–0.25
–0.30
–0.05
0.00
5
4600 G15
10
25°C
100°C
–45°C
200µs/DIV 4600 G10
VIN = 12V
VOUT = 1.5V
COUT = 200µF
NO EXTERNAL SOFT-START CAPACITOR
VOUT
(0.5V/DIV)
IIN
(0.5A/DIV)
200µs/DIV 4600 G11
VIN = 12V
VOUT = 1.5V
COUT = 200µF
NO EXTERNAL SOFT-START CAPACITOR
VOUT
(0.5V/DIV)
IIN
(0.5A/DIV)
200µs/DIV 4600 G12
VIN = 12V
VOUT = 1.5V
COUT = 2× 200µF/X5R
NO EXTERNAL SOFT-START CAPACITOR
VOUT
(0.5V/DIV)
IIN
(0.2A/DIV)
20µs/DIV 4600 G13
VIN = 12V
VOUT = 1.5V
COUT = 2× 200µF/X5R
NO EXTERNAL SOFT-START CAPACITOR
VOUT
(0.5V/DIV)
IIN
(0.5A/DIV)
LTM4600
7
4600fd
For more information www.linear.com/LTM4600
VIN (Bank 1): Power Input Pins. Apply input voltage be-
tween these pins and PGND pins. Recommend placing
input decoupling capacitance directly between VIN pins
and PGND pins.
fADJ (Pin A15): A 110k resistor from VIN to this pin sets
the one-shot timer current, thereby setting the switching
frequency. The LTM4600 switching frequency is typically
850kHz. An external resistor to ground can be selected to
reduce the one-shot timer current, thus lower the switching
frequency to accommodate a higher duty cycle step down
requirement. See the applications section.
SVIN (Pin A17): Supply Pin for Internal PWM Controller.
Leave this pin open or add additional decoupling capacitance.
EXTVCC (Pin A19): External 5V supply pin for controller. If
left open or grounded, the internal 5V linear regulator will
power the controller and MOSFET drivers. For high input
voltage applications, connecting this pin to an external
5V will reduce the power loss in the power module. The
EXTVCC voltage should never be higher than VIN.
VOSET (Pin A21): The Negative Input of The Error Amplifier.
Internally, this pin is connected to VOUT with a 100k preci-
sion resistor. Different output voltages can be programmed
with additional resistors between the VOSET and SGND pins.
COMP (Pin B23): Current Control Threshold and Error
Amplifier Compensation Point. The current comparator
threshold increases with this control voltage. The voltage
ranges from 0V to 2.4V with 0.8V corresponding to zero
sense voltage (zero current).
SGND (Pin D23): Signal Ground Pin. All small-signal
components should connect to this ground, which in turn
connects to PGND at one point.
RUN/SS (Pin F23): Run and Soft-Start Control. Forcing
this pin below 0.8V will shut down the power supply.
Inside the power module, there is a 1000pF capacitor
which provides approximately 0.7ms soft-start time with
200µF output capacitance. Additional soft-start time can
be achieved by adding additional capacitance between the
RUN/SS and SGND pins. The internal short-circuit latchoff
can be disabled by adding a resistor between this pin and
the VIN pin. This pull-up resistor must supply a minimum
5µA pull up current. The RUN/SS pin has an internal 6V
Zener to ground.
FCB (Pin G23): Forced Continuous Input. Grounding this
pin enables forced continuous mode operation regardless
of load conditions. Tying this pin above 0.63V enables
discontinuous conduction mode to achieve high efficiency
operation at light loads. There is an internal 4.75K resistor
between the FCB and SGND pins.
PGOOD (Pin J23): Output Voltage Power Good Indicator.
When the output voltage is within 10% of the nominal
voltage, the PGOOD is open drain output. Otherwise, this
pin is pulled to ground.
PGND (Bank 2): Power ground pins for both input and
output returns.
VOUT (Bank 3): Power Output Pins. Apply output load
between these pins and PGND pins. Recommend placing
High Frequency output decoupling capacitance directly
between these pins and PGND pins.
(See Package Description for Pin Assignment)
pin FuncTions
E
C
A
RUN/SS
FCB
PGOOD
VIN
BANK 1
PGND
BANK 2
VOUT
BANK 3
COMP
SGND
EXTVCC
VOSET
fADJ
SVIN
TOP VIEW
3 5
2 4
7 9
6 8
11 13
10 12
15 17
14 16
19 21
18 20 22
94 95 96 97 98 99 100 101 102 103 104
93
82
71
60
49
24
23
22
21
20
1918171676543
2
40
51
62
73
84 85 86 87 88 89 90 91
74 75 76 77 78 79 80
63 64 65 66 67 68 69
52 53 54 55 56 57 58
42 43 44 45 46 47
92
81
70
59
48
11109
13 14 15
26 27 28 29 30 31
33 34 35 36 37 38
41
1
8
12
25
32
39
50
61
72
83
1 23
B
D
F
G
H
J
L
M
N
P
R
T
K
4600 PN01
LTM4600
8
4600fd
For more information www.linear.com/LTM4600
SYMBOL PARAMETER CONDITIONS MIN TYP MAX UNITS
CIN External Input Capacitor Requirement
(VIN = 4.5V to 20V, VOUT = 1.5V)
IOUT = 10A 20 µF
COUT External Output Capacitor Requirement
(VIN = 4.5V to 20V, VOUT = 1.5V)
IOUT = 10A, Refer to Table 2 in the
Applications Information Section
100 200 µF
TA = 25°C, VIN = 12V. Use Figure 1 configuration.
Figure 1. Simplified LTM4600 Block Diagram
4600 F01
RUN/SS LTM4600
VOSET
EXTVCC
SGND
fADJ
FCB
1000pF
Q1
Q2
VOUT 1.5V/10A MAX
PGND
VIN 4.5V TO 20V
SVIN
COMP
PGOOD
R6
66.5k
100k
0.5%
4.75k
1.5μFCIN
15μF
6.3V
COUT
10Ω
INT
COMP
CONTROLLER
siMpliFieD block DiagraM
Decoupling requireMenTs
LTM4600
9
4600fd
For more information www.linear.com/LTM4600
µModule Description
The LTM4600 is a standalone non-isolated synchronous
switching DC/DC power supply. It can deliver up to 10A of
DC output current with only bulk external input and output
capacitors. This module provides a precisely regulated
output voltage programmable via one external resistor from
0.6VDC to 5.0VDC, not to exceed 80% of the input voltage.
The input voltage range is 4.5V to 20V. A simplified block
diagram is shown in Figure 1 and the typical application
schematic is shown in Figure 18.
The LTM4600 contains an integrated LT C constant on-time
current-mode regulator, ultra-low RDS(ON) FETs with fast
switching speed and integrated Schottky diode. The typical
switching frequency is 850kHz at full load. With current
mode control and internal feedback loop compensation,
the LTM4600 module has sufficient stability margins and
good transient performance under a wide range of operat-
ing conditions and with a wide range of output capacitors,
even all ceramic output capacitors (X5R or X7R).
Current mode control provides cycle-by-cycle fast current
limit. In addition, foldback current limiting is provided in
an over-current condition while VOSET drops. Also, the
LTM4600 has defeatable short circuit latch off. Internal
overvoltage and undervoltage comparators pull the open-
drain PGOOD output low if the output feedback voltage exits
a ±10% window around the regulation point. Furthermore,
in an overvoltage condition, internal top FET Q1 is turned
off and bottom FET Q2 is turned on and held on until the
overvoltage condition clears.
Pulling the RUN/SS pin low forces the controller into its
shutdown state, turning off both Q1 and Q2. Releasing the
pin allows an internal 1.2µA current source to charge up
the soft-start capacitor. When this voltage reaches 1.5V,
the controller turns on and begins switching.
At low load current the module works in continuous cur-
rent mode by default to achieve minimum output voltage
ripple. It can be programmed to operate in discontinuous
current mode for improved light load efficiency when the
FCB pin is pulled up above 0.8V and no higher than 6V.
The FCB pin has a 4.75k resistor to ground, so a resistor
to VIN can set the voltage on the FCB pin.
When EXTVCC pin is grounded or open, an integrated 5V
linear regulator powers the controller and MOSFET gate
drivers. If a minimum 4.7V external bias supply is ap-
plied on the EXTVCC pin, the internal regulator is turned
off, and an internal switch connects EXTVCC to the gate
driver voltage. This eliminates the linear regulator power
loss with high input voltage, reducing the thermal stress
on the controller. The maximum voltage on EXTVCC pin is
6V. The EXTVCC voltage should never be higher than the
VIN voltage. Also EXTVCC must be sequenced after VIN.
operaTion
LTM4600
10
4600fd
For more information www.linear.com/LTM4600
voltage is margined up. The output voltage is margined
down when QDOWN is on and QUP is off. If the output
voltage VO needs to be margined up/down by ±M%, the
resistor values of RUP and RDOWN can be calculated from
the following equations:
(RSET RUP )VO(1+M%)
(RSET RUP )+100kΩ=0.6V
SET
O
RSET +(100kΩRDOWN)=0.6V
Input Capacitors
The LTM4600 µModule should be connected to a low
ac-impedance DC source. High frequency, low ESR input
capacitors are required to be placed adjacent to the mod-
ule. In Figure 18, the bulk input capacitor CIN is selected
for its ability to handle the large RMS current into the
converter. For a buck converter, the switching duty-cycle
can be estimated as:
D=
V
O
V
IN
Without considering the inductor current ripple, the RMS
current of the input capacitor can be estimated as:
ICIN(RMS) =
O(MAX)
D(1D)
In the above equation, η% is the estimated efficiency of
the power module. C1 can be a switcher-rated electrolytic
aluminum capacitor, OS-CON capacitor or high volume
ceramic capacitors. Note the capacitor ripple current
ratings are often based on only 2000 hours of life. This
makes it advisable to properly derate the input capacitor,
or choose a capacitor rated at a higher temperature than
required. Always contact the capacitor manufacturer for
derating requirements.
In Figure 18, the input capacitors are used as high fre-
quency input decoupling capacitors. In a typical 10A
output application, 1-2 pieces of very low ESR X5R or
X7R, 10µF ceramic capacitors are recommended. This
The typical LTM4600 application circuit is shown in Figure
18. External component selection is primarily determined
by the maximum load current and output voltage.
Output Voltage Programming and Margining
The PWM controller of the LTM4600 has an internal
0.6V±1% reference voltage. As shown in the block dia-
gram, a 100k/0.5% internal feedback resistor connects
VOUT and VOSET pins. Adding a resistor RSET from VOSET
pin to SGND pin programs the output voltage:
VO=0.6V
100k
+
R
SET
R
SET
Table 1 shows the standard values of 1% RSET resistor
for typical output voltages:
Table 1.
RSET
(kΩ)Open 100 66.5 49.9 43.2 31.6 22.1 13.7
VO
(V) 0.6 1.2 1.5 1.8 2 2.5 3.3 5
Voltage margining is the dynamic adjustment of the output
voltage to its worst case operating range in production
testing to stress the load circuitry, verify control/protec-
tion functionality of the board and improve the system
reliability. Figure 2 shows how to implement margining
function with the LTM4600. In addition to the feedback
resistor RSET, several external components are added.
Turn off both transistor QUP and QDOWN to disable the
margining. When QUP is on and QDOWN is off, the output
Figure 2. LTM4600 Margining Implementation
PGND SGND
4600 F02
LTM4600 VOUT
VOSET
RSET RUP
QUP
100k
2N7002
RDOWN
QDOWN
2N7002
applicaTions inForMaTion
LTM4600
11
4600fd
For more information www.linear.com/LTM4600
decoupling capacitor should be placed directly adjacent
the module input pins in the PCB layout to minimize the
trace inductance and high frequency AC noise.
Output Capacitors
The LTM4600 is designed for low output voltage ripple.
The bulk output capacitors COUT is chosen with low enough
effective series resistance (ESR) to meet the output voltage
ripple and transient requirements. COUT can be low ESR
tantalum capacitor, low ESR polymer capacitor or ceramic
capacitor (X5R or X7R). The typical capacitance is 200µF
if all ceramic output capacitors are used. The internally
optimized loop compensation provides sufficient stability
margin for all ceramic capacitors applications. Additional
output filtering may be required by the system designer,
if further reduction of output ripple or dynamic transient
spike is required. Refer to Table 2 for an output capaci-
tance matrix for each output voltage Droop, peak to peak
deviation and recovery time during a 5A/µs transient with
a specific output capacitance.
Fault Conditions: Current Limit and Over current
Foldback
The LTM4600 has a current mode controller, which inher-
ently limits the cycle-by-cycle inductor current not only in
steady state operation, but also in transient.
To further limit current in the event of an over load condi-
tion,
the LTM4600 provides foldback current limiting. If the
output voltage falls by more than 50%, then the maximum
output current is progressively lowered to about one sixth
of its full current limit value.
VIN to VOUT Step-Down Ratios
There are restrictions in the maximum VIN to VOUT step
down ratio that can be achieved for a given input voltage.
These constraints are shown in VIN to VOUT Step-Down
Ratio in the the Typical Performance Characteristics sec-
tion. Note that additional thermal derating may apply. See
the Thermal Considerations and Output Current Derating
sections of this data sheet.
Soft-Start and Latchoff with the RUN/SS pin
The RUN/SS pin provides a means to shut down the
LTM4600 as well as a timer for soft-start and over-current la-
tchoff. Pulling the RUN/SS pin below 0.8V puts the LTM4600
into a low quiescent current shutdown (IQ ≤ 75µA). Re-
leasing the pin allows an internal 1.2µA current source
to charge up the timing capacitor CSS. Inside LTM4600,
there is an internal 1000pF capacitor from RUN/SS
pin to ground. If RUN/SS pin has an external capacitor
CSS_EXT to ground, the delay before starting is about:
tDELAY =
1.5V
1.2µA (CSS _ EXT +1000pF)
When the voltage on RUN/SS pin reaches 1.5V, the
LTM4600 internal switches are operating with a clamping
of the maximum output inductor current limited by the
RUN/SS pin total soft-start capacitance. As the RUN/SS
pin voltage rises to 3V, the soft-start clamping of the
inductor current is released.
After the controller has been started and given adequate
time to charge up the output capacitor, CSS is used as a
short-circuit timer. After the RUN/SS pin charges above 4V,
if the output voltage falls below 75% of its regulated value,
then a short-circuit fault is assumed. A 1.8µA current then
begins discharging CSS. If the fault condition persists until
the RUN/SS pin drops to 3.5V, then the controller turns
off both power MOSFETs, shutting down the converter
permanently. The RUN/SS pin must be actively pulled
down to ground in order to restart operation.
The over-current protection timer requires the soft-start
timing capacitor CSS be made large enough to guarantee
that the output is in regulation by the time CSS has reached
the 4V threshold. In general, this will depend upon the size
of the output capacitance, output voltage and load current
characteristic. A minimum external soft-start capacitor
can be estimated from:
CSS _EXT +1000pF >
C
OUT
V
OUT
10kV
Generally 0.1µF is more than sufficient.
applicaTions inForMaTion
LTM4600
12
4600fd
For more information www.linear.com/LTM4600
Table 2. Output Voltage Response Versus Component Matrix (Refer to Figure 18)
TYPICAL MEASURED VALUES
COUT1 VENDORS PART NUMBER COUT2 VENDORS PART NUMBER
TDK C4532X5R0J107MZ (100µF,6.3V) SANYO POSCAP 6TPE330MIL (330µF, 6.3V)
TAIYO YUDEN JMK432BJ107MU-T ( 100µF, 6.3V) SANYO POSCAP 2R5TPE470M9 (470µF, 2.5V)
TAIYO YUDEN JMK316BJ226ML-T501 ( 22µF, 6.3V) SANYO POSCAP 4TPE470MCL (470µF, 4V)
VOUT
(V)
CIN
(CERAMIC)
CIN
(BULK)
COUT1
(CERAMIC)
COUT2
(BULK)
CCOMP C3 VIN
(V)
DROOP
(mV)
PEAK TO PEAK
(mV)
RECOVERY TIME
(µs)
LOAD STEP
(A/µs)
1.2 2 × 10µF 25V 150µF 35V 3 × 22µF 6.3V 470µF 4V NONE 100pF 5 35 68 25 5
1.2 2 × 10µF 25V 150µF 35V 1 × 100µF 6.3V 470µF 2.5V NONE 100pF 5 35 70 20 5
1.2 2 × 10µF 25V 150µF 35V 2 × 100µF 6.3V 330µF 6.3V NONE 100pF 5 40 80 20 5
1.2 2 × 10µF 25V 150µF 35V 4 × 100µF 6.3V NONE NONE 100pF 5 49 98 20 5
1.2 2 × 10µF 25V 150µF 35V 3 × 22µF 6.3V 470µF 4V NONE 100pF 12 35 68 25 5
1.2 2 × 10µF 25V 150µF 35V 1 × 100µF 6.3V 470µF 2.5V NONE 100pF 12 35 70 20 5
1.2 2 × 10µF 25V 150µF 35V 2 × 100µF 6.3V 330µF 6.3V NONE 100pF 12 40 80 20 5
1.2 2 × 10µF 25V 150µF 35V 4 × 100µF 6.3V NONE NONE 100pF 12 49 98 20 5
1.5 2 × 10µF 25V 150µF 35V 3 × 22µF 6.3V 470µF 4V NONE 100pF 5 36 75 25 5
1.5 2 × 10µF 25V 150µF 35V 1 × 100µF 6.3V 470µF 2.5V NONE 100pF 5 37 79 20 5
1.5 2 × 10µF 25V 150µF 35V 2 × 100µF 6.3V 330µF 6.3V NONE 100pF 5 44 84 20 5
1.5 2 × 10µF 25V 150µF 35V 4 × 100µF 6.3V NONE NONE 100pF 5 61 118 20 5
1.5 2 × 10µF 25V 150µF 35V 3 × 22µF 6.3V 470µF 4V NONE 100pF 12 36 75 25 5
1.5 2 × 10µF 25V 150µF 35V 1 × 100µF 6.3V 470µF 2.5V NONE 100pF 12 37 79 20 5
1.5 2 × 10µF 25V 150µF 35V 2 × 100µF 6.3V 330µF 6.3V NONE 100pF 12 44 89 20 5
1.5 2 × 10µF 25V 150µF 35V 4 × 100µF 6.3V NONE NONE 100pF 12 54 108 20 5
1.8 2 × 10µF 25V 150µF 35V 3 × 22µF 6.3V 470µF 4V NONE 100pF 5 40 81 30 5
1.8 2 × 10µF 25V 150µF 35V 1 × 100µF 6.3V 470µF 2.5V NONE 100pF 5 44 88 20 5
1.8 2 × 10µF 25V 150µF 35V 2 × 100µF 6.3V 330µF 6.3V NONE 100pF 5 46 91 20 5
1.8 2 × 10µF 25V 150µF 35V 4 × 100µF 6.3V NONE NONE 100pF 5 62 128 20 5
1.8 2 × 10µF 25V 150µF 35V 3 × 22µF 6.3V 470µF 4V NONE 100pF 12 40 81 30 5
1.8 2 × 10µF 25V 150µF 35V 1 × 100µF 6.3V 470µF 2.5V NONE 100pF 12 44 85 20 5
1.8 2 × 10µF 25V 150µF 35V 2 × 100µF 6.3V 330µF 6.3V NONE 100pF 12 44 91 20 5
1.8 2 × 10µF 25V 150µF 35V 4 × 100µF 6.3V NONE NONE 100pF 12 62 125 20 5
2.5 2 × 10µF 25V 150µF 35V 1 × 100µF 6.3V 470µF 4V NONE 100pF 5 48 103 30 5
2.5 2 × 10µF 25V 150µF 35V 2 × 100µF 6.3V 330µF 6.3V NONE 100pF 5 56 113 30 5
2.5 2 × 10µF 25V 150µF 35V 3 × 22µF 6.3V 470µF 4V NONE 100pF 5 57 116 30 5
2.5 2 × 10µF 25V 150µF 35V 4 × 100µF 6.3V NONE NONE 100pF 5 60 115 25 5
2.5 2 × 10µF 25V 150µF 35V 1 × 100µF 6.3V 470µF 4V NONE 100pF 12 48 103 30 5
2.5 2 × 10µF 25V 150µF 35V 3 × 22µF 6.3V 470µF 4V NONE 100pF 12 51 102 30 5
2.5 2 × 10µF 25V 150µF 35V 2 × 100µF 6.3V 330µF 6.3V NONE 100pF 12 56 113 30 5
2.5 2 × 10µF 25V 150µF 35V 4 × 100µF 6.3V NONE NONE 100pF 12 70 159 25 5
3.3 2 × 10µF 25V 150µF 35V 2 × 100µF 6.3V 330µF 6.3V NONE 100pF 7 64 126 30 5
3.3 2 × 10µF 25V 150µF 35V 1 × 100µF 6.3V 470µF 4V NONE 100pF 7 66 132 30 5
3.3 2 × 10µF 25V 150µF 35V 3 × 22µF 6.3V 470µF 4V NONE 100pF 7 82 166 35 5
3.3 2 × 10µF 25V 150µF 35V 4 × 100µF 6.3V NONE NONE 100pF 7 100 200 25 5
3.3 2 × 10µF 25V 150µF 35V 1 × 100µF 6.3V 470µF 4V NONE 100pF 12 52 106 30 5
3.3 2 × 10µF 25V 150µF 35V 3 × 22µF 6.3V 470µF 4V NONE 100pF 12 64 129 35 5
3.3 2 × 10µF 25V 150µF 35V 2 × 100µF 6.3V 330µF 6.3V NONE 100pF 12 64 126 30 5
3.3 2 × 10µF 25V 150µF 35V 4 × 100µF 6.3V NONE NONE 100pF 12 76 144 25 5
5 2 × 10µF 25V 150µF 35V 4 × 100µF 6.3V NONE NONE 100pF 15 188 375 25 5
5 2 × 10µF 25V 150µF 35V 4 × 100µF 6.3V NONE NONE 100pF 20 159 320 25 5
applicaTions inForMaTion
LTM4600
13
4600fd
For more information www.linear.com/LTM4600
Since the load current is already limited by the current mode
control and current foldback circuitry during a short circuit,
over-current latchoff operation is NOT always needed or
desired, especially if the output has a large amount of
capacitance or the load draws huge currents during start
up. The latchoff feature can be overridden by a pull-up
current greater thanA but less than 80µA to the RUN/SS
pin. The additional currents prevents the discharge of CSS
during a fault and also shortens the soft-start period. Us-
ing a resistor from RUN/SS pin to VIN is a simple solution
to defeat latchoff. Any pull-up network must be able to
maintain RUN/SS above 4V maximum latchoff threshold
and overcome theA maximum discharge current. With a
pull-up resistor, the delay before starting is approximately:
Figure 5. Enable Circuit with External Logic
RUN/SS
4600 F05
LTM4600
PGND
2N7002
SGND
ON
VIN
VIN
RRUN/SS
RUN/SS
4600 F04
LTM4600
PGND SGND
RECOMMENDED VALUES FOR RRUN/SS
VIN
4.5V TO 5.5V
10.8V TO 13.8V
16V TO 20V
RRUN/SS
50k
150k
330k
Figure 4. Defeat Short-Circuit Latchoff with a Pull-Up
Resistor to VIN
Figure 3. RUN/SS Pin Voltage During Startup and
Short-Circuit Protection
VRUN/SS
3.5V
t
t
75%VO
SWITCHING
STARTS
SOFT-START
CLAMPING
OF IL RELEASED
SHORT-CIRCUIT
LATCHOFF
OUTPUT
OVERLOAD
HAPPENS
SHORT-CIRCUIT
LATCH ARMED
4V
3V
1.5V
4600 F03
VO
applicaTions inForMaTion
tDELAY =–RRUN/SS CSS _ EXT +1000pF
( )
ln 11.5V
V
IN +1.2µA RRUN/SS
( )
Figure 3 shows a conceptual drawing of VRUN during
startup and short circuit.
Enable
The RUN/SS pin can be driven from logic as shown in
Figure 5. This function allows the LTM4600 to be turned
on or off remotely. The ON signal can also control the
sequence of the output voltage.
LTM4600
14
4600fd
For more information www.linear.com/LTM4600
Output Voltage Tracking
For the applications that require output voltage tracking,
several LTM4600 modules can be programmed by the
power supply tracking controller such as the LTC2923.
Figure 6 shows a typical schematic with LTC2923. Coin-
cident, ratiometric and offset tracking for VO rising and
falling can be implemented with different sets of resistor
values. See the LTC2923 data sheet for more details.
Figure 6. Output Voltage Tracking with the LTC2923 Controller
Q1
VCC
VIN
VIN
RONB
VIN
5V
RTB1
RTB2
49.9k
1.8V
3.3V
RTA2
RTA1
RONA
ON
RAMPBUF
TRACK1
TRACK2
FB1
GATE
LTC2923
GND
4600 F06
RAMP
66.5k
1.5V
LTM4600
VIN
VOUT
LTM4600
DC/DC
VIN
VOUT
VOSET
VOSET
FB2
SDO
STATUS
EXTVCC Connection
An internal low dropout regulator produces an internal 5V
supply that powers the control circuitry and FET drivers.
Therefore, if the system does not have a 5V power rail,
the LTM4600 can be directly powered by VIN. The gate
driver current through LDO is about 18mA. The internal
LDO power dissipation can be calculated as:
PLDO_LOSS = 18mA•(VIN – 5V)
The LTM4600 also provides an external gate driver volt-
age pin EXTVCC. If there is a 5V rail in the system, it is
recommended to connect EXTVCC pin to the external 5V
rail. Whenever the EXTVCC pin is above 4.7V, the internal
5V LDO is shut off and an internal 50mA P-channel switch
connects the EXTVCC to internal 5V. Internal 5V is supplied
from EXTVCC until this pin drops below 4.5V. Do not apply
more than 6V to the EXTVCC pin and ensure that EXTVCC
< VIN. The following list summaries the possible connec-
tions for EXTVCC:
1. EXTVCC grounded. Internal 5V LDO is always powered
from the internal 5V regulator.
2. EXTVCC connected to an external supply. Internal LDO
is shut off. A high efficiency supply compatible with the
MOSFET gate drive requirements (typically 5V) can im-
prove overall efficiency. With this connection, it is always
required that the EXTVCC voltage can not be higher than
VIN pin voltage.
Discontinuous Operation and FCB Pin
The FCB pin determines whether the internal bottom
MOSFET remains on when the inductor current reverses.
There is an internal 4.75k pull-down resistor connecting
this pin to ground. The default light load operation mode
is forced continuous (PWM) current mode. This mode
provides minimum output voltage ripple.
In the application where the light load efficiency is im-
portant, tying the FCB pin above 0.6V threshold enables
discontinuous operation where the bottom MOSFET turns
off when inductor current reverses. Therefore, the conduc-
tion loss is minimized and light load efficiency is improved.
The penalty is that the controller may skip cycle and the
output voltage ripple increases at light load.
Paralleling Operation with Load Sharing
Tw o or more LTM4600 modules can be paralleled to provide
higher than 10A output current. Figure 7 shows the neces-
sary interconnection between two paralleled modules. The
OPTI-LOOP
®
current mode control ensures good current
sharing among modules to balance the thermal stress.
The new feedback equation for two or more LTM4600s
in parallel is:
VOUT =0.6V
100k
N+RSET
R
SET
where N is the number of LTM4600s in parallel.
applicaTions inForMaTion
LTM4600
15
4600fd
For more information www.linear.com/LTM4600
Thermal Considerations and Output Current Derating
The power loss curves in Figures 8 and 13 can be used
in coordination with the load current derating curves in
Figures 9 to 12, and Figures 14 to 15 for calculating an
approximate θJA for the module with various heat sink-
ing methods. Thermal models are derived from several
Figure 7. Parallel Tw o µModules with Load Sharing
VIN VOUT
VIN VOUT
(20AMAX)
4600 F07
LTM4600
PGND SGNDCOMP VOSET
RSET
VIN VOUT
LTM4600
PGND
SGNDCOMP VOSET
temperature measurements at the bench, and thermal
modeling analysis. Application Note 103 provides a detailed
explanation of the analysis for the thermal models, and the
derating curves. Tables 3 and 4 provide a summary of the
equivalent θJA for the noted conditions. These equivalent
θJA parameters are correlated to the measured values, and
improve with air-flow. The case temperature is maintained
at 100°C or below for the derating curves. This allows for
4W maximum power dissipation in the total module with
top and bottom heat sinking, and 2W power dissipation
through the top of the module with an approximate θJC
betweenC/W toC/W. This equates to a total of 124°C
at the junction of the device.
Safety Considerations
The LTM4600 modules do not provide isolation from VIN
to VOUT. There is no internal fuse. If required, a slow blow
fuse with a rating twice the maximum input current should
be provided to protect each unit from catastrophic failure.
Table 4. 3.3V Output
DERATING CURVE VIN (V) POWER LOSS CURVE AIR FLOW (LFM) HEAT SINK θJA (°C/W)
Figure 14 12 Figure 13 0 None 15.2
Figure 14 12 Figure 13 200 None 14.6
Figure 14 12 Figure 13 400 None 13.4
Figure 15 12 Figure 13 0 BGA Heat Sink 13.9
Figure 15 12 Figure 13 200 BGA Heat Sink 11.1
Figure 15 12 Figure 13 400 BGA Heat Sink 10.5
Table 3. 1.5V Output
DERATING CURVE VIN (V) POWER LOSS CURVE AIR FLOW (LFM) HEAT SINK θJA (°C/W)
Figures 9, 11 5, 12 Figure 8 0 None 15.2
Figures 9, 11 5, 12 Figure 8 200 None 14
Figures 9, 11 5, 12 Figure 8 400 None 12
Figures 10, 12 5, 12 Figure 8 0 BGA Heat Sink 13.9
Figures 10, 12 5, 12 Figure 8 200 BGA Heat Sink 11.3
Figures 10, 12 5, 12 Figure 8 400 BGA Heat Sink 10.25
applicaTions inForMaTion
LTM4600
16
4600fd
For more information www.linear.com/LTM4600
Figure 14. No Heat Sink Figure 15. BGA Heat Sink
AMBIENT TEMPERATURE (°C)
50
MAXIMUM LOAD CURRENT (A)
8
9
10
90
4600 G12
7
6
560 70 80 100
0LFM
200LFM
400LFM
VIN = 12V
VO = 1.5V
AMBIENT TEMPERATURE (°C)
50 55 70
4600 F11
60 65 75 80 85 90
VIN = 12V
VO = 1.5V
400 LFM
200 LFM
0 LFM
MAXIMUM LOAD CURRENT (A)
10
9
8
7
6
5
4
AMBIENT TEMPERATURE (°C)
50
MAXIMUM LOAD CURRENT (A)
8
9
10
90
4600 G10
7
6
560 70 80 100
0LFM
200LFM
400LFM
VIN = 5V
VO = 1.5V
AMBIENT TEMPERATURE (°C)
50 70
4600 F09
60 80 90
VIN = 5V
VO = 1.5V
400 LFM
200 LFM
0 LFM
MAXIMUM LOAD CURRENT (A)
10
9
8
7
6
5
4
OUTPUT CURRENT (A)
0 86
4600 F08
2 4 10
3.5
4.0
4.5
3.0
2.5
2.0
1.5
1.0
0.5
0
POWER LOSS (W)
12V LOSS 5V LOSS
VOUT = 1.5V
Figure 8. Power Loss vs Load Current Figure 9. No Heat Sink Figure 10. BGA Heat Sink
Figure 11. No Heat Sink Figure 12. BGA Heat Sink Figure 13. Power Loss vs Load Current
OUTPUT CURRENT (A)
0 86
4600 F13
2 4 10
3.5
4.0
5.0
4.5
3.0
2.5
2.0
1.5
1.0
0.5
0
POWER LOSS (W)
VIN = 12V
VOUT = 3.3V
AMBIENT TEMPERATURE (°C)
40 70
4600 F14
6050 80 90
VIN = 12V
VO = 3.3V
400 LFM
200 LFM
0 LFM
MAXIMUM LOAD CURRENT (A)
10
9
8
7
6
4
5
0
1
2
3
AMBIENT TEMPERATURE (°C)
MAXIMUM LOAD CURRENT (A)
8
9
10
80
4600 G15
7
6
540 60 100
VIN = 12V
VO = 3.3V
0LFM
200LFM
400LFM
applicaTions inForMaTion
LTM4600
17
4600fd
For more information www.linear.com/LTM4600
LTM4600 Frequency Adjustment
The LTM4600 is designed to typically operate at 850kHz
across most input and output conditions. The control ar-
chitecture is constant on time valley mode current control.
The fADJ pin is typically left open or decoupled with an
optional 1000pF capacitor. The switching frequency has
been optimized to maintain constant output ripple over the
operating conditions. The equations for setting the operat-
ing frequency are set around a programmable constant on
time. This on time is developed by a programmable current
into an on board 10pF capacitor that establishes a ramp
that is compared to a voltage threshold equal to the output
voltage up to a 2.4V clamp. This ION current is equal to: ION
= (VIN – 0.7V)/110k, with the 110k onboard resistor from
VIN to fADJ. The on time is equal to tON = (VOUT/ION)•10pF
and tOFF = tstON. The frequency is equal to: Freq. = DC/
tON. The ION current is proportional to VIN, and the regula-
tor duty cycle is inversely proportional to VIN, therefore
the step-down regulator will remain relatively constant
frequency as the duty cycle adjustment takes place with
lowering VIN. The on time is proportional to VOUT up to a
2.4V clamp. This will hold frequency relatively constant
with different output voltages up to 2.4V. The regulator
switching period is comprised of the on time and off time
as depicted in Figure 17.
Layout Checklist/Example
The high integration of the LTM4600 makes the PCB
board layout very simple and easy. However, to optimize
its electrical and thermal performance, some layout con-
siderations are still necessary.
• Use large PCB copper areas for high current path, in-
cluding VIN, PGND and VOUT. It helps to minimize the
PCB conduction loss and thermal stress
• Place high frequency ceramic input and output capaci-
tors next to the VIN, PGND and VOUT pins to minimize
high frequency noise
• Place a dedicated power ground layer underneath
the unit
• To minimize the via conduction loss and reduce module
thermal stress, use multiple vias for interconnection
between top layer and other power layers
• Do not put a via directly on pad unless it is capped
• Use a separated SGND ground copper area for com-
ponents connected to signal pins. Connect the SGND
to PGND underneath the unit
Figure 16 gives a good example of the recommended layout.
Figure 16. Recommended PCB Layout
applicaTions inForMaTion
VIN
PGND
TOP LAYER
VOUT
SGND
4600 F16
LOAD
CIN
LTM4600
18
4600fd
For more information www.linear.com/LTM4600
The LTM4600 has a minimum (tON) on time of 100 nano-
seconds and
a minimum (tOFF) off time of 400 nanoseconds.
The 2.4V clamp on the ramp threshold as a function of
VOUT will cause the switching frequency to increase by the
ratio of VOUT/2.4V for 3.3V and 5V outputs. This is due to
the fact the on time will not increase as VOUT increases
past 2.4V. Therefore, if the nominal switching frequency
is 850kHz, then the switching frequency will increase
to ~1.2MHz for 3.3V, and ~1.7MHz for 5V outputs due
to Frequency = (DC/tON) When the switching frequency
increases to 1.2MHz, then the time period tS is reduced
to ~833 nanoseconds and at 1.7MHz the switching period
reduces to ~588 nanoseconds. When higher duty cycle
conversions like 5V to 3.3V and 12V to 5V need to be
accommodated, then the switching frequency can be
lowered to alleviate the violation of the 400ns minimum
off time. Since the total switching period is tS = tON + tOFF
,
tOFF will be below the 400ns minimum off time. A resistor
from the fADJ pin to ground can shunt current away from
the on time generator, thus allowing for a longer on time
and a lower switching frequency. 12V to 5V and 5V to
3.3V derivations are explained in the data sheet to lower
switching frequency and accommodate these step-down
conversions.
Equations for setting frequency for 12V to 5V:
ION = (VIN – 0.7V)/110k; ION = 103µA
frequency = (ION/[2.4V • 10pF]) • DC = 1.79MHz;
DC = duty cycle, duty cycle is (VOUT/VIN)
tS = tON + tOFF, tON = on-time, tOFF = off-time of the
switching period; tS = 1/frequency
tOFF must be greater than 400ns, or tS – tON > 400ns.
tON = DC•tS
1MHz frequency or 1µs period is chosen for 12V to 5V.
tON=0.41•1µs @ 410ns
tOFF = 1µs – 410ns @ 590ns
tON and tOFF are above the minimums with adequate guard
band.
Using the frequency = (ION/[2.4V•10pF])•DC, solve for
ION = (1MHz•2.4V•10pF)•(1/0.41)@ 58µA. ION current
calculated from 12V input was 103µA, so a resistor from
fADJ to ground = (0.7V/15k) = 46µA. 103µA – 46µA =
57µA, sets the adequate ION current for proper frequency
range for the higher duty cycle conversion of 12V to
5V. Input voltage range is limited to 9V to 16V. Higher
input voltages can be used without the 15k on fADJ. The
inductor ripple current gets too high above 16V, and the
400ns minimum off-time is limited below 9V.
Equations for setting frequency for 5V to 3.3V:
ION = (VIN – 0.7V)/110k; ION = 39µA
frequency = (ION/[2.4V • 10pF]) • DC = 1.07MHz;
DC = duty cycle, duty cycle is (VOUT/VIN)
tS = tON + tOFF, tON = DC •tS, tOFF = off-time of the
switching period; tS = 1/frequency
tOFF must be greater than 400ns, or tS – tON > 400ns.
The ~450kHz frequency or 2.22µs period is chosen for
5V to 3.3V. Frequency range is about 450kHz to 650kHz
from 4.5V to 7V input.
tON=0.66•2.22µs @ 1.46ms
tOFF = 2.22µs – 1.46µs @ 760ns
tON and tOFF are above the minimums with adequate guard
band.
Using the frequency = (ION/[2.4V•10pF])•DC, solve for
ION = (450kHz•2.4V•10pF)•(1/0.66)@ 16µA. ION current
calculated from 5V input was 39µA, so a resistor from fADJ
to ground = (0.7V/30.1k) = 23µA. 39µA – 23µA = 16µA,
sets the adequate ION current for proper frequency range
for the higher duty cycle conversion of 5V to 3.3V. Input
voltage range is limited to 4.5V to 7V. Higher input voltages
can be used without the 30.1k on fADJ. The inductor ripple
current gets too high above 7V, and the 400ns minimum
off-time is limited below 4.5V.
tOFF
PERIOD ts
tON
4600 F21
(DC) DUTY CYCLE = tON
ts
DC = =
tON
ts
FREQ = DC
tON
VOUT
VIN
Figure 17. LTM4600 Switching Period
applicaTions inForMaTion
LTM4600
19
4600fd
For more information www.linear.com/LTM4600
VIN (V)
4600 F20
1 3 5 7 9 11 13 15 17
3.3V: fADJ = 30.1k
5V: fADJ = 15k
5V AT 8A
3.3V AT 8A
V
OUT
(V)
5.0
4.5
4.0
3.5
3.0
2.5
2.0
1.5
1.0
0.5
0
VIN to VOUT Step-Down Ratio for
12VIN to 5VOUT and 5VIN to 3.3VOUT
5V to 3.3V at 8A
12V to 5V at 8A
applicaTions inForMaTion
4600 F18
R2
22.1k
1%
R1
30.1k
EXTVCC
RUN/SS
COMP
FCB
VOUT
5V TO 3.3V AT 8A WITH fADJ = 30.1k C1, C3: TDK C3216X5R1E106MT
C2: TAIYO YUDEN, JMK316BJ226ML
C4: SANYO POS CAP, 6TPE330MIL
PGOOD
VOSET
SVIN
PGNDSGND
4.5V TO 7V
3.3V AT 8A
C1
10µF
25V
C3
10µF
25V
C4
330µF
6.3V
C2
22µF
C5
100pF
VIN
LTM4600
fADJ
RUN/SOFT-START
OPEN DRAIN
EFFICIENCY = 93%
+
4600 F19
R2
13.7k
1%
R1
15k
EXTVCC
RUN/SS
COMP
FCB
VOUT
12V TO 5V AT 8A WITH fADJ = 15k C1, C3: TDK C3216X5R1E106MT
C2: TAIYO YUDEN, JMK316BJ226ML
C4: SANYO POSCAP, 6TPE330MIL
PGOOD
VOSET
SVIN
PGNDSGND
9V TO 16V
5V AT 8A EFFICIENCY = 94%
C1
10µF
25V
C3
10µF
25V
C4
330µF
6.3V
C2
22µF
C5
100pF
VIN
LTM4600
fADJ
RUN/SOFT-START
OPEN DRAIN
+
LTM4600
20
4600fd
For more information www.linear.com/LTM4600
Figure 18. Typical Application, 5V to 20V Input, 0.6V to 5V Output, 10A Max
4600 F18
VOUT
EXTVCC
fADJ
VOSET
FCB
COMP
PGOOD
VOUT
(MULTIPLE PINS)
VOUT
RUN/SS
SGND
PGND
(MULTIPLE PINS)
COUT1
22µF
6.3V
×3
REFER TO
TABLE 2
COUT2
470µF
REFER TO
TABLE 2
GND
0.6V TO 5V
REFER TO STEP-DOWN
RATIO GRAPH
C4
OPT
VIN
5V TO 20V
GND
CIN (CER)
10μF
2x
CIN (BULK)
150µF
C3
100pF
R1
66.5k
REFER TO
TABLE 1
VIN
(MULTIPLE PINS)
LTM4600
SVIN
+
+
Typical applicaTion
LTM4600
21
4600fd
For more information www.linear.com/LTM4600
4600 TA02
R4
15.8k
1%
EXTVCC
RUN
COMP
FCB
VOUT
VOUT = 0.6V • ([100k/N] + RSET)/RSET
WHERE N = 2
C1, C3, C7, C8: TDK C3216X5R1E106MT
C2, C9: TAIYO YUDEN, JMK316BJ226ML-T501
C5, C10: SANYO POSCAP, 4TPE470MCL
PGOOD
VOSET
SVIN
PGNDSGND
2.5V AT 20A
4.5V TO 20V
2.5V
2.5V
C7
10µF
25V
C8
10µF
25V
C10
470µF
4V
C9
22µF
x3
VIN
LTM4600
fADJ
R1
100k
EXTVCC
RUN
COMP
FCB
VOUT
PGOOD
VOSET
SVIN
PGNDSGND
C1
10µF
25V
RUN/SOFT-START
C3
10µF
25V
C4
220pF
C5
470µF
4V
C2
22µF
x3
VIN
LTM4600
fADJ
+
+
TOTAL LOAD
0
INDIVIDUAL SHARE
12
10
8
6
4
2
0
510 15
4600 TA03
20
IOUT1
IOUT2
12VIN
2.5VOUT
20AMAX
Current Sharing Between Tw o
LTM4600 Modules
Parallel Operation and Load Sharing
Typical applicaTion
LTM4600
22
4600fd
For more information www.linear.com/LTM4600
LGA Package
104-Lead (15mm × 15mm × 2.82mm)
(Reference LTM DWG # 05-05-1800 Rev C)
package DescripTion
Please refer to http://www.linear.com/designtools/packaging/ for the most recent package drawings.
NOTES:
1. DIMENSIONING AND TOLERANCING PER ASME Y14.5M-1994
2. ALL DIMENSIONS ARE IN MILLIMETERS
LAND DESIGNATION PER JESD MO-222, SPP-010
5. PRIMARY DATUM -Z- IS SEATING PLANE
6. THE TOTAL NUMBER OF PADS: 104
4
3
DETAILS OF PAD #1 IDENTIFIER ARE OPTIONAL,
BUT MUST BE LOCATED WITHIN THE ZONE INDICATED.
THE PAD #1 IDENTIFIER IS A MARKED FEATURE OR A
NOTCHED BEVELED PAD
SYMBOL
aaa
bbb
eee
TOLERANCE
0.15
0.10
0.15
2.72 – 2.92
DETAIL B
DETAIL B
SUBSTRATE
MOLD
CAP
0.27 – 0.37
2.45 – 2.55
bbb Z
Z
15
BSC
TOP VIEW
15
BSC
4PAD 1
CORNER
XY
aaa Z
aaa Z
13.97
BSC
12.70
BSC
0.11 – 0.27
13.93
BSC
3 5
2 4
7 9
6 8
11 13
10 12
15 17
14 16
19 21
18 20 22 4600 02-18
BOTTOM VIEW
C(0.30)
PAD 1
3
PADS
SEE NOTES
94 95 96 97 98 99 100 101 102 103 104
93
82
71
60
49
24
23
22
21
20
1918171676543
2
40
51
62
73
84 85 86 87 88 89 90 91
74 75 76 77 78 79 80
63 64 65 66 67 68 69
52 53 54 55 56 57 58
42 43 44 45 46 47
92
81
70
59
48
11109
13 14 15
26 27 28 29 30 31
33 34 35 36 37 38
41
1
8
12
25
32
39
50
61
72
83
MYXeee
1
SUGGESTED SOLDER PAD LAYOUT
TOP VIEW
94 95 96 97 98 99 100 101 102 103 104
93
82
71
60
49
24
23
22
21
20
19
1817
16
7
6
5
4
3
2
40
51
62
73
84 85 86 87 88 89 90 91
74 75 76 77 78 79 80
63 64 65 66 67 68 69
52 53 54 55 56 57 58
42 43 44 45 46 47
92
81
70
59
48
11
10
9
13 14 15
26 27 28 29 30 31
33 34 35 36 37 38
41
1
8
12
25
32
39
50
61
72
83
0.0000
1.2700
2.5400
0.3175
0.3175
4.4450
5.7150
6.9850
1.4675
5.7158
6.9421
4.4458
6.3500
6.3500
3.8100
3.8100
1.2700
0.3175
0.3175
0.0000
1.2700
3.1758
1.9058
0.6358
0.0000
0.6342
1.9042
3.1742
4.4442
5.7142
6.9865
2.7375
4.0075
5.2775
6.5475
6.9888
1.0900
2.3600
4.4950
5.7650
5.0800
5.0800
2.5400
2.5400
23
A
B
C
D
E
F
GH
J
L
M
N
P
R
T
K
7 PACKAGE ROW AND COLUMN LABELING MAY VARY
AMONG µModule PRODUCTS. REVIEW EACH PACKAGE
LAYOUT CAREFULLY
!
7
SEE NOTES
LGA 104 1112 REV C
LTM4600
23
4600fd
For more information www.linear.com/LTM4600
PIN NAME PIN NAME PIN NAME PIN NAME PIN NAME PIN NAME PIN NAME PIN NAME
A1 - B1 VIN C1 - D1 VIN E1 - F1 VIN G1 PGND H1 -
A2 - B2 - C2 - D2 - E2 - F2 - G2 - H2 -
A3 VIN B3 - C3 - D3 - E3 - F3 - G3 - H3 -
A4 - B4 - C4 - D4 - E4 - F4 - G4 - H4 -
A5 VIN B5 - C5 - D5 - E5 - F5 - G5 - H5 -
A6 - B6 - C6 - D6 - E6 - F6 - G6 - H6 -
A7 VIN B7 - C7 - D7 - E7 - F7 - G7 - H7 PGND
A8 - B8 - C8 - D8 - E8 - F8 - G8 - H8 -
A9 VIN B9 - C9 - D9 - E9 - F9 - G9 - H9 PGND
A10 - B10 - C10 VIN D10 - E10 VIN F10 - G10 - H10 -
A11 VIN B11 - C11 - D11 - E11 - F11 - G11 - H11 PGND
A12 - B12 - C12 VIN D12 - E12 VIN F12 - G12 - H12 -
A13 VIN B13 - C13 - D13 - E13 - F13 - G13 - H13 PGND
A14 - B14 - C14 VIN D14 - E14 VIN F14 - G14 - H14 -
A15 fADJ B15 - C15 - D15 - E15 - F15 - G15 - H15 PGND
A16 - B16 - C16 - D16 - E16 - F16 - G16 - H16 -
A17 SVIN B17 - C17 - D17 - E17 - F17 - G17 - H17 PGND
A18 - B18 - C18 - D18 - E18 - F18 - G18 - H18 -
A19 EXTVCC B19 - C19 - D19 - E19 - F19 - G19 - H19 -
A20 - B20 - C20 - D20 - E20 - F20 - G20 - H20 -
A21 VOSET B21 - C21 - D21 - E21 - F21 - G21 - H21 -
A22 - B22 - C22 - D22 - E22 - F22 - G22 - H22 -
A23 - B23 COMP C23 - D23 SGND E23 - F23 RUN/SS G23 FCB H23 -
PIN NAME PIN NAME PIN NAME PIN NAME PIN NAME PIN NAME PIN NAME PIN NAME
J1 PGND K1 - L1 - M1 - N1 - P1 - R1 - T1 -
J2 - K2 - L2 PGND M2 PGND N2 PGND P2 VOUT R2 VOUT T2 VOUT
J3 - K3 - L3 - M3 - N3 - P3 - R3 - T3 -
J4 - K4 - L4 PGND M4 PGND N4 PGND P4 VOUT R4 VOUT T4 VOUT
J5 - K5 - L5 - M5 - N5 - P5 - R5 - T5 -
J6 - K6 - L6 PGND M6 PGND N6 PGND P6 VOUT R6 VOUT T6 VOUT
J7 - K7 PGND L7 - M7 - N7 - P7 - R7 - T7 -
J8 - K8 L8 PGND M8 PGND N8 PGND P8 VOUT R8 VOUT T8 VOUT
J9 - K9 PGND L9 - M9 - N9 - P9 - R9 - T9 -
J10 - K10 L10 PGND M10 PGND N10 PGND P10 VOUT R10 VOUT T10 VOUT
J11 - K11 PGND L11 - M11 - N11 - P11 - R11 - T11 -
J12 - K12 - L12 PGND M12 PGND N12 PGND P12 VOUT R12 VOUT T12 VOUT
J13 - K13 PGND L13 - M13 - N13 - P13 - R13 - T13 -
J14 - K14 - L14 PGND M14 PGND N14 PGND P14 VOUT R14 VOUT T14 VOUT
J15 - K15 PGND L15 - M15 - N15 - P15 - R15 - T15 -
J16 - K16 - L16 PGND M16 PGND N16 PGND P16 VOUT R16 VOUT T16 VOUT
J17 - K17 PGND L17 - M17 - N17 - P17 - R17 - T17 -
J18 - K18 - L18 PGND M18 PGND N18 PGND P18 VOUT R18 VOUT T18 VOUT
J19 - K19 - L19 - M19 - N19 - P19 - R19 - T19 -
J20 - K20 - L20 PGND M20 PGND N20 PGND P20 VOUT R20 VOUT T20 VOUT
J21 - K21 - L21 - M21 - N21 - P21 - R21 - T21 -
J22 - K22 - L22 PGND M22 PGND N22 PGND P22 VOUT R22 VOUT T22 VOUT
J23 PGOOD K23 - L23 - M23 - N23 - P23 - R23 - T23 -
Pin Assignment Tables
(Arranged by Pin Number)
package DescripTion
LTM4600
24
4600fd
For more information www.linear.com/LTM4600
PIN NAME
G1 PGND
H7
H9
H11
H13
H15
H17
PGND
PGND
PGND
PGND
PGND
PGND
J1PGND
K7
K9
K11
K13
K15
K17
PGND
PGND
PGND
PGND
PGND
PGND
L2
L4
L6
L8
L10
L12
L14
L16
L18
L20
L22
PGND
PGND
PGND
PGND
PGND
PGND
PGND
PGND
PGND
PGND
PGND
M2
M4
M6
M8
M10
M12
M14
M16
M18
M20
M22
PGND
PGND
PGND
PGND
PGND
PGND
PGND
PGND
PGND
PGND
PGND
N2
N4
N6
N8
N10
N12
N14
N16
N18
N20
N22
PGND
PGND
PGND
PGND
PGND
PGND
PGND
PGND
PGND
PGND
PGND
PIN NAME
P2
P4
P6
P8
P10
P12
P14
P16
P18
P20
P22
VOUT
VOUT
VOUT
VOUT
VOUT
VOUT
VOUT
VOUT
VOUT
VOUT
VOUT
R2
R4
R6
R8
R10
R12
R14
R16
R18
R20
R22
VOUT
VOUT
VOUT
VOUT
VOUT
VOUT
VOUT
VOUT
VOUT
VOUT
VOUT
T2
T4
T6
T8
T10
T12
T14
T16
T18
T20
T22
VOUT
VOUT
VOUT
VOUT
VOUT
VOUT
VOUT
VOUT
VOUT
VOUT
VOUT
PIN NAME
A3
A5
A7
A9
A11
A13
VIN
VIN
VIN
VIN
VIN
VIN
B1 VIN
C10
C12
C14
VIN
VIN
VIN
D1 VIN
E10
E12
E14
VIN
VIN
VIN
F1 VIN
PIN NAME
A15 fADJ
A17 SVIN
A19 EXTVCC
A21 VOSET
B23 COMP
D23 SGND
F23 RUN/SS
G23 FCB
J23 PGOOD
Pin Assignment Tables
(Arranged by Pin Number)
package DescripTion
LTM4600
25
4600fd
For more information www.linear.com/LTM4600
Information furnished by Linear Technology Corporation is believed to be accurate and reliable.
How-
ever, no responsibility is assumed for its use. Linear Technology Corporation makes no representation
that the interconnection of its circuits as described herein will not infringe on existing patent rights.
revision hisTory
REV DATE DESCRIPTION PAGE NUMBER
D 6/14 Updated Order Information table.
Updated RUN/SS pin description.
Updated Soft-Start section.
2
7
13
(Revision history begins at Rev D)
LTM4600
26
4600fd
For more information www.linear.com/LTM4600
LINEAR TECHNOLOGY CORPORATION 2006
LT 0614 REV D • PRINTED IN USA
Linear Technology Corporation
1630 McCarthy Blvd., Milpitas, CA 95035-7417
(408) 432-1900 FAX: (408) 434-0507 www.linear.com/LTM4600
1.8V, 10A Regulator
4600 TA04
C1, C2: TDK C3216X5R1E106MT
C3: TAIYO YUDEN, JMK316BJ226ML-T501
C4: SANYO POSCAP, 4TPE470MCL
1.8V AT 10A
4.5V AT 20V
R1
100k
EXTVCC
RUN
COMP
FCB
VOUT
PGOOD
VOSET
SVIN
PGNDSGND
C1
10µF
25V
C2
10µF
25V
C5
100pF
C4
470µF
4V
PGOOD
C3
22µF
x3
VIN
LTM4600
fADJ
R2
49.9k
1%
+
This product contains technology licensed from Silicon Semiconductor Corporation. ®
Typical applicaTion
relaTeD parTs
PART NUMBER DESCRIPTION COMMENTS
LTM4649 16VIN, 10A Step-Down μModule Regulator 4.5V ≤ VIN ≤ 16V, 0.6V ≤ VOUT ≤ 3.3V, PLL Input, Remote Sense Amplifier, VOUT
tracking, 9mm × 15mm x 4.92mm BGA
LTM4641 38VIN, 10A Step-Down μModule Regulator
with Advanced Input & Load Protection
4.5V ≤ VIN ≤ 38V, 0.6V ≤ VOUT ≤ 6V, Adjustable Protection Trip Thresholds for Many
Faults: (Output Overvoltage, Input Overvoltage, Input Undervoltage, Overtemperature),
15mm × 15mm × 5.01mm BGA
LTM4633 Triple 10A, 16VIN Step-Down DC/DC μModule
Regulator
4.7V ≤ VIN ≤ 16V, 0.8V ≤ VOUT1,2 ≤ 1.8V, 0.8V ≤ VOUT3 ≤ 5.5V, PLL input, VOUT Soft-Start
and Tracking, PGOOD, Internal Temperature Monitor, 15mm × 15mm × 5.01mm BGA
LTM4627 20VIN, 15A DC/DC Step-Down μModule
Regulator
4.5V ≤ VIN ≤ 20V, 0.6V ≤ VOUT ≤ 5V, PLL Input, VOUT Tracking, Remote Sense Amplifier,
15mm × 15mm × 4.32mm LGA or 15mm × 15mm × 4.92mm BGA
LTM4611 1.5VIN(MIN), 15A DC/DC Step-Down μModule
Regulator
1.5V ≤ VIN ≤ 5.5V, 0.8V ≤ VOUT ≤ 5V, PLL Input, Remote Sense Amplifier, VOUT Tracking,
15mm × 15mm × 4.32mm LGA
LTM4613 36VIN, 8A EN55022 Class B DC/DC
Step-Down μModule Regulator
5V ≤ VIN ≤ 36V, 3.3V ≤ VOUT ≤ 15V, PLL Input, VOUT Tracking and Margining, 15mm ×
15mm × 4.32mm LGA
LTM8061 32V, 2A Step-Down μModule Battery Charger
with Programmable Input Current Limit
Compatible with Single Cell or Dual Cell Li-Ion or Li-Poly Battery Stacks (4.1V, 4.2V,
8.2V, or 8.4V), 4.95V ≤ VIN ≤ 32V, C/10 or Adjustable Timer Charge Termination, NTC
Resistor Monitor Input, 9mm × 15mm × 4.32mm LGA
LTM8045 Inverting or SEPIC μModule DC/DC
Converter with Up to 700mA Output Current
2.8V ≤ VIN ≤ 18V, ±2.5V ≤ VOUT ≤ ±15V, Synchronizable, No Derating or Logic Level Shift
for Control Inputs When Inverting, 6.25mm × 11.25mm × 4.92mm BGA
LTM8048 1.5W, 725VDC Galvanically Isolated µModule
Converter with LDO Post Regulator
3.1V ≤ VIN ≤ 32V, 2.5V ≤ VOUT ≤ 12V, 1mVP-P Output Ripple, Internal Isolated
Transformer, 9mm × 11.25mm × 4.92mm BGA
LTC2977 8-Channel PMBus Power System Manager 0.25% TUE 16-Bit ADC, Voltage/Temperature Monitoring and Supervision
LTC2974 4-Channel PMBus Power System Manager 0.25% TUE 16-Bit ADC, Voltage/Current/Temperature Monitoring and Supervision