2.9.2 HeartBeat™ Output
The QT100 output has a HeartBeat™ ‘health’ indicator
superimposed on it in both LP and SYNC modes. This
operates by taking the output pin into a three-state mode for
15µs once before every QT burst. This output state can be
used to determine that the sensor is operating properly, or, it
can be ignored using one of several simple methods.
The HeartBeat indicator can be sampled by using a pull-up
resistor on the OUT pin, and feeding the resulting
positive-going pulse into a counter, flip flop, one-shot, or
other circuit. The pulses will only be visible when the chip is
not detecting a touch.
If the sensor is wired to a microcontroller as shown in
Figure 2.7, the microcontroller can reconfigure the load
resistor to either VSS or VDD depending on the output state of
the QT100, so that the pulses are evident in either state.
Electromechanical devices like relays will usually ignore the
short Heartbeat pulse. The pulse also has too low a duty
cycle to visibly affect LEDs. It can be filtered completely if
desired, by adding an RC filter to the output, or if interfacing
directly and only to a high-impedance CMOS input, by doing
nothing or at most adding a small noncritical capacitor from
OUT to VSS.
2.9.3 Output Drive
The OUT pin is active high and can sink or source up to 2mA.
When a large value of Cs (>20nF) is used the OUT current
should be limited to <1mA to prevent gain-shifting side
effects, which happen when the load current creates voltage
drops on the die and bonding wires; these small shifts can
materially influence the signal level to cause detection
instability.
3 Circuit Guidelines
3.1 Application Note
Refer to Application Note AN-KD02, downloadable from the
Quantum website for more information on construction and
design methods. Go to http://www.qprox.com, click the
Support tab and then Application Notes.
3.2 Sample Capacitor
Charge sampler capacitor Cs should be a stable type, such
as X7R ceramic or PPS film. The normal Cs range is from
2nF to 50nF depending on the sensitivity required; larger
values of Cs demand higher stability to ensure reliable
sensing.
For more consistent sensing from unit to unit, 5% tolerance
capacitors are recommended. X7R ceramic types can be
obtained in 5% tolerance at little or no extra cost.
Values of Cs above 100nF will only be required for large
values of Cx. Sensing may become unstable if Cx is small
and Cs is large; for example, in attempting to implement
proximity fields.
3.3 Power Supply, PCB Layout
The power supply can range between 2.0V and 5.0V. At 3V
current drain averages less than 500µA in Fast mode.
If the power supply is shared with another electronic system,
care should be taken to assure that the supply is free of
digital spikes, sags, and surges which can adversely affect
the QT100. The QT100 will track slow changes in VDD, but it
can be badly affected by rapid voltage fluctuations. It is highly
recommended that a separate voltage regulator be used just
for the QT100 to isolate it from power supply shifts caused by
other components.
If desired, the supply can be regulated using a Low Dropout
(LDO) regulator, although such regulators often have poor
transient line and load stability. See Application Note
AN-KD02 (see Section 3.1) for further information on power
supply considerations.
Parts placement: The chip should be placed to minimize the
SNSK trace length to reduce low frequency pickup, and to
reduce stray Cx which degrades gain. The Cs and Rs
resistors (see Figure 1.1) should be placed as close to the
body of the chip as possible so that the trace between Rs
and the SNSK pin is very short, thereby reducing the
antenna-like ability of this trace to pick up high frequency
signals and feed them directly into the chip. A ground plane
can be used under the chip and the associated discretes, but
the trace from the Rs resistor and the electrode should not
run near ground to reduce loading.
For best EMC performance the circuit should be made
entirely with SMT components.
Electrode trace routing: Keep the electrode trace (and the
electrode itself) away from other signal, power, and ground
traces including over or next to ground planes. Adjacent
switching signals can induce noise onto the sensing signal;
any adjacent trace or ground plane next to, or under, the
electrode trace will cause an increase in Cx load and
desensitize the device.
Important Note: for proper operation a 100nF (0.1µF)
ceramic bypass capacitor must be used directly between
VDD and VSS, to prevent latch-up; the bypass capacitor
should be placed very close to the device’s power pins.
lQ
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QT100-ISG R3.06/0606