www.austriamicrosystems.com/LED-Driver-ICs/AS1119 Revision 1.03 1 - 31
Datasheet
AS1119
144-LED Cross-Plexing Driver with 320mA Charge-Pump
1 General Description
The AS1119 is a compact LED driver for 144 (90) single
LEDs. The devices can be programme d via an I²C com-
patible interface.
The AS1119 offers two blocks driving each 72 LEDs (3
blocks each 30LEDs) with 1/9 (1/6) cycle rate. The
required lines to drive all 144 (90 )LEDs are reduced to
18 by using the cross-plexing feature optimizing space
on the PCB. Every block driving 72(30) LEDs can be
analog dimmed from 1 to 30mA in 256 ste ps (8 bit).
Additionally each of the 144 (90) LEDs can be dimmed
individually with 8-bit allowing 256 steps of linear dim-
ming. To reduce CPU usage up to 6 frames can be
stored with individual time delays between frames to
play small animations automatically.
The AS1119 operates from 2.7V to 5.5V and includes a
320mA charge-pump to drive also white LEDs. The
charge-pump operates in 2:3 and 1:2 mode.
The AS1 119 features very low shutdown and operational
current.
The device is available in a ultrasmall 36-pin WL-CSP.
Figure 1. AS1119 - Typical Application Diagram
2 Key Features
1MHz I²C-Compatible Interface
Open and Shorted LED Error Detection
- Global Detection of Shorts
- Global Detection of Opens
144 LEDs in Dot Matrix
Low-Power Shutdown Current
Individual 8-bit LED PWM Control
8-bit Analog Brightness Control
(1:1), 2:3, 1:2 320mA Charge Pump
6 Frames Memory for Animations
Supply Voltage Range: 2.7V to 5.5V
Minimum PCB space required
36-pin WL-CSP package
3 Applications
The AS1119 is ideal for dot matrix displays in mobile
phones, personal electronic and toys.
AS1119
VDD
2.7V to 5.5V
9
SDA
SCL
µP
9
VCP
AS1119
VDD
99
VCP 2.2µF
2.2µF
4.7µF
1µF 1µF 1µF 1µF
RSTN
4.7µF
4.7µF
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AS1119
Datasheet - Pin o u t
4 Pinout
Pin Assignments
Figure 2. Pin Assignments (Top View)
Pin Descriptions
Table 1. Pin Descriptions
Pin Name Pin Number Description
VDD1, VDD2,
VDD3 A6, E5, E1 Positive Supply Voltage. Connect to a +2.7V to +5.5V supply. Bypass this pin with
10µF capacitance to GND1, GND2, GND3.
VCP F1 Charge-Pump Output Voltage. Conn e c t a 2. 2µ F capacitor to GND3.
C1-, C1+ B1, C1 Flying Cap 1. Connect a 1µF capacitor.
C2-, C2+ A1, D1 Flying Cap 2. Connect a 1µF capacitor.
GND1 B5 Ground for VDD1. Used for CS0-CS8
GND2 F5 Ground for VDD2. Used for CS9-CS17
GND3 A2 Ground for VDD3. Used for Charge-Pump
SDA C6 Serial-Data I/O. Open drain digital I/O I²C data pin.
SCL D6 Serial-Clock Input.
AD0 C5 I²C Address for bit 0. Put to GND or VDD to set I²C addresses.
AD1 D5 I²C Address for bit 1. Put to GND or VDD to set I²C addresses.
RSTN F6 Reset Input. Pull this pin to logic low to reset all control registers (set to default
values) and to put the device into power-down. For normal operation pull this pin to
VDD.
SYNC_IN,
SYNC_OUT B6 Synchronization Clock Input or Output
IRQ E6 Interrupt Request. Open drain digital Output.
C2- GND3 CS2 CS1
A1 A2 A3 A4
CS5 CS4 CS3
B1 B2 B3 B4
C1+ CS8 CS7 CS6
C1 C2 C3 C4
C2+ CS11 CS10 CS9
D1 D2 D3 D4
VDD3 CS14 CS13 CS12
E1 E2 E3 E4
VCP CS17 CS16 CS15
F1 F2 F3 F4
CS0
A5
GND1
B5
AD0
C5
AD1
D5
VDD2
E5
GND2
F5
VDD1
A6
SYNC_IN/
SYNC_OUT
B6
SDA
C6
SCL
D6
IRQ
E6
RSTN
F6
C1-
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AS1119
Datasheet - Pin o u t
CS0 - CS8 A5-A3, B4-B2,
C4-C2
2 Matrixes
Sinks and Sources for 72 LEDs each matrix.
CS9 - CS17 D4-D2, E4-
E2, F4-F2
CS0 - CS5 A5-A3, B4-B2
3 Matrixes
Sinks and Sources for 30 LEDs each matrix.
CS6 - CS11 C4-C2, D4-D2
CS12 - CS17 E4-E2, F4-F2
Table 1. Pin Descriptions
Pin Name Pin Number Description
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AS1119
Datasheet - Ab so lu te Ma xi mu m R at in gs
5 Absolute Maximum Ratings
Stresses beyond those listed in Table 2 may cause permanent damage to the device. These are stress ratings only,
and functional operation of the device at these or any other conditions beyond those indicated in Sectio n 6 Electrical
Characteristics on page 5 is not implied. Exposure to absolute maximum rating conditions for extended periods may
affect device reliability.
Table 2. Absolute Maximum Ratings
Parameter Min Max Units Notes
Input Voltage Range VDD to GND -0.3 7 V
All other pins to GND -0.3 7 or
VDD + 0.3 V
Current Sink Current 500 mA
Segment Current 100 mA
Humidity 5 85 % Non-condensing
Electrostatic Discharge 1.5 kV HBM MIL 833 E method 3015
Latch-Up Immunity ±100 mA EIA/JESD78
Ambient Temperature -40 +85 ºC
Junction Temperature +125 ºC
Storage Temperature -55 +125 ºC
Package Body Temperature +260 ºC
The reflow peak soldering
temperature (body temperature)
specified is in accordance with IPC/
JEDEC J-STD-020 “Moisture/
Reflow Sensitivity Classification for
Non-Hermetic Solid State Surface
Mount Devices”.
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AS1119
Datasheet - Ele c t r i c a l C h a r a c t e r i s t i c s
6 Electrical Characteristics
VDD = 2.7V to 5.5V, TAMB = -40°C to +85°C,
typ. values are at
TAMB
= +25ºC
(unless otherwise specified) .
Table 3. Electrical Characteristics
Symbol Parameter Conditions Min Typ Max Unit
VDD Operating Supply Voltage 2.7 5.5 V
IDDSD Software Shutdown Supply Current All digital inputs at VDD or GND,
VDD = 5.5V, TAMB = +25ºC 7µA
IDDFSD Full Shutdown Supply Current Pin RSTN = 0V, TAMB = +25ºC 0.1 1 µA
IDD Operating Supply Current
(all current sources turned off)
CP disabled @ VDD = 5.5V 1.4
mA
With CP in 2:3 mode
@ VDD = 2.7V 3
With CP in 1:2 mode
@ VDD = 2.7V 4
ISTART max. Peak Inrush Current 1.5 A
max. DC Current 700 mA
IDIGIT Digit Drive Sink Current
(Drive capability of all sources of one
digit1,2)
1. Not all sources are allowed to be fully on at the same time.
2. guaranteed by design
CP disabled 500 mA
CP enabled VDD < 3.3V 160
VDD ≥ 3.3V 320
ISEG Segment Drive Source Current LED VOUT = 1.8V to VDD-400mV 28 30 32 mA
ΔISEG Segment Drive Current Matching
LED 3
3.
2%
VDSSAT Saturation Voltage Current = 30mA, VDD = 5V 100 mV
RDSON(N) Resistance for NMOS 0.5 1 Ω
fOSC Oscillator Frequency 0.911.1MHz
fREFRESH Display Scan Rate 2 time 9x8 matrixes 0.39 0.43 0.48 kHz
Table 4. Logic Inputs/Outputs Characteristics
Symbol Parameter Conditions Min Typ Max Unit
IIH, IIL Logic Input Current VIN = 0V or VDD -1 1 µA
VIH Logic High Input Voltage 1.6 V
VIL Logic Low Input Voltage 0.6 V
ΔVIHysteresis Voltage 0.1 V
VOL(SDA) SDA Output Low Voltage ISINK = 3mA 0.4 V
VOL(IRQ) IRQ Output Low Voltage ISINK = 3mA 0.4 V
VOL(SYNC
_OUT) Sync Clock Output Low Voltage ISINK = 1mA 0.4 V
VOH(SYNC
_OUT) Sync Clock Output High Voltage ISOURCE = 1mA VDD-0.4 V
Open Detection Level Threshold VDD-0.4 VDD-
0.1 V
Short Detection Level Threshold 0.9 1.2 V
Capacitive Load for Each Bus Line SCL Frequency = 400kHz 400 pF
SCL Frequency = 1000kHz 100
ISEG Imax Imin
–
Imax Imin
+
---------------------------100×=
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AS1119
Datasheet - Ele c t r i c a l C h a r a c t e r i s t i c s
Notes:
1. The Min / Max values of the Timing Characteristics are guaranteed by design.
2. All limits are guaranteed. The parameters with min and max values are guaranteed with production tests or SQC
(Statistical Quality Control) methods.
Figure 3. Timing Diagram
Table 5. I²C Timing Characteristics
Symbol Parameter Conditions Min Typ Max Unit
fSCL SCL Frequency 100 1000 kHz
tBUF Bus Free Time Between STOP and START
Conditions 1.3 µs
tHOLDSTART Hold Time for Repeated
START Condition 160 ns
tLOW SCL Low Period 50 75 ns
tHIGH SCL High Period 50 75 ns
tSETUPSTART Setup Time for Repeated
START Condition 100 ns
tSETUPDATA Data Setup Time 10 ns
tHOLDDATA Data Hold Time 70 ns
tRISE(SCL) SCL Rise Time 10 40 ns
tRISE(SCL1) SCL Rise Time after Repeated START Condition
and After an ACK Bit 10 80 ns
tFALL(SCL) SCL Fall Time 10 40 ns
tRISE(SDA) SDA Rise Time 20 80 ns
tFALL(SDA) SDA Fall Time 20 80 ns
tSETUPSTOP STOP Condition Setup Time 160 ns
tSPIKESUP Pulse Width of Spike Suppressed 50 ns
Repeated
START
SDI
SCL
STARTSTOP
tBUF
tLOW
tHOLDSTART
tHOLDDATA
tR
tHIGH
tF
tSETUPDATA
tHOLDSTART tSPIKESUP
tSETUPSTOP
tSETUPSTART
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AS1119
Datasheet - Ty p i c a l O p e r a t i n g C h a r a c t e r i s t i c s
7 Typical Operating Characteristics
Figure 4. Segment Drive Current vs. Supply Voltage Figure 5. Segment Drive Current vs. Temperature
28
28.5
29
29.5
30
30.5
31
2.7 2.9 3.1 3.3 3.5 3.7 3.9
S upply Voltage (V)
S egm ent Driv e S ource Current (m A )
+25° C
-45°C
+85° C 28
28.5
29
29.5
30
30.5
31
-45 -25 -5 15 35 55 75
T e mperatur e ( °C)
S egm ent Driv e S ource Current (m A )
Vdd = 2.7V
Vdd = 3.0V
Vdd = 3.3V
Vdd = 4.0V
Figure 6. Segm en t D r ive Current vs. Output Voltage Figure 7. RONNMOS vs. Supply Voltage
28
28.5
29
29.5
30
30.5
31
1.6 2 2.4 2.8 3.2 3.6 4 4.4 4.8 5.2
Output Voltage (V )
S egm ent Driv e S ource Current (m A )
Vdd = 2.7V
Vdd = 3.3V
Vdd = 4.0V
Vdd = 5.5V 0
0.1
0.2
0.3
0.4
0.5
0.6
0.7
0.8
0.9
1
2.7 3.1 3.5 3.9 4.3 4.7 5.1 5.5
Supply Volt age (V)
RonNMOS ( )
-45°C
+25° C
+85° C
Ω
Figure 8. Open Detection Level vs. Supp ly Voltage Figure 9. Short Detection Level vs. Supply Voltage
0
50
100
150
200
250
300
2.7 3.1 3.5 3.9 4.3 4.7 5.1 5.5
Supply Voltage ( V)
Open Detection Level ( m V )
-45 °C
+25° C
+85° C
0.7
0.75
0.8
0.85
0.9
0.95
1
1.05
1.1
2.7 3.1 3.5 3.9 4.3 4.7 5.1 5.5
S upply Voltage (V)
Shor t Detection Level ( V )
-45°C
+25° C
+85° C
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AS1119
Datasheet - Ty p i c a l O p e r a t i n g C h a r a c t e r i s t i c s
Figure 10. Efficiency vs. Supply Voltage Figure 11. Logic Input Voltage Levels
0
10
20
30
40
50
60
70
80
90
100
2.7 3.1 3.5 3.9 4.3 4.7 5.1 5.5
S upply Voltage (V)
Efficiency (%)
PWM = 0x255
PWM = 0x128
PWM = 0x64
1:1 Mode
1:1.5 Mode
1:2 Mode
0
0.5
1
1.5
2
2.7 3.1 3.5 3.9 4.3 4.7 5.1 5.5
Supply Voltage (V)
Logic Input V o ltage Lev el ( V
)
Logic High
Logic Low
Figure 12. Charge Pump Voltage vs. Supply Voltage
1
2
3
4
5
6
7
2.7 3.1 3.5 3.9 4.3 4.7 5.1 5.5
S upply Voltage (V)
Charge P um p V oltage (V )
PWM = 0x255
PWM = 0x128
PWM = 0x64
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AS1119
Datasheet - D et a i l e d De s c r i p t i o n
8 Detailed Description
Block Diagram
Figure 13. AS1119 - Block Diagram
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AS1119
Datasheet - D et a i l e d De s c r i p t i o n
I²C Interface
The AS1119 supports the I²C serial bus and data transmission protocol in fast mode at 1MHz. The AS1119 operates as
a slave on the I²C bus. The bus must be controlled by a master device that generates the serial clock (SCL), controls
the bus access, and generates the START and STOP conditions. Connections to the bus are made via the open-drain
I/O pins SCL and SDA.
Figure 14. I²C Interface Initialisation
Figure 15. Bus Protocol
The bus protocol (as shown in Figure 15) is defined as:
- Data transfer may be initiated only when the bus is not busy.
- During data transfer, the data line must remain stable whenever the clock line is HIGH. Changes in the data line
while the clock line is HIGH will be interprete d as contro l signals.
The bus conditions are defined as:
-Bus Not Busy. Data and clock lines remain HIGH.
-St art Dat a T ransfer. A change in the state of the data line, from HIGH to LOW , while the clock is HIGH, defines a
START condition.
-Stop Data Transfer. A change in the state of the data line, from LOW to HIGH, while the clock line is HIGH,
defines the STOP condition.
-Data Valid. The state of the data line represents valid data, when, after a START condition, the data line is stable
for the duration of the HIGH period of the clock signal. There is one clock pulse per bit of data.
Each data transfer is initiated with a START condition and terminated with a STOP condition. The number of data
bytes transferred between START and STOP conditions is not limited and is determined by the master device.
The information is transferred byte-wise and each receiver acknowledges with a ninth-bit.
Within the I²C bus specifications a high-speed mode (3.4MHz clock rate) is defined.
-Acknowledge: Each receiving device, when addressed, is obliged to generate an acknowledge after the recep-
tion of each byte. The master device must generate an extra clock pulse that is associated with this acknowledge
bit. A device that acknowledges must pull down the SDA line during the acknowledge clock pulse in such a way
that the SDA line is stable LOW during the HIGH period of the acknowledge clock pulse. Of course, setup and
hold times must be taken into account. A master must signal an end of data to the slave by not generating an
1981 98
1
0011 A1 A0 R/W D15 D14 D13 D12 D11 D10 D9 D8
A0 and A1 are defined by the pins AD0 and AD1. Pin AD0 and AD1 must not be left floating.
SCL
SDA
SDI
SCL
Slave Address R/W
Direction Bit
START
1 2 6 7 8 9 1 23-88 9
ACK
MSB
Repeat if More Bytes Transferred STOP or
Repeated
START
ACK from
Receiver
ACK from
Receiver
ACK
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AS1119
Datasheet - D et a i l e d De s c r i p t i o n
acknowledge bit on the last byte that has been clocked out of the slave. In this case, the slave must leave the
data line HIGH to enable the master to generate the STOP condition.
-Figure 15 on page 10 details how data transfer is accomplished on the I²C bus. Depending upon the state of the
R/W bit, two types of data transfer are possible:
-Master T ransmitter to Slave Receiver. The first byte transmitted by the master is the slave address, followed by
a number of data bytes. The slave returns an acknowledge bit after the slave address and each received byte.
-Slave T ransmitter to Master Receiver . The first byte, the slave address, is transmitted by the master . The slave
then returns an acknowledge bit. Next, a number of data bytes are transmitted by the slave to the master. The
master returns an acknowledge bit after all received bytes other than the last byte. At the end of the last received
byte, a not-acknowledge is returned. Th e master device generates all of the serial clock pulses and th e START
and STOP conditions. A transfer is ended with a STOP condition or a repeated START condition. Since a
repeated START condition is also the beginning of the next serial transfer, the bus will not be released.
The AS1119 can operate in the following slave modes:
-Slave Receiver Mode. Serial data and clock are received through SDA and SCL. After each byte is received, an
acknowledge bit is transmitted. START and STOP conditions are recognized as the beginning and end of a serial
transfer. Address recognition is performed by hardware after reception of the slave address and direction bit.
-Slave Transmitter Mode. The first byte (the slave address) is received and handled as in the slave receiver
mode. However, in this mode the direction bit will indicate that the transfer direction is reversed. Serial data is
transmitted on SDA by the AS1119 while the serial clock is input on SCL. START and STOP conditions are recog-
nized as the beginning and end of a serial transfer.
I²C Device Address Byte
The address byte (see Figure 16) is the first byte received following the START condition from the maste r device.
Figure 16. I²C Device Ad dress Byte
- The bit 1 and bit 2 of the address byte are the device select pins AD0 and AD1, which must be set to VDD or to
GND. A maximum of four devices with the same pre-set code can therefore be connected on the same bus at
one time.
- The last bit of the address byte (R/W) define the operation to be performed. When set to a 1 a read operation is
selected; wh en set to a 0 a write operation is selected.
Following the ST AR T condition, the AS1119 monitors the I²C bus, checking the device type identifier being transmitted.
Upon receiving the addres s code, and the R/W bit, the slave device outputs an acknowledge signal on the SDA line.
01110AD1 AD0 R/W
MSB654321LSB
address:
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AS1119
Datasheet - D et a i l e d De s c r i p t i o n
Command Byte
The AS1119 operation, (see Table 15 on page 22) is determined by a command byte (see Table 17).
Figure 17. Command Byte
Figure 18. Command and Single Data Byte received by AS1119
Figure 19. Setting the Pointer to a Address Register to select a Data Register for a Read Operation
Figure 20. Rea din g n Byte s fro m AS1119
A7 A6 A5 A4 A3 A2 A1 A0
MSB654321LSB
From Master to Slave
From Slave to Master
AAPAS Command Byte Data ByteSlave Address
A6 A5 A4 A3 A2 A1 A0A7 D6 D5 D4 D3 D2 D1 D0D7
Acknowledge
from AS1119
0 00 Acknowledge
from AS1119
Acknowledge
from AS1119
R/W
0
AS1119 Registers
Autoincrement
Memory Word
Address
1 Byte
From Master to Slave
From Slave to Master
APAS Command Byte
Slave Address
A6 A5 A4 A3 A2 A1 A0A7
00 Acknowledge
from AS1119
Acknowledge
from AS1119
R/W
0
AS1119 Registers
From Master to Slave
From Slave to Master
A/APAS First Data Byte Second Data ByteSlave Address
D6 D5 D4 D3 D2 D1 D0D7 D6 D5 D4 D3 D2 D1 D0D7
Not Acknowledge
from Master
0 10 Acknowledge
from Master
Acknowledge
from AS1119
R/W
1
AS1119 Registers
Autoincrement
Memory Word
Address
n Bytes
Autoincrement
to next address
Stop reading
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AS1119
Datasheet - D et a i l e d De s c r i p t i o n
Initial Power-Up
On initial power-up, the AS1119 registers are reset to their default values, the display is blanked, and the device goes
into shutdown mode. At this time, all registers should be programmed for normal operation.
Note: The default settings enable only scanning of one digit; the internal decoder is disabled and the Intensity Control
Register (see page 17) and (see page 21) is set to the minimum values.
Shutdown Mode
The AS1 119 device features two different shutdown modes. A software shutdown via shutdown register (see Shutdown
Register (0x0A) on page 27) and a hardware shutdown via the RSTN pin.
The software shutdown disables all LED’s and stops the internal operation of the logic. A shutdown mode via the
RSTN pin additionally powers down the power-on-reset (PO) of the device. In this shutdown mode the AS1119 con-
sumes only 100nA (typ.).
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AS1119
Datasheet - R egi s t e r D e s c r i p t i o n
9 Register Description
Register Selection
Within this register the access to one of the RAM sections or to the Control registe r is selected. After one section is
selected this section is valid as long as an other se ction is selected.
Data Definition of the single frames
One frame consits of 2 blocks (à 8x9 LED-matrix) or 3 blocks (à 5x6 LED-matrix). This configuration is set in the
AS1119 config register (see Table 20 on page 25).
In the internal DPRAM of the device 6 frames can be stored. For each frame the following parameters have to be
stored.
- LED is ON or OFF.
- LED is steady ON or blinking.
- The intensity of every single LED can be set via a 8 bits PWM.
Note: After power-up the data in the DPRAM is undefined (either ‘0’ or ‘1’).
2 Blocks with 8x9 LED Matrix
The AS1119 can be configured to control two seperated blocks of LEDs matrixes. This must be set via the bit D0 in the
AS1119 config register (see AS1119 Config Register (0x04) on page 25).
Figure 21. 8x9 LED Matrix with two blocks
Table 6. Register Selection Address Map
Register
Section Address Data Description
HEX A7 A6 A5 A4 A3 A2 A1 A0 HEX D7 D6 D5 D4 D3 D2 D1 D0
NOP
25311111101
0 00000000 No operation
Data Frame 0 1 00000001
Selection of
RAM section for
frame
Data Frame 1 2 00000010
Data Frame 2 3 00000011
Data Frame 3 4 00000100
Data Frame 4 5 00000101
Data Frame 5 6 00000110
Control
Register 1100001011 Selection of
Control Register
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AS1119
Datasheet - R egi s t e r D e s c r i p t i o n
The adress structure (as shown in Table 7) within on frame is always the same independent which frame was selected
via the register selection (see Table 6 on page 14).
In Table 8 it’s described which databit represents which LED in the matrix. Per default all databits are ‘0’, meaning no
LED is on. A ‘1’ puts the LED on.
Table 7. Dataframe Adress Structure for 2 Matrixes
Adresses within frame (HEX code)
Current Source On / Off Blink Intensity
Matrix A Matrix B Matrix A Matrix B Matrix A Matrix B Matrix A Matrix B
CS0 CS9 0x00 0x01 0x12 0x13 0x24-0x2B 0x2C-0x33
CS1 CS10 0x02 0x03 0x14 0x15 0x34-0x3B 0x3C-0x43
CS2 CS11 0x04 0x05 0x16 0x17 0x44-0x4B 0x4C-0x53
CS3 CS12 0x06 0x07 0x18 0x19 0x54-0x5B 0x5C-0x63
CS4 CS13 0x08 0x09 0x1A 0x1B 0x64-0x6B 0x6C-0x73
CS5 CS14 0x0A 0x0B 0x1C 0x1D 0x74-0x7B 0x7C-0x83
CS6 CS15 0x0C 0x0D 0x1E 0x1F 0x84-0x8B 0x8C-0x93
CS7 CS16 0x0E 0x0F 0x20 0x21 0x94-0x9B 0x9C-0xA3
CS8 CS17 0x10 0x11 0x22 0x22 0xA4-0xAB 0xAC-0xB3
Table 8. LEDs ON/OFF Register Format for 2 Matrixes Setup
Matrix Current
Source Adress Data
HEX A7 A6 A5 A4 A3 A2 A1 A0 D7 D6 D5 D4 D3 D2 D1 D0
A CS0 0x0000000000
LED
7LED
6LED
5LED
4LED
3LED
2LED
1LED
0
BCS9 0x01 00000001LED
15 LED
14 LED
13 LED
12 LED
11 LED
10 LED
9LED
8
A CS1 0x0200000010
LED
23 LED
22 LED
21 LED
20 LED
19 LED
18 LED
17 LED
16
BCS10 0x03 00000011LED
31 LED
30 LED
29 LED
28 LED
27 LED
26 LED
25 LED
24
A CS2 0x0400000100
LED
39 LED
38 LED
37 LED
36 LED
35 LED
34 LED
33 LED
32
BCS11 0x05 00000101LED
47 LED
46 LED
45 LED
44 LED
43 LED
42 LED
41 LED
40
A CS3 0x0600000110
LED
55 LED
54 LED
53 LED
52 LED
51 LED
50 LED
49 LED
48
BCS12 0x07 00000111LED
63 LED
62 LED
61 LED
60 LED
59 LED
58 LED
57 LED
56
A CS4 0x0800001000
LED
71 LED
70 LED
69 LED
68 LED
67 LED
66 LED
65 LED
64
BCS13 0x09 00001001LED
79 LED
78 LED
77 LED
76 LED
75 LED
74 LED
73 LED
72
A CS5 0x0A00001010
LED
87 LED
86 LED
85 LED
84 LED
83 LED
82 LED
81 LED
80
BCS14 0x0B 00001011LED
95 LED
94 LED
93 LED
92 LED
91 LED
90 LED
89 LED
88
A CS60x0C00001100
LED
103 LED
102 LED
101 LED
100 LED
99 LED
98 LED
97 LED
96
BCS15 0x0D 00001101LED
111 LED
110 LED
109 LED
108 LED
107 LED
106 LED
105 LED
104
A CS7 0x0E00001110
LED
119 LED
118 LED
117 LED
116 LED
115 LED
114 LED
113 LED
112
BCS16 0x0F 00001111LED
127 LED
126 LED
125 LED
124 LED
123 LED
122 LED
121 LED
120
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AS1119
Datasheet - R egi s t e r D e s c r i p t i o n
In the blink register (see Table 9) every single LED can be set to blink. The blink period is set in the display option reg-
ister (see Display Option Register (0x03) on page 24).
A CS8 0x1000010000
LED
135 LED
134 LED
133 LED
132 LED
131 LED
130 LED
129 LED
128
BCS17 0x11 00010001LED
143 LED
142 LED
141 LED
140 LED
139 LED
138 LED
137 LED
136
Table 9. LEDs Blink Register Format for 2 Matrixes Setup
Matrix Current
Source Adress Data
HEX A7 A6 A5 A4 A3 A2 A1 A0 D7 D6 D5 D4 D3 D2 D1 D0
A CS0 0x1200010010
LED
7LED
6LED
5LED
4LED
3LED
2LED
1LED
0
BCS9 0x13 00010011LED
15 LED
14 LED
13 LED
12 LED
11 LED
10 LED
9LED
8
A CS1 0x1400010100
LED
23 LED
22 LED
21 LED
20 LED
19 LED
18 LED
17 LED
16
BCS10 0x15 00010101LED
31 LED
30 LED
29 LED
28 LED
27 LED
26 LED
25 LED
24
A CS2 0x1600010110
LED
39 LED
38 LED
37 LED
36 LED
35 LED
34 LED
33 LED
32
BCS11 0x17 00010111LED
47 LED
46 LED
45 LED
44 LED
43 LED
42 LED
41 LED
40
A CS3 0x1800011000
LED
55 LED
54 LED
53 LED
52 LED
51 LED
50 LED
49 LED
48
BCS12 0x19 00011001LED
63 LED
62 LED
61 LED
60 LED
59 LED
58 LED
57 LED
56
A CS4 0x1A00011010
LED
71 LED
70 LED
69 LED
68 LED
67 LED
66 LED
65 LED
64
BCS13 0x1B 00011011LED
79 LED
78 LED
77 LED
76 LED
75 LED
74 LED
73 LED
72
A CS50x1C00011100
LED
87 LED
86 LED
85 LED
84 LED
83 LED
82 LED
81 LED
80
BCS14 0x1D 00011101LED
95 LED
94 LED
93 LED
92 LED
91 LED
90 LED
89 LED
88
A CS6 0x1E00011110
LED
103 LED
102 LED
101 LED
100 LED
99 LED
98 LED
97 LED
96
BCS15 0x1F 00111111LED
111 LED
110 LED
109 LED
108 LED
107 LED
106 LED
105 LED
104
A CS7 0x2000100000
LED
119 LED
118 LED
117 LED
116 LED
115 LED
114 LED
113 LED
112
BCS16 0x21 00100001LED
127 LED
126 LED
125 LED
124 LED
123 LED
122 LED
121 LED
120
A CS8 0x2200100010
LED
135 LED
134 LED
133 LED
132 LED
131 LED
130 LED
129 LED
128
BCS17 0x23 00100011LED
143 LED
142 LED
141 LED
140 LED
139 LED
138 LED
137 LED
136
Table 8. LEDs ON/OFF Register Format for 2 Matrixes Setup
Matrix Current
Source Adress Data
HEX A7 A6 A5 A4 A3 A2 A1 A0 D7 D6 D5 D4 D3 D2 D1 D0
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AS1119
Datasheet - R egi s t e r D e s c r i p t i o n
In the intensity register (see Table 10) the brightness of every single LED can bes set via a 8bit PWM (255 steps).
Table 10. LEDs Intensity Register Format for 2 Matrixes Setup
Matrix Current
Source Adress Data
HEX A7 A6 A5 A4 A3 A2 A1 A0 D7 D6 D5 D4 D3 D2 D1 D0
ACS0
LED00x2400100100
255 steps for intensity each single
LED
LED10x2500100101
LED20x2600100110
LED30x2700100111
LED40x2800101000
LED50x2900101001
LED60x2A00101010
LED70x2B00101011
BCS9
LED8 0x2C 00101100
LED9 0x2D 00101101
LED10 0x2E 00101110
LED11 0x2F 00101111
LED12 0x30 00110000
LED13 0x31 00110001
LED14 0x32 00110010
LED15 0x33 00110011
ACS1
LED160x3400110100
255 steps for intensity each single
LED
LED170x3500110101
LED180x3600110110
LED190x3700110111
LED200x3800111000
LED210x3900111001
LED220x3A00111010
LED230x3B00111011
BCS10
LED24 0x3C 00111100
LED25 0x3D 00111101
LED26 0x3E 00111110
LED27 0x3F 00111111
LED28 0x40 01000000
LED29 0x41 01000001
LED30 0x42 01000010
LED31 0x43 01000011
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AS1119
Datasheet - R egi s t e r D e s c r i p t i o n
ACS2
LED320x4401000100
255 steps for intensity each single
LED
LED330x4501000101
LED340x4601000110
LED350x4701000111
LED360x4801001000
LED370x4901001001
LED380x4A01001010
LED390x4B01001011
BCS11
LED40 0x4C 01001100
LED41 0x4D 01001101
LED42 0x4E 01001110
LED43 0x4F 01001111
LED44 0x50 01010000
LED45 0x51 01010001
LED46 0x52 01010010
LED47 0x53 01010011
.......................................
ACS8
LED1280xA410100100
255 steps for intensity each single
LED
LED1290xA510100101
LED1300xA610100110
LED1310xA710100111
LED1320xA810101000
LED1330xA910101001
LED1340xAA10101010
LED1350xAB10101011
BCS17
LED136 0xAC 10101100
LED137 0xAD 10101101
LED138 0xAE 10101110
LED139 0xAF 10101111
LED140 0xB0 10110000
LED141 0xB1 10110001
LED142 0xB2 10110010
LED143 0xB3 10110011
Table 10. LEDs Intensity Register Format for 2 Matrixes Setup
Matrix Current
Source Adress Data
HEX A7 A6 A5 A4 A3 A2 A1 A0 D7 D6 D5 D4 D3 D2 D1 D0
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AS1119
Datasheet - R egi s t e r D e s c r i p t i o n
3 Blocks with 5x6 LED Matrix
The AS1119 can be configured to control three seperated blocks of LEDs matrixes. This must be set via the bit D0 in
the AS1119 config register (see AS1119 Config Register (0x04) on page 25).
Figure 22. 5x6 LED Matrix with 3 Matrixes
In Table 12 it’s described which databit represents which LED in the matrix. Per default all databits are ‘0’, meaning no
LED is on. A ‘1’ puts the LED on.
Note: LED A01 is the first LED of the Current Source 0 in the Matrix A. LED B01 is the first LED of the Current
Source 6 in the Matrix B. and so on.
Table 11. Dataframe Adress Structure for 3 Matrixes
Adresses (HEX code)
Current Source On / Off Blink Intensity
Matrix Matrix Matrix Matrix
ABC A BCABCABC
CS0 CS6 CS12 0x00 0x01 0x12 0x13 0x24-0x2B 0x2C-0x33
CS1 CS7 CS13 0x02 0x03 0x14 0x15 0x34-0x3B 0x3C-0x43
CS2 CS8 CS14 0x04 0x05 0x16 0x17 0x44-0x4B 0x4C-0x53
CS3 CS9 CS15 0x06 0x07 0x18 0x19 0x54-0x5B 0x5C-0x63
CS4 CS10 CS16 0x08 0x09 0x1A 0x1B 0x64-0x6B 0x6C-0x73
CS5 CS11 CS17 0x0A 0x0B 0x1C 0x1D 0x74-0x7B 0x7C-0x83
Table 12. LEDs ON/OFF Register Fo rmat for 3 Matrixes Setup
Current
Source Adress Data
HEX A7 A6 A5 A4 A3 A2 A1 A0 D7 D6 D5 D4 D3 D2 D1 D0
CS0,
CS6,
CS12
0x0000000000
LED
7LED
6LED
5LED
4LED
3LED
2LED
1LED
0
0x0100000001X
LED
14 LED
13 LED
12 LED
11 LED
10 LED
9LED
8
CS1,
CS7,
CS13
0x0200000010
LED
23 LED
22 LED
21 LED
20 LED
19 LED
18 LED
17 LED
16
0x0300000011X
LED
30 LED
29 LED
28 LED
27 LED
26 LED
25 LED
24
CS2,
CS8,
CS14
0x0400000100
LED
39 LED
38 LED
37 LED
36 LED
35 LED
34 LED
33 LED
32
0x0500000101X
LED
46 LED
45 LED
44 LED
43 LED
42 LED
41 LED
40
Matrix A Matrix B Matrix C
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AS1119
Datasheet - R egi s t e r D e s c r i p t i o n
In the blink register (see Table 13) every single LED can be set to blink. The blink perio d is set in the display optio n reg-
ister (see Display Option Register (0x03) on page 24).
CS3,
CS9,
CS15
0x0600000110
LED
55 LED
54 LED
53 LED
52 LED
51 LED
50 LED
49 LED
48
0x0700000111X
LED
62 LED
61 LED
60 LED
59 LED
58 LED
57 LED
56
CS4,
CS10,
CS16
0x0800001000
LED
71 LED
70 LED
69 LED
68 LED
67 LED
66 LED
65 LED
64
0x0900001001X
LED
78 LED
77 LED
76 LED
75 LED
74 LED
73 LED
72
CS5,
CS11,
CS17
0x0A00001010
LED
87 LED
86 LED
85 LED
84 LED
83 LED
82 LED
81 LED
80
0x0B00001011X
LED
94 LED
93 LED
92 LED
91 LED
90 LED
89 LED
88
Table 13. LEDs Blink Register Format for 3 Matrixes Setu p
Current
Source Adress Data
HEX A7 A6 A5 A4 A3 A2 A1 A0 D7 D6 D5 D4 D3 D2 D1 D0
CS0,
CS6,
CS12
0x1200000000
LED
7LED
6LED
5LED
4LED
3LED
2LED
1LED
0
0x1200000001X
LED
14 LED
13 LED
12 LED
11 LED
10 LED
9LED
8
CS1,
CS7,
CS13
0x1400000010
LED
23 LED
22 LED
21 LED
20 LED
19 LED
18 LED
17 LED
16
0x1500000011X
LED
30 LED
29 LED
28 LED
27 LED
26 LED
25 LED
24
CS2,
CS8,
CS14
0x1600000100
LED
39 LED
38 LED
37 LED
36 LED
35 LED
34 LED
33 LED
32
0x1700000101X
LED
46 LED
45 LED
44 LED
43 LED
42 LED
41 LED
40
CS3,
CS9,
CS15
0x1800000110
LED
55 LED
54 LED
53 LED
52 LED
51 LED
50 LED
49 LED
48
0x1900000111X
LED
62 LED
61 LED
60 LED
59 LED
58 LED
57 LED
56
CS4,
CS10,
CS16
0x1A00001000
LED
71 LED
70 LED
69 LED
68 LED
67 LED
66 LED
65 LED
64
0x1B00001001X
LED
78 LED
77 LED
76 LED
75 LED
74 LED
73 LED
72
CS5,
CS11,
CS17
0x1C00001010
LED
87 LED
86 LED
85 LED
84 LED
83 LED
82 LED
81 LED
80
0x1D00001011X
LED
94 LED
93 LED
92 LED
91 LED
90 LED
89 LED
88
Table 12. LEDs ON/OFF Register Fo rmat for 3 Matrixes Setup
Current
Source Adress Data
HEX A7 A6 A5 A4 A3 A2 A1 A0 D7 D6 D5 D4 D3 D2 D1 D0
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AS1119
Datasheet - R egi s t e r D e s c r i p t i o n
In the intensity register (see Table 14) the brightness of every single LED can be set via a 8bit PWM (255 steps).
Table 14. LEDs Intensity Register Format for 3 Matrixes Setup
Matrix Current
Source Address Data
HEX A7 A6 A5 A4 A3 A2 A1 A0 D7 D6 D5 D4 D3 D2 D1 D0
ACS0
LED00x2400100100
255 steps for intensity each single
LED
LED10x2500100101
LED20x2600100110
LED30x2700100111
LED40x2800101000
BCS6
LED5 0x29 00101100
LED6 0x2A 00101101
LED7 0x2B 00101110
LED8 0x2C 00101111
LED9 0x2D 00110000
CCS12
LED10 0x2E 00101100
LED11 0x2F 00101101
LED12 0x30 00101110
LED13 0x31 00101111
LED14 0x32 00110000
ACS1
LED160x3400110100
255 steps for intensity each single
LED
LED170x3500110101
LED180x3600110110
LED190x3700110111
LED200x3800111000
BCS7
LED21 0x39 00111001
LED22 0x3A 00111010
LED23 0x3B 00111011
LED24 0x3C 00111100
LED25 0x3D 00111101
CCS13
LED26 0x3E 00111110
LED27 0x3F 00111111
LED28 0x40 01000000
LED29 0x41 01000001
LED30 0x42 01000010
ACS2
LED320x4401000100
255 steps for intensity each single
LED
LED330x4501000101
LED340x4601000110
LED350x4701000111
LED360x4801001000
BCS8
LED37 0x49 01001001
LED38 0x4A 01001010
LED39 0x4B 01001011
LED40 0x4C 01001100
LED41 0x4D 01001101
CCS14
LED42 0x4E 01001110
LED43 0x4F 01001111
LED44 0x50 01010000
LED45 0x51 01010001
LED46 0x52 01010010
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AS1119
Datasheet - R egi s t e r D e s c r i p t i o n
Control-Registers
The AS1119 devices contain 13 control-registers which are listed in Table 15. All registers are selected using a 8-bit
address word, and communication is done via the serial interface. Select the Control Register via the Register Selec-
tion (see Table 6 on page 14).
...............................
ACS5
LED800xA410100100
255 steps for intensity each single
LED
LED810xA510100101
LED820xA610100110
LED830xA710100111
LED840xA810101000
BCS11
LED85 0xA9 10101001
LED86 0xAA 10101010
LED87 0xAB 10101011
LED88 0xAC 10101100
LED89 0xAD 10101101
CCS17
LED90 0xAE 10101110
LED91 0xAF 10101111
LED92 0xB0 10110000
LED93 0xB1 10110001
LED94 0xB2 10110010
Table 15. Control Register Address Map
Register Name HEX Register Address Register Data
A7 A6 A5 A4 A3 A2 A1 A0 D7:D0
Frame Address 0x00 0 0 0 0 0 0 0 0 (see Table 16 on page 23)
Frame Play 0x01 0 0 0 0 0 0 0 1 (see Table 17 on page 23)
Frame Time 0x02 0 0 0 0 0 0 1 0 (see Table 18 on page 24)
Display Option 0x03 0 0 0 0 0 0 1 1 (see Table 19 on page 24)
AS1119 Config 0x04 0 0 0 0 0 1 0 0 (see Table 20 on page 25)
Current Source Matrix A 0x05 0 0 0 0 0 1 0 1 (see Table 21 on page 25)Current Source Matrix B 0x06 0 0 0 0 0 1 1 0
Current Source Matri x C 0x07 0 0 0 0 0 1 1 1
Chare Pump Config 0x08 0 0 0 0 1 0 0 0 (see Table 22 on page 26)
Open/Short Test 0x09 0 0 0 0 1 0 0 1 (see Table 23 on page 26)
Shutdown 0x0A 0 0 0 0 1 0 1 0 (see Table 24 on page 27)
I²C Interface Monitoring 0x0B 0 0 0 0 1 0 1 1 (see Table 25 on page 27)
Open/Short Status 0x0C 0 0 0 0 1 1 0 0 (see Table 26 on page 27)
AS1119 Status 0x0D 0 0 0 0 1 1 0 1 (see Table 27 on page 28)
Table 14. LEDs Intensity Register Format for 3 Matrixes Setup
Matrix Current
Source Address Data
HEX A7 A6 A5 A4 A3 A2 A1 A0 D7 D6 D5 D4 D3 D2 D1 D0
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AS1119
Datasheet - R egi s t e r D e s c r i p t i o n
Frame Address Register (0x00)
In this register it must be set if a picture or a movie is to display on the LED matrix. Also the start address of the the
movie or the picture which should be displayed must be set with in this register. The default setting of this register is
0x00.
Note: If bit 6 and 7 are set to ‘1’ the AS1119 will play the movie first and than the picture will be displayed.
Frame Play Register (0x01)
Within this register two movie play obtions can be set. Per default this register is set to 0x00.
- The number of frames which are displayed in one movie .
- The number of loops to play in a movie.
Note: To display a picture again after the play endless function D5:D3 has to be set to D5:D3 = 000 to 110.
Table 16. Frame Ad dress Register Format
0x00 Frame Address Reg ister
Bit Bit Name Default Access Bit Description
7 Play Movie 0 R/W 0: no movie
1: play movie
6 Display Picture 0 R/W 0: no picture
1: display picture
5:3 Start Address for
movie 000 R/W 000: Frame 0
001: Frame 1
010: Frame 2
011: Frame 3
100: Frame 4
101: Frame 5
2:0 Address of Picture 000 R/W 000: Frame 0
001: Frame 1
010: Frame 2
011: Frame 3
100: Frame 4
101: Frame 5
Table 17. Frame Pl ay Register Format
0x01 Frame Play Register
Bit Bit Name Default Access Bit Description
7:6 - 00 n/a
5:3 Number of loops
played in one movie 000 R/W 000: no loop
001: 1 loop
010: 2 loops
011: 3 loops
100: 4 loops
101: 5 loops
110: 6 loops
111: play endless
2:0 Number of frames to
played in a movie 000 R/W 000: 1 frame
001: 2 frames
010: 3 frames
011: 4 frames
100: 5 frames
101: 6 frames
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AS1119
Datasheet - R egi s t e r D e s c r i p t i o n
Frame Time Register (0x02)
Every single frame in a movie is displayed for a certain time before the next frame is displayed. This time can be set
within this register with 4 bits. The stated values in Table 18 are typical values. Per default this register is set to 0x00.
Display Option Register (0x03)
With the scan-limit it can be controled how many digits should be displayed. When all 18 digits are to display, the
update frequency is typically 430Hz (typ). If the number of digits to display is reduced, the update frequency is
increased. Per default this register is set to 0x07.
Table 18. Frame Time Register Format
0x02 Frame Time Register
Bit Bit Name Default Access Bit Description
7:4 - 00 n/a
3:0 Delay between frame
change in a movie 000 R/W 0000:play frame only one time
0001: 32.5ms
0010: 65ms
0011: 97.5ms
0100: 130ms
0101: 162.5ms
0110: 195ms
0111: 227.5ms
1000: 260ms
1001: 292.5ms
1010: 325ms
1011:357.5ms
1100: 390ms
1101: 422.5ms
1110: 455ms
1111: 487.5ms
Table 19. Disp lay Option Register Format
0x03 Display Option Register
Bit Bit Name Default Access Bit Description
7- 0n/a
6 intensity setting 0R/W0: use intensity setting of frame 0 for all other frames
1: set the intensity of each frame independently
5 start with blink 0R/W0: start blinking with LED on
1: start blinking with LED off
4 blink period 0R/W0: 1.5s
1: 3s
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AS1119
Datasheet - R egi s t e r D e s c r i p t i o n
AS1119 Config Register (0x04)
In this register the configuration of the charge pumps is set to 2 or 3 blocks. The direction of the SYNC_xxx pin (input
or output) is also set. Per default this register is set to 0x00.
Current Source Block A, B, C Registers (0x05, 0x 06, 0x07)
Within this registers the current for one block of LEDs can be set from 0mA to 31mA in 255 steps (8 bits). Per default
this register is set to 0x00.
3:0 number of displayed
current sources in
one frame
(scan-limit)
0111 R/W 2 Matrix setting
Matrix A Matrix B
0000: CS0
0001: CS0 to CS1
0010: CS0 to CS2
0011: CS0 to CS3
0100: CS0 to CS4
0101: CS0 to CS5
0110: CS0 to CS6
0111: CS0 to CS7
1000: CS0 to CS8
0000: CS0
0001: CS0 to CS1
0010: CS0 to CS2
0011: CS0 to CS3
0100: CS0 to CS4
0101: CS0 to CS5
0110: CS0 to CS6
0111: CS0 to CS7
1000: CS0 to CS8
3 Matrixes setting
Matrix A Matrix B Matrix C
0000: CS0
0001: CS0 to CS1
0010: CS0 to CS2
0011: CS0 to CS3
0100: CS0 to CS4
0101: CS0 to CS5
0000: CS6
0001: CS6 to CS7
0010: CS6 to CS8
0011: CS6 to CS9
0100: CS6 to CS10
0101: CS6 to CS11
0000: CS12
0001: CS12 to CS13
0010: CS12 to CS14
0011: CS12 to CS15
0100: CS12 to CS16
0101: CS12 to CS17
Table 20. AS1119 Config Register Format
0x04 AS1119 Config Register
Bit Bit Name Default Access Bit Description
7:3 - 00000 n/a
2:1 Sync 00 R/W 00 : do not use
01: pin B6 is used as clk output for synchronization
10: pin B6 is used as clk input for synchronization
11: do not use
0 Matrix Configuration 0 R/W 0: 3 matrixe s (à 5x6 LED-Matrix)
1: 2 matrixes (à 8x9 LED-Matrix)
Table 21. Current Sourcer Register Format
Current Source Registers
Bit Bit Name Default Access Bit Description
Address 0x05
7:0 Analog Current
Matrix A 0000000 R/W 00000000: 0mA
..........
11111111: 31mA
Address 0x06
7:0 Analog Current
Matrix B 0000000 R/W 00000000: 0mA
..........
11111111: 31mA
Table 19. Disp lay Option Register Format
0x03 Display Option Register
Bit Bit Name Default Access Bit Description
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AS1119
Datasheet - R egi s t e r D e s c r i p t i o n
Charge Pump Config Register (0x08)
In this register the characteristics of the Charge Pump can be set. If the supply of the AS1119 is strong enough the
charge pump is turning off automatically. This option and also the timeframe for it can be set. The timeframe defines
the period in which the control logic tries to switch off the charge pump. Per default this register is set to 0x1E.
Open/Short Test Register (0x09)
The AS1119 can detect open and shorted LEDs. To start this test the according bits have to be set. The result of the
open/short test is written in the Open/Short staturs register (see Table 26). The default setting of this register is 0x00.
The Open/Short test is only checking LEDs which a r e defined as ON in the Data Frame Registers Table 8 on page 15
or Table 12 on page 19. With the bit1 (Full Matrix) all 144 LEDs will be defined as available and will be tested. If bit1 is
set to ‘1’, no LED will be turned ON.
Address 0x07
7:0 Analog Current
Matrix C 0000000 R/W 00000000: 0mA
..........
11111111: 31mA
Table 22. AS1119 Config Register Forma t
0x08 Charge Pump Config Regis ter
Bit Bit Name Default Access Bit Description
7:5 - 000 n/a
4:2 Timeframe for reduce
supply test 111 R/W 000: 0.3s
001: 0.5s
010: 0.8s
011: 1.0s
100: 1.3s
101: 1.6s
110: 1.8s
111: 2.1s
1 Reduce supply
option 1 R/W 0: reduce supply option off
1: reduce supply option on
0 Charge Pump 0 R/W 0: Charge Pump disable
1: Charge Pump enable
Table 23. Open/Short Test Register Format
0x09 Open/Short Test Register
Bit Bit Name Default Access Bit Description
7:2 - 000000 n/a
1 Full Matrix 0 R/W 0: all LED’s are available in the matrixes
1: not all LED’s are available in the matri xe s
0 Error detection 0 R/W 0: start test
1: no test
Table 21. Current Sourcer Register Format
Current Source Registers
Bit Bit Name Default Access Bit Description
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AS1119
Datasheet - R egi s t e r D e s c r i p t i o n
Shutdown Register (0x0A)
The default setting of this register is 0x00. To get the AS1119 operational the bit D0 has to be set to ‘1’.
I²C Interface Monitoring Register (0x0B)
This register is used to monitor the activity on the I²C bus. If a deadlock situation occurs (e.g. the bus SDA pin is pulled
to low and no communication is possible) the chip will reset the I²C interface and the master is able to start the commu-
nication again.
The time window for the reset of the interface of the AS1119 can bes set via 7 bits from 256µs to 33ms. The default
setting of this register is 0xFF.
Open/Short Status Register (0x0C)
This is a read only register. Within this register the result of the open/short test can be read out. It’s also stated if the
test is completed or still running. The default setting of this register is 0x00.
Table 24. Shutdown Register Format
0x0A Shutdown Register
Bit Bit Name Default Access Bit Description
7:1 - 0000000 n/a
0 shutdown 0 R/W 0: shutdown
1: normal operation
Table 25. I²C Interface Monitoring Register Format
0x0B I²C Interface Monitoring Register
Bit Bit Name Default Access Bit Description
7:2 Time out window 1111111 R/W 0 to 127 => 1 to 128x256µs
0000000: 256µs
........
1111111: 32.7ms
0 I²C Monitor 1 R/W 0: I²C monitoring off
1: I²C monitoring on
Table 26. Open/Short Status Register Format
0x0C Open/Short Status Register
Bit Bit Name Default Access Bit Description
7- 0n/a
6 status 0 R 0: no test
1: test ongoing
5 short test result
Matrix C 0 R 0: no error detected
1: short in Matrix C
4 short test result
Matrix B 0 R 0: no error detected
1: short in Matrix B
3 short test result
Matrix A 0 R 0: no error detected
1: short in Matrix A
2 open test result
Matrix C 0 R 0: no error detected
1: open in Matrix C
1 open test result
Matrix B 0 R 0: no error detected
1: open in Matrix B
0 open test result
Matrix A 0 R 0: no error detected
1: open in Matrix A
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AS1119
Datasheet - R egi s t e r D e s c r i p t i o n
AS1119 Status Register (0x0D)
This is a read only register. From this register the actual status of the AS1119 can be read out. The default setting of
this register is 0x00. After an read command the bits are set to ‘0’ again automatically.
Table 27. AS1119 Status Register Register Format
0x0D AS1119 Status Register
Bit Bit Name Default Access Bit Description
7- 0n/a
6 Movie status R 0: no movie is playing
1: one movie is playing
5:4 Interru pt 00 R 00: no Interrupt triggered
01: POR triggered an interrupt 1
10: I²C monitor triggered an interrupt
11: both (I²C and POR) triggered an interrupt
1. The power-on reset is part of the start sequence, hence after start-up this bit is also set.
3:0 actual displayed
frame 000 R 000: frame 0
001: frame 1
010: frame 2
011: frame 3
100: frame 4
101: frame 5
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AS1119
Datasheet - Pa ck ag e D ra wi ng s a nd Mar ki ng s
10 Package Drawings and Markings
Figure 23. 36-pin WL-CSP Marking
Table 28. Packaging Code YYWWIZ Z
Figure 24. 36-pin WL-CSP
YY WW IZZ
last two digits of the current year manufacturing we ek plant identifi er free choice / traceability code
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AS1119
Datasheet - O r d e r i n g I n f o r m a t i o n
11 Ordering Information
The devices are available as the standard products shown in Table 29.
Note: All products are RoHS compliant.
Buy our products or get free samples online at ICdirect: http://www.austriamicrosystems.com/ICdirect
Technical Support is found at http://www.austriamicrosystems.com/Technical-Support
For further information and requests, please contact us mailto:sales@austriamicrosystems.com
or find your local distributor at http://www.austriamicrosystems.com/distributor
Table 29. Ordering Information
Ordering Code Marking Desciption Delivery Form Package
AS1119-BWLT AS1119 144-LED Cross-Plexing Driver
with 320mA Charge-Pump Tap e and Reel 36-pin WL-CSP
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AS1119
Datasheet
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