1. Product profile
1.1 General description
Very low capacitance unidirectional quadruple ElectroStatic Discharge (ESD) protection
diode arrays in small Surface-Mounted Device (SMD) plastic packages designed to
protect up to four signal lines from the damage caused by ESD and other transients.
1.2 Features
1.3 Applications
PESDxV4UF; PESDxV4UG;
PESDxV4UW
Very low capacitance unidirectional quadruple ESD
protection diode arrays
Rev. 03 — 28 January 2008 Product data sheet
Table 1. Product overview
Type number Package Package configuration
NXP JEITA JEDEC
PESD3V3V4UF SOT886 - MO-252 leadless ultra small
PESD5V0V4UF SOT886 - MO-252 leadless ultra small
PESD3V3V4UG SOT353 SC-88A - very small
PESD5V0V4UG SOT353 SC-88A - very small
PESD3V3V4UW SOT665 - - ultra small and flat lead
PESD5V0V4UW SOT665 - - ultra small and flat lead
nESD protection of up to four lines nUltra low leakage current: IRM =25nA
nVery low diode capacitance nESD protection up to 12 kV
nMax. peak pulse power: PPP =16W nIEC 61000-4-2; level 4 (ESD)
nLow clamping voltage: VCL =11V nIEC 61000-4-5 (surge); IPP = 1.5 A
nComputers and peripherals nCommunication systems
nAudio and video equipment nPortable electronics
nCellular handsets and accessories nSubscriber Identity Module (SIM) card
protection
PESDXV4UF_G_W_3 © NXP B.V. 2008. All rights reserved.
Product data sheet Rev. 03 — 28 January 2008 2 of 16
NXP Semiconductors PESDxV4UF/G/W
Very low capacitance quadruple ESD protection diode arrays
1.4 Quick reference data
2. Pinning information
Table 2. Quick reference data
T
amb
=25
°
C unless otherwise specified.
Symbol Parameter Conditions Min Typ Max Unit
Per diode
VRWM reverse standoff voltage
PESD3V3V4UF
PESD3V3V4UG
PESD3V3V4UW
- - 3.3 V
PESD5V0V4UF
PESD5V0V4UG
PESD5V0V4UW
- - 5.0 V
Cddiode capacitance f = 1 MHz; VR=0V
PESD3V3V4UF
PESD3V3V4UG
PESD3V3V4UW
- 1518pF
PESD5V0V4UF
PESD5V0V4UG
PESD5V0V4UW
- 1215pF
Table 3. Pinning
Pin Description Simplified outline Symbol
PESD3V3V4UF; PESD5V0V4UF
1 cathode (diode 1)
2 common anode
3 cathode (diode 2)
4 cathode (diode 3)
5 common anode
6 cathode (diode 4)
PESD3V3V4UG; PESD5V0V4UG
1 cathode (diode 1)
2 common anode
3 cathode (diode 2)
4 cathode (diode 3)
5 cathode (diode 4)
PESD3V3V4UW; PESD5V0V4UW
1 cathode (diode 1)
2 common anode
3 cathode (diode 2)
4 cathode (diode 3)
5 cathode (diode 4)
bottom view
321
456
006aaa156
61
52
43
132
45
006aaa157
51
2
43
123
45
006aaa157
51
2
43
PESDXV4UF_G_W_3 © NXP B.V. 2008. All rights reserved.
Product data sheet Rev. 03 — 28 January 2008 3 of 16
NXP Semiconductors PESDxV4UF/G/W
Very low capacitance quadruple ESD protection diode arrays
3. Ordering information
4. Marking
[1] * = -: made in Hong Kong
* = p: made in Hong Kong
* = t: made in Malaysia
* = W: made in China
5. Limiting values
[1] Non-repetitive current pulse 8/20 µs exponential decay waveform according to IEC 61000-4-5.
[2] For PESDxV4UF measured from pin 1, 3, 4 or 6 to pin 2 or 5.
[3] For PESDxV4UG and PESDxV4UW measured from pin 1, 3, 4 or 5 to pin 2.
Table 4. Ordering information
Type number Package
Name Description Version
PESD3V3V4UF XSON6 plastic extremely thin small outline package;
no leads; 6 terminals; body 1 ×1.45 ×0.5 mm SOT886
PESD5V0V4UF
PESD3V3V4UG SC-88A plastic surface-mounted package; 5 leads SOT353
PESD5V0V4UG
PESD3V3V4UW - plastic surface-mounted package; 5 leads SOT665
PESD5V0V4UW
Table 5. Marking codes
Type number Marking code[1]
PESD3V3V4UF A7
PESD5V0V4UF A8
PESD3V3V4UG V1*
PESD5V0V4UG V2*
PESD3V3V4UW W1
PESD5V0V4UW W2
Table 6. Limiting values
In accordance with the Absolute Maximum Rating System (IEC 60134).
Symbol Parameter Conditions Min Max Unit
Per diode
PPP peak pulse power tp= 8/20 µs[1][2][3] -16W
IPP peak pulse current tp= 8/20 µs[1][2][3] - 1.5 A
Per device
Tjjunction temperature - 150 °C
Tamb ambient temperature −65 +150 °C
Tstg storage temperature −65 +150 °C
PESDXV4UF_G_W_3 © NXP B.V. 2008. All rights reserved.
Product data sheet Rev. 03 — 28 January 2008 4 of 16
NXP Semiconductors PESDxV4UF/G/W
Very low capacitance quadruple ESD protection diode arrays
[1] Device stressed with ten non-repetitive ESD pulses.
[2] For PESDxV4UF measured from pin 1, 3, 4 or 6 to pin 2 or 5.
[3] For PESDxV4UG and PESDxV4UW measured from pin 1, 3, 4 or 5 to pin 2.
Table 7. ESD maximum ratings
T
amb
=25
°
C unless otherwise specified.
Symbol Parameter Conditions Min Max Unit
Per diode
VESD electrostatic discharge voltage IEC 61000-4-2
(contact discharge) [1][2][3] -12kV
MIL-STD-883 (human
body model) -10kV
Table 8. ESD standards compliance
Standard Conditions
Per diode
IEC 61000-4-2; level 4 (ESD) > 8 kV (contact)
MIL-STD-883; class 3 (human body model) > 4 kV
Fig 1. 8/20 µs pulse waveform according to
IEC 61000-4-5 Fig 2. ESD pulse waveform according to
IEC 61000-4-2
t (µs)
0403010 20
001aaa630
40
80
120
IPP
(%)
0
e−t
100 % IPP; 8 µs
50 % IPP; 20 µs
001aaa631
IPP
100 %
90 %
t
30 ns 60 ns
10 %
tr = 0.7 ns to 1 ns
PESDXV4UF_G_W_3 © NXP B.V. 2008. All rights reserved.
Product data sheet Rev. 03 — 28 January 2008 5 of 16
NXP Semiconductors PESDxV4UF/G/W
Very low capacitance quadruple ESD protection diode arrays
6. Characteristics
Table 9. Characteristics
T
amb
=25
°
C unless otherwise specified.
Symbol Parameter Conditions Min Typ Max Unit
Per diode
VRWM reverse standoff voltage
PESD3V3V4UF
PESD3V3V4UG
PESD3V3V4UW
- - 3.3 V
PESD5V0V4UF
PESD5V0V4UG
PESD5V0V4UW
- - 5.0 V
IRM reverse leakage current
PESD3V3V4UF
PESD3V3V4UG
PESD3V3V4UW
VRWM = 3.3 V - 40 300 nA
PESD5V0V4UF
PESD5V0V4UG
PESD5V0V4UW
VRWM = 5.0 V - 3 25 nA
VBR breakdown voltage IR=1mA
PESD3V3V4UF
PESD3V3V4UG
PESD3V3V4UW
5.3 5.6 5.9 V
PESD5V0V4UF
PESD5V0V4UG
PESD5V0V4UW
6.4 6.8 7.2 V
Cddiode capacitance f=1MHz
PESD3V3V4UF
PESD3V3V4UG
PESD3V3V4UW
VR= 0 V - 15 18 pF
PESD3V3V4UF
PESD3V3V4UG
PESD3V3V4UW
VR= 3.3 V - 9 12 pF
PESD5V0V4UF
PESD5V0V4UG
PESD5V0V4UW
VR= 0 V - 12 15 pF
PESD5V0V4UF
PESD5V0V4UG
PESD5V0V4UW
VR=5V - 69pF
PESDXV4UF_G_W_3 © NXP B.V. 2008. All rights reserved.
Product data sheet Rev. 03 — 28 January 2008 6 of 16
NXP Semiconductors PESDxV4UF/G/W
Very low capacitance quadruple ESD protection diode arrays
[1] Non-repetitive current pulse 8/20 µs exponential decay waveform according to IEC 61000-4-5.
[2] For PESDxV4UF measured from pin 1, 3, 4 or 6 to pin 2 or 5.
[3] For PESDxV4UG and PESDxV4UW measured from pin 1, 3, 4 or 5 to pin 2.
VCL clamping voltage [1][2][3]
PESD3V3V4UF
PESD3V3V4UG
PESD3V3V4UW
IPP =1A --9V
PESD3V3V4UF
PESD3V3V4UG
PESD3V3V4UW
IPP =2A --11V
PESD5V0V4UF
PESD5V0V4UG
PESD5V0V4UW
IPP =1A --11V
PESD5V0V4UF
PESD5V0V4UG
PESD5V0V4UW
IPP = 1.7 A - - 13 V
rdif differential resistance IR=1mA
PESD3V3V4UF
PESD3V3V4UG
PESD3V3V4UW
- - 200 Ω
PESD5V0V4UF
PESD5V0V4UG
PESD5V0V4UW
- - 100 Ω
Table 9. Characteristics
…continued
T
amb
=25
°
C unless otherwise specified.
Symbol Parameter Conditions Min Typ Max Unit
Tamb =25°C
Fig 3. Peak pulse power as a function of exponential
pulse duration; typical values Fig 4. Relative variation of peak pulse power as a
function of junction temperature; typical values
006aaa261
tp (µs)
110
4
103
10 102
10
102
PPP
(W)
1
Tj (°C)
0 20015050 100
001aaa633
0.4
0.8
1.2
PPP
0
PPP(25°C)
PESDXV4UF_G_W_3 © NXP B.V. 2008. All rights reserved.
Product data sheet Rev. 03 — 28 January 2008 7 of 16
NXP Semiconductors PESDxV4UF/G/W
Very low capacitance quadruple ESD protection diode arrays
f = 1 MHz; Tamb =25°C
(1) PESD3V3V4UF; PESD3V3V4UG; PESD3V3V4UW
(2) PESD5V0V4UF; PESD5V0V4UG; PESD5V0V4UW
Fig 5. Diode capacitance as a function of reverse
voltage; typical values Fig 6. Relative variation of reverse leakage current as
a function of junction temperature; typical
values
Fig 7. V-I characteristics for a unidirectional ESD protection diode
VR (V)
054231
006aaa262
10
12
8
14
16
Cd
(pF)
6
(1)
(2)
006aaa263
Tj (°C)
−100 150100050−50
1
10
IRM
IRM(25 °C)
10−1
006aaa407
−VCL −VBR −VRWM −IRM
−IR
−IPP
V
I
P-N
−+
PESDXV4UF_G_W_3 © NXP B.V. 2008. All rights reserved.
Product data sheet Rev. 03 — 28 January 2008 8 of 16
NXP Semiconductors PESDxV4UF/G/W
Very low capacitance quadruple ESD protection diode arrays
Fig 8. ESD clamping test setup and waveforms
006aab125
50 Ω
RZ
CZ
vertical scale = 200 V/div
horizontal scale = 50 ns/div
unclamped +1 kV ESD voltage waveform
(IEC 61000-4-2 network) clamped +1 kV ESD voltage waveform
(IEC 61000-4-2 network)
unclamped −1 kV ESD voltage waveform
(IEC 61000-4-2 network) clamped −1 kV ESD voltage waveform
(IEC 61000-4-2 network)
vertical scale = 200 V/div
horizontal scale = 50 ns/div vertical scale = 5 V/div
horizontal scale = 50 ns/div
GND
GND
GND
GND
GND
450 ΩRG 223/U
50 Ω coax
ESD TESTER
IEC 61000-4-2 network
CZ = 150 pF; RZ = 330 Ω
4 GHz DIGITAL
OSCILLOSCOPE
10×
ATTENUATOR
DUT
Device
Under
Test
vertical scale = 5 V/div
horizontal scale = 50 ns/div
PESD3V3V4UF/G/W
PESD5V0V4UF/G/W
PESDXV4UF_G_W_3 © NXP B.V. 2008. All rights reserved.
Product data sheet Rev. 03 — 28 January 2008 9 of 16
NXP Semiconductors PESDxV4UF/G/W
Very low capacitance quadruple ESD protection diode arrays
7. Application information
The devices are designed for the protection of up to four unidirectional data or signal lines
from the damage caused by ESD and surge pulses. The devices may be used on lines
where the signal polarities are both, positive and negative with respect to ground. The
devices provide a surge capability of 16 W per line for an 8/20 µs waveform each.
Circuit board layout and protection device placement
Circuit board layout is critical for the suppression of ESD, Electrical Fast Transient (EFT)
and surge transients. The following guidelines are recommended:
1. Place the device as close to the input terminal or connector as possible.
2. The path length between the device and the protected line should be minimized.
3. Keep parallel signal paths to a minimum.
4. Avoid running protected conductors in parallel with unprotected conductors.
5. Minimize all Printed-Circuit Board (PCB) conductive loops including power and
ground loops.
6. Minimize the length of the transient return path to ground.
7. Avoid using shared transient return paths to a common ground point.
8. Ground planes should be used whenever possible. For multilayer PCBs, use ground
vias.
Fig 9. Application diagram
006aab126
data- or transmission lines
n.c.
unidirectional protection of 4 lines
DUT
1
2
3
5
4
bidirectional protection of 3 lines
DUT
1
2
3
5
4
PESDXV4UF_G_W_3 © NXP B.V. 2008. All rights reserved.
Product data sheet Rev. 03 — 28 January 2008 10 of 16
NXP Semiconductors PESDxV4UF/G/W
Very low capacitance quadruple ESD protection diode arrays
8. Package outline
Fig 10. Package outline PESDxV4UF (SOT886) Fig 11. Package outline PESDxV4UG (SOT353)
Fig 12. Package outline PESDxV4UW (SOT665)
04-07-22Dimensions in mm
0.25
0.17
0.40
0.32 0.35
0.27
0.5
0.6
1.05
0.95
1.5
1.4 0.5
0.50
max 0.04
max
3
2
1
4
5
6
04-11-16Dimensions in mm
0.25
0.10
0.3
0.2
1.3
0.65
2.2
2.0 1.35
1.15
2.2
1.8 1.1
0.8
0.45
0.15
132
45
Dimensions in mm 04-11-08
1.7
1.5
1.7
1.5 1.3
1.1
1
0.18
0.08
0.27
0.17
0.5
123
45
0.6
0.5
0.3
0.1
PESDXV4UF_G_W_3 © NXP B.V. 2008. All rights reserved.
Product data sheet Rev. 03 — 28 January 2008 11 of 16
NXP Semiconductors PESDxV4UF/G/W
Very low capacitance quadruple ESD protection diode arrays
9. Packing information
[1] For further information and the availability of packing methods, see Section 13.
[2] T1: normal taping
[3] T4: 90° rotated reverse taping
[4] T2: reverse taping
10. Soldering
Table 10. Packing methods
The indicated -xxx are the last three digits of the 12NC ordering code.
[1]
Type number Package Description Packing quantity
3000 4000 5000 8000 10000
PESD3V3V4UF SOT886 4 mm pitch, 8 mm tape and reel; T1 [2] - - -115 - -
4 mm pitch, 8 mm tape and reel; T4 [3] - - -132 - -
PESD5V0V4UF SOT886 4 mm pitch, 8 mm tape and reel; T1 [2] - - -115 - -
4 mm pitch, 8 mm tape and reel; T4 [3] - - -132 - -
PESD3V3V4UG SOT353 4 mm pitch, 8 mm tape and reel; T1 [2] -115 - - - -135
4 mm pitch, 8 mm tape and reel; T2 [4] -125 - - - -165
PESD5V0V4UG SOT353 4 mm pitch, 8 mm tape and reel; T1 [2] -115 - - - -135
4 mm pitch, 8 mm tape and reel; T2 [4] -125 - - - -165
PESD3V3V4UW SOT665 2 mm pitch, 8 mm tape and reel - - - -315 -
4 mm pitch, 8 mm tape and reel - -115 - - -
PESD5V0V4UW SOT665 2 mm pitch, 8 mm tape and reel - - - -315 -
4 mm pitch, 8 mm tape and reel - -115 - - -
Reflow soldering is the only recommended soldering method.
Fig 13. Reflow soldering footprint PESDxV4UF (SOT886)
sot886_fr
solder lands
occupied area
solder paste
Dimensions in mm
0.425
(6×)
1.250
0.675
1.700
0.325
(6×)
0.270
(6×)
0.370
(6×)
0.500
0.500
PESDXV4UF_G_W_3 © NXP B.V. 2008. All rights reserved.
Product data sheet Rev. 03 — 28 January 2008 12 of 16
NXP Semiconductors PESDxV4UF/G/W
Very low capacitance quadruple ESD protection diode arrays
Fig 14. Reflow soldering footprint PESDxV4UG (SOT353/SC-88A)
Dimensions in mm
Fig 15. Wave soldering footprint PESDxV4UG (SOT353/SC-88A)
sot353_fr
solder resist
occupied area
solder lands
solder paste
Dimensions in mm
0.60
(1×)
0.50
(4×)
0.50
(4×)
2.65
0.40 0.90
1.20
2.40
2.10
2.35
solder lands
solder resist
occupied area
1.15
3.75
transport direction during soldering
1.000.30 4.00
0.704.50
2.652.25
2.70
PESDXV4UF_G_W_3 © NXP B.V. 2008. All rights reserved.
Product data sheet Rev. 03 — 28 January 2008 13 of 16
NXP Semiconductors PESDxV4UF/G/W
Very low capacitance quadruple ESD protection diode arrays
Reflow soldering is the only recommended soldering method.
Fig 16. Reflow soldering footprint PESDxV4UW (SOT665)
2.45
2.10
0.30
0.15
(2x)
0.375
(2×)
0.45
(2×)
0.70
(2×)0.40
(5×)
0.55
1.60
1.20
2.20
1.25
1.375
2.00 1.70 1.00
solder lands
solder resist
placement area
occupied area
0.075 Dimensions in mm
PESDXV4UF_G_W_3 © NXP B.V. 2008. All rights reserved.
Product data sheet Rev. 03 — 28 January 2008 14 of 16
NXP Semiconductors PESDxV4UF/G/W
Very low capacitance quadruple ESD protection diode arrays
11. Revision history
Table 11. Revision history
Document ID Release date Data sheet status Change notice Supersedes
PESDXV4UF_G_W_3 20080128 Product data sheet - PESDXV4UG_SER_2
PESDXV4UW_SER_1
Modifications: •The format of this data sheet has been redesigned to comply with the new identity
guidelines of NXP Semiconductors.
•Legal texts have been adapted to the new company name where appropriate.
•Type numbers PESD3V3V4UF and PESD5V0V4UF added
•Table 1 “Product overview”: added
•Figure 7: added
•Section 9 “Packing information”: added
•Section 10 “Soldering”: added
•Section 12 “Legal information”: updated
PESDXV4UG_SER_2 20050407 Product data sheet - PESDXV4UG_SER_1
PESDXV4UW_SER_1 20050422 Product data sheet - -
PESDXV4UF_G_W_3 © NXP B.V. 2008. All rights reserved.
Product data sheet Rev. 03 — 28 January 2008 15 of 16
NXP Semiconductors PESDxV4UF/G/W
Very low capacitance quadruple ESD protection diode arrays
12. Legal information
12.1 Data sheet status
[1] Please consult the most recently issued document before initiating or completing a design.
[2] The term ‘short data sheet’ is explained in section “Definitions”.
[3] The product status of device(s) described in this document may have changed since this document was published and may differ in case of multiple devices. The latest product status
information is available on the Internet at URL http://www.nxp.com.
12.2 Definitions
Draft — The document is a draft version only. The content is still under
internal review and subject to formal approval, which may result in
modifications or additions. NXP Semiconductors does not give any
representations or warranties as to the accuracy or completeness of
information included herein and shall have no liability for the consequences of
use of such information.
Short data sheet — A short data sheet is an extract from a full data sheet
with the same product type number(s) and title. A short data sheet is intended
for quick reference only and should not be relied upon to contain detailed and
full information. For detailed and full information see the relevant full data
sheet, which is available on request via the local NXP Semiconductors sales
office. In case of any inconsistency or conflict with the short data sheet, the
full data sheet shall prevail.
12.3 Disclaimers
General — Information in this document is believed to be accurate and
reliable. However, NXP Semiconductors does not give any representations or
warranties, expressed or implied, as to the accuracy or completeness of such
information and shall have no liability for the consequences of use of such
information.
Right to make changes — NXP Semiconductors reserves the right to make
changes to information published in this document, including without
limitation specifications and product descriptions, at any time and without
notice. This document supersedes and replaces all information supplied prior
to the publication hereof.
Suitability for use — NXP Semiconductors products are not designed,
authorized or warranted to be suitable for use in medical, military, aircraft,
space or life support equipment, nor in applications where failure or
malfunction of an NXP Semiconductors product can reasonably be expected
to result in personal injury, death or severe property or environmental
damage. NXP Semiconductors accepts no liability for inclusion and/or use of
NXP Semiconductors products in such equipment or applications and
therefore such inclusion and/or use is at the customer’s own risk.
Applications — Applications that are described herein for any of these
products are for illustrative purposes only. NXP Semiconductors makes no
representation or warranty that such applications will be suitable for the
specified use without further testing or modification.
Limiting values — Stress above one or more limiting values (as defined in
the Absolute Maximum Ratings System of IEC 60134) may cause permanent
damage to the device. Limiting values are stress ratings only and operation of
the device at these or any other conditions above those given in the
Characteristics sections of this document is not implied. Exposure to limiting
values for extended periods may affect device reliability.
Terms and conditions of sale — NXP Semiconductors products are sold
subject to the general terms and conditions of commercial sale, as published
at http://www.nxp.com/profile/terms, including those pertaining to warranty,
intellectual property rights infringement and limitation of liability, unless
explicitly otherwise agreed to in writing by NXP Semiconductors. In case of
any inconsistency or conflict between information in this document and such
terms and conditions, the latter will prevail.
No offer to sell or license — Nothing in this document may be interpreted
or construed as an offer to sell products that is open for acceptance or the
grant, conveyance or implication of any license under any copyrights, patents
or other industrial or intellectual property rights.
12.4 Trademarks
Notice: All referenced brands, product names, service names and trademarks
are the property of their respective owners.
13. Contact information
For additional information, please visit: http://www.nxp.com
For sales office addresses, send an email to: salesaddresses@nxp.com
Document status[1][2] Product status[3] Definition
Objective [short] data sheet Development This document contains data from the objective specification for product development.
Preliminary [short] data sheet Qualification This document contains data from the preliminary specification.
Product [short] data sheet Production This document contains the product specification.
NXP Semiconductors PESDxV4UF/G/W
Very low capacitance quadruple ESD protection diode arrays
© NXP B.V. 2008. All rights reserved.
For more information, please visit: http://www.nxp.com
For sales office addresses, please send an email to: salesaddresses@nxp.com
Date of release: 28 January 2008
Document identifier: PESDXV4UF_G_W_3
Please be aware that important notices concerning this document and the product(s)
described herein, have been included in section ‘Legal information’.
14. Contents
1 Product profile . . . . . . . . . . . . . . . . . . . . . . . . . . 1
1.1 General description. . . . . . . . . . . . . . . . . . . . . . 1
1.2 Features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1
1.3 Applications . . . . . . . . . . . . . . . . . . . . . . . . . . . 1
1.4 Quick reference data. . . . . . . . . . . . . . . . . . . . . 2
2 Pinning information. . . . . . . . . . . . . . . . . . . . . . 2
3 Ordering information. . . . . . . . . . . . . . . . . . . . . 3
4 Marking. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3
5 Limiting values. . . . . . . . . . . . . . . . . . . . . . . . . . 3
6 Characteristics. . . . . . . . . . . . . . . . . . . . . . . . . . 5
7 Application information. . . . . . . . . . . . . . . . . . . 9
8 Package outline . . . . . . . . . . . . . . . . . . . . . . . . 10
9 Packing information. . . . . . . . . . . . . . . . . . . . . 11
10 Soldering . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11
11 Revision history. . . . . . . . . . . . . . . . . . . . . . . . 14
12 Legal information. . . . . . . . . . . . . . . . . . . . . . . 15
12.1 Data sheet status . . . . . . . . . . . . . . . . . . . . . . 15
12.2 Definitions. . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
12.3 Disclaimers. . . . . . . . . . . . . . . . . . . . . . . . . . . 15
12.4 Trademarks. . . . . . . . . . . . . . . . . . . . . . . . . . . 15
13 Contact information. . . . . . . . . . . . . . . . . . . . . 15
14 Contents . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16
