PE42820MLBA-X - PEREGRINE SEMICONDUCTOR

Document No. DOC-13614-4 │www.psemi.com

Page 1 of 12

Figure 2. Package Type

32-lead 5 × 5 mm QFN

Product Description

The PE42820 is a HaRP™ technology-enhanced high

power reflective SPDT RF switch designed for use in

mobile radio, relay replacement and other high

performance wireless applications.

This switch is a pin-compatible upgraded version of the

PE42510A with a wider frequency and power supply

range, and external negative supply option. It maintains

exceptional linearity and power handling from 30 MHz

through 2.7 GHz. PE42820 also features low insertion

loss, high power handling, and is offered in a 32-lead

5 × 5 mm QFN package. In addition, no external blocking

capacitors are required if 0 VDC is present on the RF

ports.

The PE42820 is manufactured on Peregrine’s

UltraCMOS® process, a patented variation of silicon-on-

insulator (SOI) technology on a sapphire substrate.

Peregrine’s HaRP technology enhancements deliver high

linearity and excellent harmonics performance. It is an

innovative feature of the UltraCMOS process, offering the

performance of GaAs with the economy and integration of

conventional CMOS.

Product Specification

Figure 1. Functional Diagram

PE42820

Features

 High power handling

 45 dBm @ 850 MHz, 32W

 44 dBm @ 2 GHz, 25W

 Exceptional linearity

 85 dBm IIP3 @ 850 MHz

 81 dBm IIP3 @ 2.7 GHz

 Low insertion loss

 0.25 dB @ 850 MHz

 0.40 dB @ 2 GHz

 Wide supply range of 2.3–5.5V

 +1.8V control logic compatible

 ESD performance

 1.5 kV HBM on all pins

 External negative supply option

DOC-52312

UltraCMOS® SPDT RF Switch

30–2700 MHz

Product Specification

PE42820

Page 2 of 12

Table 1. Electrical Specifications @ +25 °C (ZS = ZL = 50Ω), unless otherwise noted

Normal mode1: VDD = 3.3V, VSS_EXT = 0V or Bypass mode2: VDD = 3.3V, VSS_EXT = –3.3V

Parameter Path Condition Min Typ Max Unit

Insertion loss3 RFC–RFX

30 MHz–1 GHz 0.30 0.45 dB

1–2 GHz 0.40 0.60 dB

2–2.7 GHz 0.70 0.95 dB

Isolation RFX–RFX

30 MHz–1 GHz 34 35 dB

1–2 GHz 27 28 dB

2–2.7 GHz 23 24 dB

Unbiased isolation RFC–RFX VDD, V1 = 0V, +27 dBm 6 dB

Return loss3 RFX

30 MHz–1 GHz 22 dB

1–2 GHz 20 dB

2–2.7 GHz 14 dB

Harmonics RFC–RFX 2fo: +45 dBm pulsed @ 1GHz, 50Ω

3fo: +45 dBm pulsed @ 1GHz, 50Ω –94 –90 dBc

–84 –80 dBc

Input IP3 RFC–RFX 850 MHz

2700 MHz 85 dBm

81 dBm

Input 0.1dB compression point4 RFC–RFX

30 MHz–2 GHz

2–2.7 GHz 45.5

44.5 dBm

dBm

Switching time 50% CTRL to 90% or 10% RF 15 25 µs

Settling time 50% CTRL to harmonics within specifications5 30 45 µs

Notes: 1. Normal mode: single external positive supply used.

2. Bypass mode: both external positive supply and external negative supply used.

3. Performance specified with external matching. Refer to Evaluation Kit section for additional information.

4. The input 0.1dB compression point is a linearity figure of merit. Refer to Table 3 for the operating RF input power (50Ω).

5. See harmonics specs above.

Product Specification

PE42820

Page 3 of 12

Table 2. Pin Descriptions

Table 3. Operating Ranges Figure 3. Pin Configuration (Top View)

Pin # Pin Name Description

1, 3–11, 14,

15, 17–22,

24–27,

29–32

GND Ground

2 RF11 RF port

12 VDD Supply voltage (nominal 3.3V)

16 VSS_EXT2 External VSS negative voltage control

23 RF21 RF port

28 RFC1 RF common

Pad GND Exposed pad: ground for proper operation

13 V1 Digital control logic input 1

Parameter Symbol Min Typ Max Unit

Normal mode1

Supply voltage VDD 2.3 5.5 V

Supply current IDD 130 200 µA

Bypass mode2

Supply voltage VDD 3.3 5.5 V

Supply current IDD 50 80 µA

Negative supply

voltage VSS_EXT –3.6 –3.2 V

Negative supply

current ISS –40 –16 µA

Digital input high (V1) VIH 1.17 3.63 V

Digital input low (V1) VIL –0.3 0.6 V

RF input power, CW

30 MHz–2 GHz

>2–2.7 GHz PMAX,CW

43

42

dBm

RF input power,

pulsed4

30 MHz–2 GHz

>2–2.7 GHz

PMAX,PULSED

45

44

dBm

RF input power,

unbiased PMAX,UNB

27

dBm

Operating temperature

range (Case) TOP –40 +85 °C

Operating junction

temperature TJ +140 °C

Normal or Bypass mode

Notes: 1. Normal mode: connect pin 16 to GND to enable internal negative

voltage generator.

2. Bypass mode: apply a negative voltage to VSS_EXT (pin 16) to bypass

and disable internal negative voltage generator.

3. Maximum VIH voltage is limited to VDD and cannot exceed 3.6V.

4. Pulsed, 10% duty cycle of 4620 µ s period, 50Ω.

24

23

22

21

20

19

18

17

1

2

3

4

5

6

7

8

GND

RF1

GND

RF2

GND

Exposed

Ground Pad

Pin 1 Dot

Marking

Notes: 1. RF pins 2, 23 and 28 must be at 0 VDC. The RF pins do not require

DC blocking capacitors for proper operation if the 0 VDC requirement

is met.

2. Use VSS_EXT (pin 16, VSS_EXT = –VDD) to bypass and disable internal

negative voltage generator. Connect VSS_EXT (pin 16, VSS_EXT = GND) to

enable internal negative voltage generator.

Product Specification

PE42820

Page 4 of 12

Electrostatic Discharge (ESD) Precautions

When handling this UltraCMOS device, observe

the same precautions that you would use with

other ESD-sensitive devices. Although this device

contains circuitry to protect it from damage due to

ESD, precautions should be taken to avoid

exceeding the rating specified.

Latch-Up Avoidance

Unlike conventional CMOS devices, UltraCMOS

devices are immune to latch-up.

Table 5. Control Logic Truth Table

Path CTRL

RFC–RF1 H

RFC–RF2 L

Moisture Sensitivity Level

The Moisture Sensitivity Level rating for the 32-

lead 5 × 5 mm QFN package is MSL3.

Table 4. Absolute Maximum Ratings

Exceeding absolute maximum ratings may cause

permanent damage. Operation should be

restricted to the limits in the Operating Ranges

table. Operation between operating range

maximum and absolute maximum for extended

periods may reduce reliability.

Parameter/Condition Symbol Min Max Unit

Supply voltage VDD –0.3 5.5 V

Digital input voltage (V1) VCTRL –0.3 3.6 V

Maximum input power

30 MHz–2 GHz

>2–2.7 GHz PMAX,ABS

45.5

44.5

dBm

Storage temperature range TST –65 +150 °C

Maximum case temperature TCASE +85 °C

Peak maximum junction

temperature (10 seconds max) TJ +200 °C

ESD voltage HBM1, all pins VESD 1500 V

ESD Voltage MM2, all pins VESD 200 V

Notes: 1. Human Body Model (MIL-STD 883 Method 3015).

2. Machine Model (JEDEC JESD22-A115).

Switching Frequency

The PE42820 has a maximum 25 kHz switching

rate in normal mode (pin 16 = GND). A faster

switching rate is available in bypass mode (pin 16

= VSS_EXT). The rate at which the PE42820 can be

switched is then limited to the switching time as

specified in Table 1.

Switching frequency describes the time duration

between switching events. Switching time is the

time duration between the point the control signal

reaches 50% of the final value and the point the

output signal reaches within 10% or 90% of its

target value.

Spurious Performance

The typical low-frequency spurious performance

of the PE42820 in normal mode is –137 dBm (pin

16 = GND). If spur-free performance is desired,

the internal negative voltage generator can be

disabled by applying a negative voltage to VssEXT

(pin 16).

Optional External VSS Control (VSS_EXT)

For applications that require a faster switching rate

or spur-free performance, this part can be

operated in bypass mode. Bypass mode requires

an external negative voltage in addition to an

external VDD supply voltage.

As specified in Table 3, the external negative

voltage (VSS_EXT) when applied to pin 16 will

disable and bypass the internal negative voltage

generator.

Hot Switching Capability

The typical hot switching capability of the

PE42820 is +30 dBm. Hot switching occurs when

RF power is applied while switching between RF

ports.

Product Specification

PE42820

Page 5 of 12

Typical Performance Data @ +25 °C, VDD = 3.3V, VSS_EXT = 0V, unless otherwise noted

Figure 4. Insertion Loss vs. Temp (RFC–RFX) Figure 5. Insertion Loss vs. VDD (RFC–RFX)

Figure 6. RFC Port Return Loss vs. Temp

(RF1 Active) Figure 7. RFC Port Return Loss vs. VDD

(RF1 Active)

Product Specification

PE42820

Page 6 of 12

Typical Performance Data @ +25 °C, VDD = 3.3V, VSS_EXT = 0V, unless otherwise noted

Figure 8. Active Port Return Loss vs. Temp

(RF1 Active) Figure 9. Active Port Return Loss vs. VDD

(RF1 Active)

Figure 10. Isolation vs. Temp

(RFC–RFX, RFX Active) Figure 11. Isolation vs. VDD

(RFC–RFX, RFX Active)

Product Specification

PE42820

Page 7 of 12

Typical Performance Data @ +25 °C, VDD = 3.3V, VSS_EXT = 0V, unless otherwise noted

Figure 12. Isolation vs. Temp

(RFX–RFX, RFX Active) Figure 13. Isolation vs. VDD

(RFX–RFX, RFX Active)

Product Specification

PE42820

Page 8 of 12

Thermal Data

Though the insertion loss for this part is very low,

when handling high power RF signals, the junction

temperature rises significantly.

VSWR conditions that present short circuit loads to

the part can cause significantly more power

dissipation than with proper matching.

Special consideration needs to be made in the

design of the PCB to properly dissipate the heat

away from the part and maintain the 85°C maximum

case temperature. It is recommended to use best

design practices for high power QFN packages:

multi-layer PCBs with thermal vias in a thermal pad

soldered to the slug of the package. Special care

also needs to be made to alleviate solder voiding

under the part.

Table 6. Theta JC

Parameter Min Typ Max Unit

Theta JC (+85 °C) 20 C/W

Product Specification

PE42820

Page 9 of 12

Figure 14. Evaluation Board Layout

Evaluation Kit

The PE42820 evaluation kit board was designed

to ease customer evaluation of the PE42820 RF

switch.

The evaluation board in Figure 14 was designed

to test the part. DC power is supplied through

J10, with VDD on pin 9, and GND on the entire

lower row of even numbered pins. To evaluate a

switch path, add or remove jumpers on V1 (pin 3)

using Table 5.

The ANT port is connected through a 50Ω

transmission line via the top SMA connector, J1.

RF1 and RF2 paths are also connected through

50Ω transmission lines via SMA connectors as J2

and J3. A 50Ω through transmission line is

available via SMA connectors J5 and J6. This

transmission line can be used to estimate the

loss of the PCB over the environmental

conditions being evaluated. An open-ended 50Ω

transmission line is also provided at J4 for

calibration if needed.

Narrow trace widths are used near each part to

improve impedance matching. The shunt C1 on

RFC port is to provide for high frequency

impedance matching.

PRT-10605

Product Specification

PE42820

Page 10 of 12

Figure 15. Evaluation Board Schematic

DOC-13627

Product Specification

PE42820

Page 11 of 12

TO P VIEW BOT TOM VIEW

SIDE VIEW

RECOMMENDED LAND PATTERN

A0.10 C

(2X)

C

0.10 C

0.05 C

SEATI NG PLAN E

B

0.10 C

(2X)

0.10 C A B

0.05 C

ALL FEATURES

Pin #1 Corner

5.00

5.00 3.30±0.05

3.30±0.053.50

3.50

0.50

0.24±0.05

(X32)

0.375±0.05

(X32)

0.203

Ref. 0.05

0.85±0.05

0.575

(x32)

0.290

(x32)

3.35

5.20

3.35

5.20

0.50

(X28)

DETAIL A

1

8

9

16

17 24

25

32

0.18

0.15

0.10

DETAIL A

DOC-01872

Figure 16. Package Drawing

32-lead 5 × 5 mm QFN

Figure 17. Top Marking Specification

42820

YYWW

ZZZZZZ

17-0085

= Pin 1 indicator

YYWW = Date code, last two digits of the year and work week

ZZZZZZ = Six digits of the lot number

Product Specification

PE42820

Page 12 of 12

Figure 18. Tape and Reel Specs

Ao = 5.25 ± 0.1 mm

Bo = 5.25 ± 0.1 mm

Ko = 1.10 ± 0.1 mm

Notes: 1. 10 sprocket hole pitch cumulative tolerance ± 0.2.

2. Camber in compliance with EIA 481.

3. Pocket position relative to sprocket hole measured.

as true position of pocket, not pocket hole.

Device Orientation in Tape

Top of

Device

Pin 1

Table 7. Ordering Information

Order Code Description Package Shipping Method

PE42820MLBA-X PE42820 SPDT RF switch Green 32-lead 5 × 5 mm QFN 500 units/T&R

EK42820-02 PE42820 Evaluation kit Evaluation kit 1/Box

Advance Information:

The product is in a formative or design stage. The datasheet contains design target

specifications for product development. Specifications and features may change in any manner without notice.

Preliminary Specification:

The datasheet contains preliminary data. Additional data may be added at a later

date. Peregrine reserves the right to change specifications at any time without notice in order to supply the best

possible product.

Product Specification:

The datasheet contains final data. In the event Peregrine decides to

change the specifications, Peregrine will notify customers of the intended changes by issuing a CNF (Customer

Notification Form).

The informatio n in this datasheet i s believed to b e reliable. Ho wever, Peregrin e assume s no liability for the us e

of this inf o r m ati o n. U s e s hal l b e ent i rel y at th e u se r’ s o w n ri sk.

No patent rights or licenses to any circuits described in this datasheet are implied or granted to any third party.

Peregrine’s products are not designed or intended for use in devices or systems intended for surgical implant,

or in other applications intended to support or sustain life, or in any application in which the failure of the

Peregrine product could create a situation in which personal injury or death might occur. Peregrine assumes no

liability for damages, including consequential or incidental damages, arising out of the use of its products in

such applications.

The Peregrine name, logo, UltraCMOS and UTSi are registered trademarks and HaRP, MultiSwitch and DuNE

are trademarks of Peregrine Semiconductor Corp.

Peregrine products are protected under one or more of

the following U.S. Patents: http://patents.psemi.com.

Sales Contact and Information

For sales and contact information please visit www.psemi.com.