Care should be taken when the IC and the loads are both
powered from the same supply, and the supply is minimally
regulated. The QT160/161 derives its internal references
from the power supply, and sensitivity shifts can occur with
changes in Vdd, as happens when loads are switched on.
This can induce detection ‘cycling’, whereby an object is
detected, the load is turned on, the supply sags, the
detection is no longer sensed, the load is turned off, the
supply rises and the object is reacquired, ad infinitum. To
prevent this occurrence, the Out pins should only be lightly
loaded if the device is operated from an unregulated supply,
e.g. batteries. Detection ‘stiction’, the opposite effect, can
occur if a load is shed when an Out pin is active.
The outputs of the IC can directly drive LEDs with series
resistors. The LEDs should be connected with anodes to the
outputs and cathodes towards Vss, so that it lights when the
sensor is active.
2.3 AKS™ - Adjacent Key suppression
The QT160 (not QT161) features adjacent key suppression
for use in applications where keys are tightly spaced. If keys
are very close and a large finger touches one key, the keys
on either side might also activate. AKS stops detections on
adjacent keys by comparing relative signal levels among
them and choosing the key with the largest signal strength.
Key number 1 will cause a suppression of keys 6 and 2. Key
number 2 will cause a suppression of keys 1 and 3. Key 3
will cause a suppression of keys 2 and 4 and so on.
When a touch is detected on a key, but just before the
corresponding OUT pin is activated, a check is made for a
detection on the adjacent keys. If OUT is active on one or
both of the adjacent keys, or if a signal of greater strength is
found on them, the key is suppressed. This means that it is
not possible to activate both keys 3 and 4 for example; if 4 is
already on when 3 is touched, key 3 will be suppressed.
Likewise, if keys 3 and 4 are both touched, but 3 has a
weaker signal than 4 at the moment the decision is made,
then only key 4 will detect and 3 will be suppressed. Once
the detected key is released, the other key is free to detect.
Drift compensation also ceases for the key or keys which
have been suppressed, so long the signal on it is greater
than its threshold level.
This feature is also very effective on water films which bridge
over adjacent keys. When touching one key a water film will
‘transport’ the touch to the adjacent keys covered by the
same film. These side keys will receive less signal strength
than the key actually being touched, and so they will be
suppressed even if the signal they are detecting is large
enough to otherwise cause an output.
3 - CIRCUIT GUIDELINES
3.1 SAMPLE CAPACITOR
Charge sampler caps Cs can be virtually any plastic film or
low to medium-K ceramic capacitor. The acceptable Cs
range is from 10nF to 47nF depending on the sensitivity
required; larger values of Cs demand higher stability to
ensure reliable sensing. Acceptable capacitor types include
polyester film, PPS film, or NP0 / C0G ceramic.
3.2 OPTION STRAPPING
The option pins OPT1 and OPT2 should never be left
floating. If they are floated, the device can draw excess
power and the options will not be properly read.
See Table 2-1 for options. Note that the timings shown are
depend inversely on the oscillator frequency: Doubling the
recommended frequency will halve the timeouts.
3.3 POWER SUPPLY, PCB LAYOUT
The power supply can range from 4.5 to 5.5 volts. If this
fluctuates slowly with temperature, the QT160/161 will track
and compensate for these changes automatically with only
minor changes in sensitivity.
If the power supply is shared with another electronic system,
care should be taken to assure that the supply is free of
digital spikes, sags, and surges which can adversely affect
the IC. The QT160/161 will track slow changes in Vdd, but it
can be seriously affected by rapid voltage steps.
The supply is best locally regulated using a conventional
78L05 type regulator, or almost any 3-terminal LDO device
from 3V to 5V.
For proper operation a 0.1µF or greater bypass capacitor
should be used between Vdd and Vss; the bypass cap
should be placed very close to the device’s power pins.
3.4 OSCILLATOR
The oscillator should be a 10MHz resonator with ceramic
capacitors to ground on each side. 3-pin resonators with
built-in capacitors designed for the purpose are inexpensive
and commonly found. Manufacturers include AVX, Murata,
Panasonic, etc.
Alternatively an external clock source can be used in lieu of
a resonator. The OSC_I pin should be connected to the
external clock, and OSC_O should be left unconnected.
These ICs are fully synchronous, clocked devices that
operate all sections from the OSC_I clock. If the frequency of
OSC_I is changed, all timings will also change in direct
proportion, from the charge and transfer times to the
detection response times and the max on-duration timings.
3.5 UNUSED CHANNELS
Unused signal channels should not be left open. They
should have a small value non-critical dummy Cs capacitor
connected to their SNS pins to allow the internal circuit to
continue to function properly. A nominal value of 1nF
(1,000pF) X7R will suffice.
Unused channels should not have sense traces or
electrodes connected to them.
lQ
6 QT160/161 1.06/1102
infiniteGndGnd
DC Out
10sVddVdd
Toggle
60sGndVdd
DC Out
10sVddGnd
DC Out
Max On-DurationOPT2OPT1
Table 2-1 Strap Options