LTM8003
1
Rev E
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TYPICAL APPLICATION
FEATURES DESCRIPTION
40VIN, 3.5A Step-Down
Silent Switcher µModule
Regulator
The LT M
®
8003 is a 40VIN, 6A peak, 3.5A continuous
step-down Silent Switcher µModule
®
(power module)
regulator. The Silent Switcher architecture minimizes EMI
while delivering high efficiency at frequencies up to 3MHz.
Included in the package are the switching controller, power
switches, inductor, and all support components. Operating
over an input voltage range of 3.4V to 40V, the LTM8003
supports an output voltage range of 0.97V to 18V and a
switching frequency range of 200kHz to 3MHz, each set by
a single resistor. Only the input and output filter capacitors
are needed to finish the design.
The low profile package enables utilization of unused
space on the bottom of PC boards for high density point of
load regulation. The LTM8003 is packaged in a thermally
enhanced, compact over-molded ball grid array (BGA) pack-
age suitable for automated assembly by standard surface
mount equipment. The LTM8003 is RoHS compliant.
All registered trademarks and trademarks are the property of their respective owners.
Efficiency, VOUT = 5V
5VOUT from 7VIN to 40VIN Step-Down Converter
n Complete Step-Down Switch Mode Power Supply
n Low Noise Silent Switcher
®
Architecture
n Wide Input Voltage Range: 3.4V to 40V
n Wide Output Voltage Range: 0.97V to 18V
n Wide Temperature Range: –40°C to 150°C (H-Grade)
n 3.5A Continuous Output Current, 6A peak
n FMEA Compliant Pinout (LTM8003-3.3)
Output Stays at or Below Regulation Voltage During
Adjacent Pin Short or if a Pin Is Left Floating
n CISPR25 Class 5 Compliant
n Selectable Switching Frequency: 200kHz to 3MHz
n External Synchronization
n Low Quiescent Current: 25µA (5VOUT)
n Tiny, Low Profile 6.25mm × 9mm × 3.32mm RoHS
Compliant BGA Package
APPLICATIONS
n Automotive Battery Regulation
n Power for Portable Products
n Distributed Supply Regulation
n Industrial Supplies
n Wall Transformer Regulation
4.7µF
47µF
24.3k
41.2k
1MHz
LTM8003
VOUT
BIAS
VOUT
5V
3.5A
6A PEAK
VIN
VIN
7V TO 40V
FB
GND
RUN
SYNC
RT
8003 TA01a
PINS NOT USED IN THIS CIRCUIT: TR/SS, PG
LOAD CURRENT (A)
0
1
2
3
4
55
65
75
85
95
EFFICIENCY (%)
8003 TA01
12VIN
LTM8003
2
Rev E
For more information www.analog.com
PIN CONFIGURATION
ABSOLUTE MAXIMUM RATINGS
VIN, RUN, PG Voltage .............................................. 42V
VOUT, BIAS Voltage ................................................. 19V
FB, TR/SS Voltage ..................................................... 4V
SYNC Voltage ............................................................ 6V
(Notes 1, 2)
F
G
H
E
A
B
C
D
21 43 5 6
BGA PACKAGE
48-LEAD (9mm × 6.25mm × 3.32mm) BGA PACKAGE
TJMAX = 150°C, θJA = 24.7°C/W, θJCbottom = 4.5°C/W
θJCtop = 22.3°C/W, θJB = 4.2°C/W, WEIGHT = 0.5g
θ VALUES DETERMINED PER JEDEC51-9, 51-12
TOP VIEW
ADJUSTABLE VERSION
SYNC
GND
GND
RUN
NC
GNDBANK 1
BIAS
FB
VOUT
BANK2
VIN
BANK 3
PG
TR/SS
RT
F
G
H
E
A
B
C
D
21 43 5 6
BGA PACKAGE
48-LEAD (9mm × 6.25mm × 3.32mm) BGA PACKAGE
TJMAX = 150°C, θJA = 24.7°C/W, θJCbottom = 4.5°C/W
θJCtop = 22.3°C/W, θJB = 4.2°C/W, WEIGHT = 0.5g
θ VALUES DETERMINED PER JEDEC51-9, 51-12
TOP VIEW
FIXED OUTPUT VERSION
SYNC
GND
GND
RUN
NC
BIAS
BANK2
VIN
PG
TR/SS
RT
GNDBANK 1
VOUT
BANK 3
ORDER INFORMATION
PART NUMBER TERMINAL FINISH
PART MARKING* PACKAGE
TYPE
MSL
RATING TEMPERATURE RANGEDEVICE FINISH CODE
LTM8003IY#PBF SAC305 (RoHS) LTM8003 e1 BGA 3 –40°C to 125°C
LTM8003HY#PBF SAC305 (RoHS) LTM8003 e1 BGA 3 –40°C to 150°C
LTM8003IY SnPb (63/37) LTM8003 e0 BGA 3 –40°C to 125°C
LTM8003HY SnPb (63/37) LTM8003 e0 BGA 3 –40°C to 150°C
LTM8003IY-3.3#PBF SAC305 (RoHS) LTM8003-3.3 e1 BGA 3 –40°C to 125°C
LTM8003HY-3.3#PBF SAC305 (RoHS) LTM8003-3.3 e1 BGA 3 –40°C to 150°C
• Device temperature grade is indicated by a label on the shipping container.
• Pad or ball finish code is per IPC/JEDEC J-STD-609.
• BGA Package and Tray Drawings
• This product is not recommended for second side reflow.
This product is moisture sensitive. For more information, go to
Recommended BGA PCB Assembly and Manufacturing Procedures.
Maximum Internal Temperature (I-Grade) ........... 125°C
Maximum Internal Temperature (H-Grade) ......... 150°C
Storage Temperature (I-Grade) ........................... 125°C
Storage Temperature (H-Grade) ........... –50°C to 150°C
Peak Reflow Solder Body Temperature ............... 250°C
LTM8003
3
Rev E
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ELECTRICAL CHARACTERISTICS
Note 1: Stresses beyond those listed under Absolute Maximum Ratings
may cause permanent damage to the device. Exposure to any Absolute
Maximum Rating condition for extended periods may affect device
reliability and lifetime.
Note 2: Unless otherwise noted, the absolute minimum voltage is zero.
Note 3: The LTM8003I is guaranteed to meet specifications over the full
–40°C to 125°C internal operating temperature range. The LTM8003H
is guaranteed to meet specifications over the full –40°C to 150°C
internal operating temperature range. Note that the maximum internal
temperature is determined by specific operating conditions in conjunction
with board layout, the rated package thermal resistance and other
environmental factors. High junction temperatures degrade operating
lifetimes. Operating lifetime is derated at junction temperatures greater
than 125°C.
PARAMETER CONDITIONS MIN TYP MAX UNITS
Minimum Input Voltage VIN Rising l3.4 V
Output DC Voltage LTM8003, RFB Open
LTM8003, RFB = 5.62kΩ, VIN = 40V
LTM8003-3.3
0.97
18
3.3
V
Peak Output DC Current VOUT = 3.3V, fSW=1MHz 6 A
Quiescent Current into VIN RUN = 0V
BIAS = 0V, No Load, SYNC = 0V, Not Switching
3
8
µA
µA
Quiescent Current into BIAS BIAS = 5V, RUN = 0V
BIAS = 5V, No Load, SYNC = 0V, Not Switching
BIAS = 5V, VOUT = 3.3V, IOUT = 3.5A, fSW=1MHz
1
5
12
µA
µA
mA
Line Regulation 5.5V < VIN < 36V, IOUT = 1A 0.5 %
Load Regulation 0.1A < IOUT < 3.5A 0.5 %
Output Voltage Ripple IOUT = 3.5A 10 mV
Switching Frequency RT = 232kΩ
RT = 41.2kΩ
RT = 10.7kΩ
200
0.95
3
kHz
MHz
MHz
Voltage at FB LTM8003 l950 970 980 mV
Minimum BIAS Voltage (Note 5) 3.2 V
RUN Threshold Voltage 0.9 1.06 V
RUN Current 1 µA
TR/SS Current TR/SS = 0V 2 µA
TR/SS Pull Down TR/SS = 0.1V 200 Ω
PG Threshold Voltage at FB (Upper) FB Falling (Note 6, LTM8003) 1.05 V
PG Threshold Voltage at FB (Lower) FB Rising (Note 6, LTM8003) 0.89 V
PG Threshold Voltage at VOUT (Upper) VOUT Falling (Note 6, LTM8003-3.3) 3.57 V
PG Threshold Voltage at VOUT (Lower) VOUT Rising (Note 6, LTM8003-3.3) 3.03 V
PG Leakage Current PG = 42V 1 µA
PG Sink Current PG = 0.1V 150 µA
SYNC Threshold Voltage Synchronization 0.4 1.5 V
SYNC Voltage To Enable Spread Spectrum 2.9 4.2 V
SYNC Current SYNC = 0V 35 µA
The l denotes the specifications which apply over the specified operating
temperature range, otherwise specifications are at TJ = 25°C. VIN=12V, RUN = 2V, unless otherwise noted.
Note 4: The LTM8003 contains overtemperature protection that is
intended to protect the device during momentary overload conditions. The
internal temperature exceeds the maximum operating junction temperature
when the overtemperature protection is active. Continuous operation
above the specified maximum operating junction temperature may impair
device reliability.
Note 5: Below this specified voltage, internal circuitry will draw power
from VIN.
Note 6: PG transitions from low to high.
LTM8003
4
Rev E
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TYPICAL PERFORMANCE CHARACTERISTICS
Efficiency vs Load Current,
VOUT=0.97V, BIAS=5V
Efficiency vs Load Current,
VOUT=1.2V, BIAS=5V
Efficiency vs Load Current,
VOUT=1.5V, BIAS=5V
TA = 25°C, unless otherwise noted.
Efficiency vs Load Current,
VOUT=1.8V, BIAS=5V
Efficiency vs Load Current,
VOUT=2V, BIAS=5V
Efficiency vs Load Current,
VOUT=2.5V, BIAS=5V
Efficiency vs Load Current,
VOUT=3.3V, BIAS=5V
Efficiency vs Load Current,
VOUT=5V, BIAS=5V
Efficiency vs Load Current,
VOUT=8V, BIAS=5V
IN
IN
IN
LOAD CURRENT (A)
0
1
2
3
4
45
55
65
75
85
EFFICIENCY (%)
8003 G01
IN
IN
IN
LOAD CURRENT (A)
0
1
2
3
4
50
60
70
80
90
EFFICIENCY (%)
8003 G02
IN
IN
IN
LOAD CURRENT (A)
0
1
2
3
4
50
60
70
80
90
EFFICIENCY (%)
8003 G03
IN
IN
IN
LOAD CURRENT (A)
0
1
2
3
4
50
60
70
80
90
EFFICIENCY (%)
8003 G04
IN
IN
IN
LOAD CURRENT (A)
0
1
2
3
4
50
60
70
80
90
EFFICIENCY (%)
8003 G05
IN
IN
IN
LOAD CURRENT (A)
0
1
2
3
4
55
60
70
80
90
EFFICIENCY (%)
8003 G06
IN
IN
IN
LOAD CURRENT (A)
0
1
2
3
4
55
65
75
85
95
EFFICIENCY (%)
8003 G07
IN
IN
IN
LOAD CURRENT (A)
0
1
2
3
4
55
65
75
85
95
EFFICIENCY (%)
8003 G08
IN
IN
IN
LOAD CURRENT (A)
0
1
2
3
4
55
65
75
85
95
EFFICIENCY (%)
8003 G09
LTM8003
5
Rev E
For more information www.analog.com
TYPICAL PERFORMANCE CHARACTERISTICS
TA = 25°C, unless otherwise noted.
Efficiency vs Load Current,
VOUT=12V, BIAS=5V
Efficiency vs Load Current,
VOUT=15V, BIAS=5V
Efficiency vs Load Current,
VOUT=18V, BIAS=5V
Efficiency vs Load Current,
VOUT=–3.3V, BIASTied to
LTM8003 GND
Efficiency vs Load Current,
VOUT=–5V, BIASTied to
LTM8003 GND
Efficiency vs Load Current,
VOUT=–8V, BIASTied to
LTM8003 GND
Efficiency vs Load Current,
VOUT=–12V, BIASTied to
LTM8003 GND
Efficiency vs Load Current,
VOUT=–15V, BIASTied to
LTM8003 GND
Efficiency vs Load Current,
VOUT=–18V, BIASTied to
LTM8003 GND
IN
IN
LOAD CURRENT (A)
0
1
2
3
4
55
65
75
85
95
EFFICIENCY (%)
8003 G10
IN
IN
LOAD CURRENT (A)
0
1
2
3
4
60
70
80
90
100
EFFICIENCY (%)
8003 G11
IN
IN
LOAD CURRENT (A)
0
1
2
3
4
60
70
80
90
100
EFFICIENCY (%)
8003 G12
5V
IN
IN
IN
IN
LOAD CURRENT (A)
0
1
2
3
4
50
60
70
80
90
EFFICIENCY (%)
8003 G13
5V
IN
IN
IN
IN
LOAD CURRENT (A)
0
1
2
3
4
50
60
70
80
90
EFFICIENCY (%)
8003 G14
5V
IN
IN
IN
LOAD CURRENT (A)
0
1
2
3
4
50
60
70
80
90
EFFICIENCY (%)
8003 G15
5V
IN
IN
IN
LOAD CURRENT (A)
0
1
2
3
50
60
70
80
90
EFFICIENCY (%)
8003 G16
IN
IN
LOAD CURRENT (A)
0
0.5
1
1.5
2
2.5
50
60
70
80
90
EFFICIENCY (%)
8003 G17
IN
IN
LOAD CURRENT (A)
0
0.5
1
1.5
2
50
60
70
80
90
EFFICIENCY (%)
8003 G18
LTM8003
6
Rev E
For more information www.analog.com
TYPICAL PERFORMANCE CHARACTERISTICS
Input vs Load Current
VOUT=0.97V, BIAS = 5V
Input vs Load Current
VOUT=1.2V, BIAS = 5V
Input vs Load Current
VOUT=1.5V, BIAS = 5V
Input vs Load Current
VOUT=1.8V, BIAS = 5V
Input vs Load Current
VOUT=2V, BIAS = 5V
Input vs Load Current
VOUT=2.5V, BIAS = 5V
Input vs Load Current
VOUT=3.3V, BIAS = 5V
Input vs Load Current
VOUT=5V, BIAS = 5V
Input vs Load Current
VOUT=8V, BIAS = 5V
TA = 25°C, unless otherwise noted.
12V
IN
24V
IN
36V
IN
LOAD CURRENT (A)
0
2
4
6
0
0.2
0.4
0.6
0.8
INPUT CURRENT (A)
8003 G19
IN
IN
IN
LOAD CURRENT (A)
0
2
4
6
0
0.25
0.50
0.75
1.00
INPUT CURRENT (A)
8003 G20
IN
IN
IN
LOAD CURRENT (A)
0
2
4
6
0
0.3
0.6
0.9
1.2
INPUT CURRENT (A)
8003 G21
12V
IN
24V
IN
36V
IN
LOAD CURRENT (A)
0
2
4
6
0
0.25
0.50
0.75
1.00
1.25
INPUT CURRENT (A)
8003 G22
IN
IN
IN
LOAD CURRENT (A)
0
2
4
6
0
0.3
0.6
0.9
1.2
1.5
INPUT CURRENT (A)
8003 G23
IN
IN
IN
LOAD CURRENT (A)
0
2
4
6
0
0.4
0.8
1.2
1.6
INPUT CURRENT (A)
8003 G24
12V
IN
24V
IN
36V
IN
LOAD CURRENT (A)
0
2
4
6
0
0.5
1.0
1.5
2.0
2.5
INPUT CURRENT (A)
8003 G25
IN
IN
IN
LOAD CURRENT (A)
0
2
4
6
0
0.75
1.50
2.25
3.00
INPUT CURRENT (A)
8003 G26
IN
IN
IN
LOAD CURRENT (A)
0
2
4
6
0
1.0
2.0
3.0
4.0
5.0
INPUT CURRENT (A)
8003 G27
LTM8003
7
Rev E
For more information www.analog.com
TYPICAL PERFORMANCE CHARACTERISTICS
TA = 25°C, unless otherwise noted.
Input vs Load Current
VOUT=12V, BIAS = 5V
Input vs Load Current
VOUT=15V, BIAS = 5V
Input vs Load Current
VOUT=18V, BIAS = 5V
Input vs Load Current
VOUT=–3.3V, BIAS Tied to
LTM8003 GND
Input vs Load Current
VOUT=–5V, BIAS Tied to
LTM8003 GND
Input vs Load Current
VOUT=–8V, BIAS Tied to
LTM8003 GND
Input vs Load Current
VOUT=–12V, BIAS Tied to
LTM8003 GND
Input vs Load Current
VOUT=–15V, BIAS Tied to
LTM8003 GND
Input vs Load Current
VOUT=–18V, BIAS Tied to
LTM8003 GND
24V
IN
36V
IN
LOAD CURRENT (A)
0
2
4
6
0
1
2
3
4
INPUT CURRENT (A)
8003 G28
IN
IN
LOAD CURRENT (A)
0
2
4
6
0
1
2
3
4
INPUT CURRENT (A)
8003 G29
IN
IN
LOAD CURRENT (A)
0.0
1.0
2.0
3.0
4.0
5.0
6
0
1
2
3
4
5
INPUT CURRENT (A)
8003 G30
IN
IN
IN
LOAD CURRENT (A)
0
2
4
6
0
0.5
1.0
1.5
2.0
2.5
INPUT CURRENT (A)
8003 G31
IN
IN
IN
LOAD CURRENT (A)
0
2
4
6
0
1
2
3
INPUT CURRENT (A)
8003 G32
IN
IN
LOAD CURRENT (A)
0
1
2
3
4
5
0
1
2
3
4
INPUT CURRENT (A)
8003 G33
IN
IN
LOAD CURRENT (A)
0
1
2
3
0
1
2
3
4
INPUT CURRENT (A)
8003 G34
IN
IN
LOAD CURRENT (A)
0
0.5
1
1.5
2
2.5
0
1
2
3
4
INPUT CURRENT (A)
8003 G35
IN
IN
LOAD CURRENT (A)
0
0.5
1
1.5
2
0
1
2
3
4
INPUT CURRENT (A)
8003 G36
LTM8003
8
Rev E
For more information www.analog.com
TYPICAL PERFORMANCE CHARACTERISTICS
BIAS Current vs Load Current
VOUT=0.97V, BIAS=5V
BIAS Current vs Load Current
VOUT=1.2V, BIAS=5V
BIAS Current vs Load Current
VOUT=1.5V, BIAS=5V
BIAS Current vs Load Current
VOUT=1.8V, BIAS=5V
BIAS Current vs Load Current
VOUT=2V, BIAS=5V
BIAS Current vs Load Current
VOUT=2.5V, BIAS=5V
BIAS Current vs Load Current
VOUT=3.3V, BIAS=5V
BIAS Current vs Load Current
VOUT=5V, BIAS=5V
BIAS Current vs Load Current
VOUT=8V, BIAS=5V
TA = 25°C, unless otherwise noted.
IN
IN
IN
LOAD CURRENT (A)
0
2
4
6
2.0
2.5
3.0
3.5
4.0
4.5
BIAS CURRENT (mA)
8003 G37
12V
IN
24V
IN
36V
IN
LOAD CURRENT (A)
0
2
4
6
3.0
3.5
4.0
4.5
5.0
BIAS CURRENT (mA)
8003 G38
12V
IN
24V
IN
36V
IN
LOAD CURRENT (A)
0
2
4
6
3.0
3.5
4.0
4.5
5.0
5.5
BIAS CURRENT (mA)
8003 G39
12V
IN
24V
IN
36V
IN
LOAD CURRENT (A)
0
2
4
6
3.0
3.5
4.0
4.5
5.0
5.5
BIAS CURRENT (mA)
8003 G40
IN
IN
IN
LOAD CURRENT (A)
0
2
4
6
3.5
4.0
4.5
5.0
5.5
6.0
BIAS CURRENT (mA)
8003 G41
12V
IN
24V
IN
36V
IN
LOAD CURRENT (A)
0
2
4
6
4.0
4.5
5.0
5.5
6.0
6.5
BIAS CURRENT (mA)
8003 G42
IN
IN
IN
LOAD CURRENT (A)
0
2
4
6
4.5
5.0
5.5
6.0
6.5
7.0
BIAS CURRENT (mA)
8003 G43
12V
IN
24V
IN
36V
IN
LOAD CURRENT (A)
0
2
4
6
5
6
7
8
9
BIAS CURRENT (mA)
8003 G44
IN
IN
IN
LOAD CURRENT (A)
0
2
4
6
6
7
8
9
10
BIAS CURRENT (mA)
8003 G45
LTM8003
9
Rev E
For more information www.analog.com
TYPICAL PERFORMANCE CHARACTERISTICS
TA = 25°C, unless otherwise noted.
BIAS Current vs Load Current
VOUT=12V, BIAS=5V
BIAS Current vs Load Current
VOUT=15V, BIAS=5V
BIAS Current vs Load Current
VOUT=18V, BIAS=5V
Dropout Voltage vs Load Current,
VOUT=5V, BIAS=5V
Input Current vs VIN
VOUT Short Circuited
Maximum Load Current vs VIN
BIAS Open
Maximum Load Current vs VIN
BIAS Open
Derating, H-Grade, VOUT=0.97V,
BIAS=5V, DC2416A Demo Board
Derating, H-Grade, VOUT=1.2V,
BIAS=5V, DC2416A Demo Board
24V
IN
36V
IN
LOAD CURRENT (A)
0
2
4
6
7
8
9
10
11
12
BIAS CURRENT (mA)
8003 G46
IN
IN
LOAD CURRENT (A)
0
2
4
6
6
7
8
9
10
11
12
BIAS CURRENT (mA)
8003 G47
24V
IN
36V
IN
LOAD CURRENT (A)
0
2
4
6
7
8
9
10
11
12
BIAS CURRENT (mA)
8003 G48
LOAD CURRENT (A)
0
2
4
6
0
300
600
900
DROPOUT VOLTAGE (mV)
8003 G49
SYNC Grounded
SYNC Floating
V
IN
(V)
3
16
28
40
0
750
1500
2250
INPUT CURRENT (mA)
8003 G50
INPUT VOLTAGE (V)
0
10
20
30
40
0
1
2
3
4
5
6
MAXIMUM LOAD CURRENT (A)
8003 G51
–3.3V
OUT
OUT
OUT
INPUT VOLTAGE (V)
0
10
20
30
0.5
1.0
1.5
2.0
2.5
3.0
3.5
MAXIMUM LOAD CURRENT (A)
8003 G52
–12VOUT
–15VOUT
–18VOUT
AMBIENT TEMPERATURE (°C)
0
25
50
75
100
125
150
0
1
2
3
4
5
6
7
MAXIMUM LOAD CURRENT (A)
8003 G53
12VIN
24VIN
36VIN
0 LFM
AMBIENT TEMPERATURE (°C)
0
25
50
75
100
125
150
0
1
2
3
4
5
6
7
MAXIMUM LOAD CURRENT (A)
8003 G54
12VIN
24VIN
36VIN
0 LFM
LTM8003
10
Rev E
For more information www.analog.com
TYPICAL PERFORMANCE CHARACTERISTICS
Derating, H-Grade, VOUT=1.5V,
BIAS=5V, DC2416A Demo Board
Derating, H-Grade, VOUT=1.8V,
BIAS=5V, DC2416A Demo Board
Derating, H-Grade, VOUT=2V,
BIAS=5V, DC2416A Demo Board
Derating, H-Grade, VOUT=2.5V,
BIAS=5V, DC2416A Demo Board
Derating, H-Grade, VOUT=3.3V,
BIAS=5V, DC2416A Demo Board
Derating, H-Grade, VOUT=5V,
BIAS=5V, DC2416A Demo Board
Derating, H-Grade, VOUT=8V,
BIAS=5V, DC2416A Demo Board
Derating, H-Grade, VOUT=12V,
BIAS=5V, DC2416A Demo Board
Derating, H-Grade, VOUT=15V,
BIAS=5V, DC2416A Demo Board
TA = 25°C, unless otherwise noted.
AMBIENT TEMPERATURE (°C)
0
25
50
75
100
125
150
0
1
2
3
4
5
6
7
MAXIMUM LOAD CURRENT (A)
8003 G55
12VIN
24VIN
36VIN
0 LFM
AMBIENT TEMPERATURE (°C)
0
25
50
75
100
125
150
0
1
2
3
4
5
6
7
MAXIMUM LOAD CURRENT (A)
8003 G56
12VIN
24VIN
36VIN
0 LFM
AMBIENT TEMPERATURE (°C)
0
25
50
75
100
125
150
0
1
2
3
4
5
6
7
MAXIMUM LOAD CURRENT (A)
8003 G57
12VIN
24VIN
36VIN
0 LFM
AMBIENT TEMPERATURE (°C)
0
25
50
75
100
125
150
0
1
2
3
4
5
6
7
MAXIMUM LOAD CURRENT (A)
8003 G58
12VIN
24VIN
36VIN
0 LFM
AMBIENT TEMPERATURE (°C)
0
25
50
75
100
125
150
0
1
2
3
4
5
6
7
MAXIMUM LOAD CURRENT (A)
8003 G59
12VIN
24VIN
36VIN
0 LFM
AMBIENT TEMPERATURE (°C)
0
25
50
75
100
125
150
0
1
2
3
4
5
6
7
MAXIMUM LOAD CURRENT (A)
8003 G60
12VIN
24VIN
36VIN
0 LFM
AMBIENT TEMPERATURE (°C)
0
25
50
75
100
125
150
0
1
2
3
4
5
6
7
MAXIMUM LOAD CURRENT (A)
8003 G61
12VIN
24VIN
36VIN
0 LFM
AMBIENT TEMPERATURE (°C)
0
25
50
75
100
125
150
0
1
2
3
4
5
6
MAXIMUM LOAD CURRENT (A)
8003 G62
24VIN
36VIN
0 LFM
AMBIENT TEMPERATURE (°C)
0
25
50
75
100
125
150
0
1
2
3
4
5
6
MAXIMUM LOAD CURRENT (A)
8003 G63
24VIN
36VIN
0 LFM
LTM8003
11
Rev E
For more information www.analog.com
TYPICAL PERFORMANCE CHARACTERISTICS
TA = 25°C, unless otherwise noted.
Derating, H-Grade, VOUT=18V,
BIAS=5V, DC2416A Demo Board
Derating, H-Grade, VOUT=–3.3V,
BIAS Tied to LTM8003 GND,
DC2416A Demo Board
Derating, H-Grade, VOUT=–5V,
BIAS Tied to LTM8003 GND,
DC2416A Demo Board
Derating, H-Grade, VOUT=–8V,
BIAS Tied to LTM8003 GND,
DC2416A Demo Board
Derating, H-Grade, VOUT=–12V,
BIAS Tied to LTM8003 GND,
DC2416A Demo Board
Derating, H-Grade, VOUT=–15V,
BIAS Tied to LTM8003 GND,
DC2416A Demo Board
Derating, H-Grade, VOUT=–18V,
BIAS Tied to LTM8003 GND,
DC2416A Demo Board
Derating, I-Grade, VOUT=0.97V,
BIAS=5V, DC2416A Demo Board
Derating, I-Grade, VOUT=1.2V,
BIAS=5V, DC2416A Demo Board
AMBIENT TEMPERATURE (°C)
0
25
50
75
100
125
150
0
1
2
3
4
5
6
MAXIMUM LOAD CURRENT (A)
8003 G64
24VIN
36VIN
0 LFM
AMBIENT TEMPERATURE (°C)
0
25
50
75
100
125
150
0
1
2
3
4
5
6
MAXIMUM LOAD CURRENT (A)
8003 G65
12VIN
24VIN
36VIN
0 LFM
AMBIENT TEMPERATURE (°C)
0
25
50
75
100
125
150
0
1
2
3
4
5
MAXIMUM LOAD CURRENT (A)
8003 G66
12VIN
24VIN
36VIN
0 LFM
AMBIENT TEMPERATURE (°C)
0
25
50
75
100
125
150
0
1
2
3
4
MAXIMUM LOAD CURRENT (A)
8003 G67
12VIN
24VIN
0 LFM
AMBIENT TEMPERATURE (°C)
0
25
50
75
100
125
150
0
1
2
3
4
MAXIMUM LOAD CURRENT (A)
8003 G68
12VIN
24VIN
0 LFM
AMBIENT TEMPERATURE (°C)
0
25
50
75
100
125
150
0
0.5
1.0
1.5
2.0
2.5
MAXIMUM LOAD CURRENT (A)
8003 G69
12VIN
24VIN
0 LFM
AMBIENT TEMPERATURE (°C)
0
25
50
75
100
125
150
0
0.5
1.0
1.5
2.0
MAXIMUM LOAD CURRENT (A)
8003 G70
0 LFM
12V
IN
AMBIENT TEMPERATURE (°C)
0
25
50
75
100
125
0
1
2
3
4
5
6
7
MAXIMUM LOAD CURRENT (A)
8003 G71
12VIN
24VIN
36VIN
0 LFM
AMBIENT TEMPERATURE (°C)
0
25
50
75
100
125
0
1
2
3
4
5
6
7
MAXIMUM LOAD CURRENT (A)
8003 G72
12VIN
24VIN
36VIN
0 LFM
LTM8003
12
Rev E
For more information www.analog.com
TYPICAL PERFORMANCE CHARACTERISTICS
Derating, I-Grade, VOUT=1.5V,
BIAS=5V, DC2416A Demo Board
Derating, I-Grade, VOUT=1.8V,
BIAS=5V, DC2416A Demo Board
Derating, I-Grade, VOUT=2V,
BIAS=5V, DC2416A Demo Board
Derating, I-Grade, VOUT=2.5V,
BIAS=5V, DC2416A Demo Board
Derating, I-Grade, VOUT=3.3V,
BIAS=5V, DC2416A Demo Board
Derating, I-Grade, VOUT=5V,
BIAS=5V, DC2416A Demo Board
Derating, I-Grade, VOUT=8V,
BIAS=5V, DC2416A Demo Board
Derating, I-Grade, VOUT=12V,
BIAS=5V, DC2416A Demo Board
Derating, I-Grade, VOUT=15V,
BIAS=5V, DC2416A Demo Board
TA = 25°C, unless otherwise noted.
AMBIENT TEMPERATURE (°C)
0
25
50
75
100
125
0
1
2
3
4
5
6
7
MAXIMUM LOAD CURRENT (A)
8003 G73
12VIN
24VIN
36VIN
0 LFM
AMBIENT TEMPERATURE (°C)
0
25
50
75
100
125
0
1
2
3
4
5
6
7
MAXIMUM LOAD CURRENT (A)
8003 G74
12VIN
24VIN
36VIN
0 LFM
AMBIENT TEMPERATURE (°C)
0
25
50
75
100
125
0
1
2
3
4
5
6
7
MAXIMUM LOAD CURRENT (A)
8003 G75
12VIN
24VIN
36VIN
0 LFM
AMBIENT TEMPERATURE (°C)
0
25
50
75
100
125
0
1
2
3
4
5
6
7
MAXIMUM LOAD CURRENT (A)
8003 G76
12VIN
24VIN
36VIN
0 LFM
AMBIENT TEMPERATURE (°C)
0
25
50
75
100
125
0
1
2
3
4
5
6
7
MAXIMUM LOAD CURRENT (A)
8003 G77
12VIN
24VIN
36VIN
0 LFM
AMBIENT TEMPERATURE (°C)
0
25
50
75
100
125
0
1
2
3
4
5
6
MAXIMUM LOAD CURRENT (A)
8003 G78
12VIN
24VIN
36VIN
0 LFM
AMBIENT TEMPERATURE (°C)
0
25
50
75
100
125
0
1
2
3
4
5
6
MAXIMUM LOAD CURRENT (A)
8003 G79
12VIN
24VIN
36VIN
0 LFM
AMBIENT TEMPERATURE (°C)
0
25
50
75
100
125
0
1
2
3
4
5
6
MAXIMUM LOAD CURRENT (A)
8003 G80
24VIN
36VIN
0 LFM
AMBIENT TEMPERATURE (°C)
0
25
50
75
100
125
0
1
2
3
4
5
6
MAXIMUM LOAD CURRENT (A)
8003 G81
24VIN
36VIN
0 LFM
LTM8003
13
Rev E
For more information www.analog.com
TYPICAL PERFORMANCE CHARACTERISTICS
TA = 25°C, unless otherwise noted.
Derating, I-Grade, VOUT=18V,
BIAS=5V, DC2416A Demo Board
Derating, I-Grade, VOUT=–3.3V,
BIASTied to LTM8003 GND,
DC2416A Demo Board
Derating, I-Grade, VOUT=–5V,
BIASTied to LTM8003 GND,
DC2416A Demo Board
Derating, I-Grade, VOUT=–8V,
BIASTied to LTM8003 GND,
DC2416A Demo Board
Derating, I-Grade, VOUT=–12V,
BIASTied to LTM8003 GND,
DC2416A Demo Board
Derating, I-Grade, VOUT=–15V,
BIASTied to LTM8003 GND,
DC2416A Demo Board
Derating, I-Grade, VOUT=–18V,
BIASTied to LTM8003 GND,
DC2416A Demo Board
CISPR25 Class 5 Peak Radiated
DC2416A Demo Board, VOUT = 5V
Spread Spectrum Enabled
CISPR25 Class 5 Average Radiated
DC2416A Demo Board, VOUT = 5V
Spread Spectrum Enabled
AMBIENT TEMPERATURE (°C)
0
25
50
75
100
125
0
1
2
3
4
5
6
MAXIMUM LOAD CURRENT (A)
8003 G82
24VIN
36VIN
0 LFM
AMBIENT TEMPERATURE (°C)
0
25
50
75
100
125
0
1
2
3
4
5
6
MAXIMUM LOAD CURRENT (A)
8003 G83
12VIN
24VIN
36VIN
0 LFM
AMBIENT TEMPERATURE (°C)
0
25
50
75
100
125
0
1
2
3
4
5
MAXIMUM LOAD CURRENT (A)
8003 G84
12VIN
24VIN
36VIN
0 LFM
12VIN
24VIN
0
25
50
75
100
125
0
1
2
3
4
5
MAXIMUM LOAD CURRENT (A)
8003 G85
AMBIENT TEMPERATURE (°C)
0 LFM
0 LFM
AMBIENT TEMPERATURE (°C)
0
25
50
75
100
125
0
1
2
3
MAXIMUM LOAD CURRENT (A)
8003 G86
12VIN
24VIN
AMBIENT TEMPERATURE (°C)
0
25
50
75
100
125
0
0.5
1.0
1.5
2.0
MAXIMUM LOAD CURRENT (A)
8003 G87
0 LFM
IN
IN
AMBIENT TEMPERATURE (°C)
0
25
50
75
100
125
0
0.5
1.0
1.5
2.0
MAXIMUM LOAD CURRENT (A)
8003 G88
IN
0 LFM
FREQUENCY (MHz)
0
10
20
30
–10
0
10
20
30
40
50
AMPLITUDE (dBuV/m)
8053 G89
VERTICAL POLARIZATION
fSW = 2MHz
IOUT = 3.5A
VERTICAL POLARIZATION
fSW = 2MHz
IOUT = 3.5A
FREQUENCY (MHz)
0
10
20
30
–10
0
10
20
30
40
50
AMPLITUDE (dBuV/m)
8053 G90
LTM8003
14
Rev E
For more information www.analog.com
PIN FUNCTIONS
GND (Bank 1, A1, A6): Tie these GND pins to a local ground
plane below the LTM8003 and the circuit components.
In most applications, the bulk of the heat flow out of the
LTM8003 is through these pads, so the printed circuit
design has a large impact on the thermal performance of
the part. See the PCB Layout and Thermal Considerations
sections for more details.
VIN (Bank 2): VIN supplies current to the LTM8003’s in-
ternal regulator and to the internal power switch. These
pins must be locally bypassed with an external, low ESR
capacitor; see Table 1 for recommended values.
VOUT (Bank 3): Power Output Pins. Apply the output filter
capacitor and the output load between these pins and
GND pins.
BIAS (Pins G1, G2): The BIAS pin connects to the internal
power bus. Connect to a power source greater than 3.2V
and less than 18V. If VOUT is greater than 3.2V, connect
this pin there. If the output voltage is less, connect this to a
voltage source above 3.2V. Decouple this pin with at least
1µF if the voltage source for BIAS is remote. If unused or
generating a negative output, tie BIAS to LTM8003 GND.
RUN (Pins B5, B6): Pull the RUN pin below 0.9V to shut
down the LTM8003. Tie to 1.06V or more for normal
operation. If the shutdown feature is not used, tie this
pin to the VIN pin.
RT (Pins A4, A5): The RT pin is used to program the
switching frequency of the LTM8003 by connecting a resis-
tor from this pin to ground. The Applications Information
section of the data sheet includes a table to determine the
resistance value based on the desired switching frequency.
Minimize capacitance at this pin. Do not drive this pin.
SYNC (Pins A2, B2): External clock synchronization input
and operational mode. This pin programs four different
operating modes:
1. Burst Mode
®
. Tie this pin to ground for Burst Mode
operation at low output loads—this will result in ultralow
quiescent current.
2. Pulse-skipping mode. Float this pin for pulse-skipping
mode. This mode offers full frequency operation down
to low output loads before pulse skipping occurs.
3. Spread spectrum mode. Tie this pin high (between
2.9V and 4.2V) for pulse-skipping mode with spread
spectrum modulation.
4. Synchronization mode. Drive this pin with a clock source
to synchronize to an external frequency. During synchro-
nization the part will operate in pulse-skipping mode.
PG (Pin B1, C1): The PG pin is the open-collector output
of an internal comparator. PG remains low until the FB
pin voltage is within about 10% of the final regulation
CISPR25 Class 5 Peak Radiated
DC2416A Demo Board, VOUT = 5V
Spread Spectrum Enabled
CISPR25 Class 5 Average Radiated
DC2416A Demo Board, VOUT = 5V
Spread Spectrum Enabled
fSW = 2MHz
IOUT = 3.5A
FREQUENCY (MHz)
0
200
400
600
800
1000
–10
0
10
20
30
40
50
AMPLITUDE (dBuV/m)
8053 G91
VERTICAL POLARIZATION
fSW = 2MHz
IOUT = 3.5A
FREQUENCY (MHz)
0
200
400
600
800
1000
–10
0
10
20
30
40
50
AMPLITUDE (dBuV/m)
8053 G92
TYPICAL PERFORMANCE CHARACTERISTICS
TA = 25°C, unless otherwise noted.
LTM8003
15
Rev E
For more information www.analog.com
BLOCK DIAGRAM
PIN FUNCTIONS
BIAS
VOUT
VIN
FB
GND
RUN
TR/SS SYNC RT PG
8003 BD01
CURRENT
MODE
CONTROLLER
0.2µF
10pF
0.01µF
1.3µH
100k
BIAS
VOUT
VIN
GND
RUN
TR/SS SYNC RT PG
8003 BD02
CURRENT
MODE
CONTROLLER
0.2µF
10pF
0.01µF
1.3µH
INTERNAL
0.97V
FEEDBACK
LTM8003 Block Diagram
LTM8003-3.3 Block Diagram
voltage. The PG signal is valid when VIN is above 3.4V. If
VIN is above 3.4V and RUN is low, PG will drive low. If this
function is not used, leave this pin floating.
FB (Pin F1, F2): The LTM8003 regulates its FB pin to 0.97V.
Connect the adjust resistor from this pin to ground. The
value of RFB is given by the equation RFB = 97/(VOUT–0.97),
where RFB is in kΩ.
TR/SS (Pin A3, B3): The TR/SS pin is used to provide a
soft-start or tracking function. The internal 2μA pull-up
current in combination with an external capacitor tied to
this pin creates a voltage ramp. If TR/SS is less than 0.97V,
the output voltage tracks to this value. For tracking, tie a
resistor divider to this pin from the tracked output. This
pin is pulled to ground with an internal MOSFET during
shutdown and fault conditions; use a series resistor if
driving from a low impedance output. This pin may be left
floating if the tracking function is not needed.
NC (Pins C5, D5, E5, E6): These pins are not connected,
either to any other net or each other.
LTM8003
16
Rev E
For more information www.analog.com
OPERATION
The LTM8003 is a stand-alone non-isolated step-down
switching DC/DC power supply that can deliver up to
6A. The continuous current is determined by the internal
operating temperature. It provides a precisely regulated
output voltage programmable via one external resistor
from 0.97V to 18V. The input voltage range is 3.4V to 40V.
Given that the LTM8003 is a step-down converter, make
sure that the input voltage is high enough to support the
desired output voltage and load current. Simplified Block
Diagrams are given on the previous page.
The LTM8003 contains a current mode controller, power
switching elements, power inductor and a modest amount
of input and output capacitance. The LTM8003 is a fixed
frequency PWM regulator. The switching frequency is set
by simply connecting the appropriate resistor value from
the RT pin to GND.
An internal regulator provides power to the control cir-
cuitry. This bias regulator normally draws power from the
VIN pin, but if the BIAS pin is connected to an external
voltage higher than 3.2V, bias power is drawn from the
external source (typically the regulated output voltage).
This improves efficiency. The RUN pin is used to place
the LTM8003 in shutdown, disconnecting the output and
reducing the input current to a few µA.
To enhance efficiency, the LTM8003 automatically switches
to Burst Mode operation in light or no load situations.
Between bursts, all circuitry associated with controlling
the output switch is shut down reducing the input supply
current to just a few µA.
The oscillator reduces the LTM8003’s operating frequency
when the voltage at the FB pin is low. This frequency fold-
back helps to control the output current during start-up
and overload.
The TR/SS node acts as an auxiliary input to the error
amplifier
. The voltage at FB servos to the TR/SS voltage
until TR/SS goes above about 0.97V. Soft-start is imple-
mented by generating a voltage ramp at the TR/SS pin
using an external capacitor which is charged by an internal
constant current. Alternatively, driving the TR/SS pin with
a signal source or resistive network provides a tracking
function. Do not drive the TR/SS pin with a low impedance
voltage source. See the Applications Information section
for more details.
The LTM8003 contains a power good comparator which
trips when the FB pin is at about 90% to 110% of its
regulated value. The PG output is an open-drain transistor
that is off when the output is in regulation, allowing an
external resistor to pull the PG pin high. The PG signal
is valid when VIN is above 3.4V. If VIN is above 3.4V and
RUN is low, PG will drive low.
The LTM8003 is equipped with a thermal shutdown that
inhibits power switching at high junction temperatures.
The activation threshold of this function is above the maxi-
mum temperature rating to avoid interfering with normal
operation, so prolonged or repetitive operation under a
condition in which the thermal shutdown activates may
damage or impair the reliability of the device.
LTM8003
17
Rev E
For more information www.analog.com
For most applications, the design process is straight-
forward, summarized as follows:
1. Look at Table 1 and find the row that has the desired
input range and output voltage.
2. Apply the recommended CFF, CIN, COUT, RFB and RT
values.
3. Apply the CFF (from VOUT to FB) as required.
4. Connect BIAS as indicated.
While these component combinations have been tested
for proper operation, it is incumbent upon the user to
verify proper operation over the intended system’s line,
APPLICATIONS INFORMATION
load and environmental conditions. Bear in mind that the
maximum output current is limited by junction tempera-
ture, the relationship between the input and output voltage
magnitude and polarity and other factors. Please refer to
the graphs in the Typical Performance Characteristics
section for guidance.
The maximum frequency (and attendant RT value) at
which the LTM8003 should be allowed to switch is given
in Table 1 in the Maximum fSW column, while the recom-
mended frequency (and RT value) for optimal efficiency
over the given input condition is given in the fSW column.
There are additional conditions that must be satisfied if
the synchronization function is used. Please refer to the
Synchronization section for details.
Table 1. Recommended Component Values and Configuration (TA = 25°C)
VIN VOUT
(V)
RFB
(kΩ)
CIN2COUT CFF
(pF)
BIAS
(V)
fSW RT
(kΩ)
Maximum
fSW
Minimum RT
(kΩ)
3.4V to 40V 0.97 Open 4.7µF 50V 1206 X5R 2x 100µF 6.3V 1210 X5R 47 3.2 to 19 450kHz 97.6 675kHz 63.4
3.4V to 40V 1.2 402 4.7µF 50V 1206 X5R 2x 100µF 6.3V 1210 X5R 47 3.2 to 19 550kHz 78.7 850kHz 49.9
3.4V to 40V 1.5 174 4.7µF 50V 1206 X5R 100µF 6.3V 1210 X5R 27 3.2 to 19 600kHz 71.5 1.1MHz 36.5
3.4V to 40V 1.8 115 4.7µF 50V 1206 X5R 100µF 6.3V 1210 X5R 10 3.2 to 19 600kHz 71.5 1.3MHz 30.9
3.4V to 40V 2.0 90.9 4.7µF 50V 1206 X5R 100µF 0805 4V X5R 3.2 to 19 650kHz 64.9 1.4MHz 28.0
4V to 40V12.5 63.4 4.7µF 50V 1206 X5R 100µF 0805 4V X5R 3.2 to 19 750kHz 56.2 1.8MHz 20.5
5V to 40V13.3 41.2 4.7µF 50V 1206 X5R 100µF 0805 4V X5R 3.2 to 19 850kHz 48.7 2.3MHz 14.7
7V to 40V15 24.3 4.7µF 50V 1206 X5R 47µF 6.3V 0805 X5R 3.2 to 19 1MHz 40.2 3MHz 10.7
11V to 40V18 13.7 4.7µF 50V 1206 X5R 22µF 1206 10V X7R 3.2 to 19 1.2MHz 33.2 3MHz 10.7
16V to 40V112 8.66 4.7µF 50V 1206 X5R 10µF 0805 16V X7S 3.2 to 19 1.5MHz 25.5 3MHz 10.7
19.5 to 40V115 6.81 4.7µF 50V 1206 X5R 10µF 0805 16V X7S 3.2 to 19 1.5MHz 25.5 3MHz 10.7
23.5V to 40V118 5.62 4.7µF 50V 1206 X5R 10µF 1206 25V X5R 3.2 to 19 1.5MHz 25.5 3MHz 10.7
5V to 22V1–18 5.62 4.7µF 50V 1206 X5R 10µF 1206 25V X5R LTM8003 GND 1.5MHz 25.5 3MHz 10.7
4.5V to 25V1–15 6.81 4.7µF 50V 1206 X5R 10µF 0805 16V X7S LTM8003 GND 1.5MHz 25.5 3MHz 10.7
3.4V to 28V1–12 8.66 4.7µF 50V 1206 X5R 10µF 0805 16V X7S LTM8003 GND 1.5MHz 25.5 3MHz 10.7
3.4V to 32V1–8 13.7 4.7µF 50V 1206 X5R 22µF 1206 10V X7R LTM8003 GND 1.2MHz 33.2 3MHz 10.7
3.4V to 351–5 24.3 4.7µF 50V 1206 X5R 47µF 6.3V 0805 X5R LTM8003 GND 1MHz 40.2 3MHz 10.7
3.4V to 36V1–3.3 41.2 4.7µF 50V 1206 X5R 100µF 0805 4V X5R LTM8003 GND 850kHz 48.7 2.3MHz 14.7
1. The LTM8003 may be capable of lower input voltages but may skip switching cycles.
2. An input bulk capacitor is required
LTM8003
18
Rev E
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Capacitor Selection Considerations
The CIN and COUT capacitor values in Table 1 are the
minimum recommended values for the associated oper-
ating conditions. Applying capacitor values below those
indicated in Table 1 is not recommended and may result
in undesirable operation. Using larger values is generally
acceptable, and can yield improved dynamic response, if
it is necessary. Again, it is incumbent upon the user to
verify proper operation over the intended system’s line,
load and environmental conditions.
Ceramic capacitors are small, robust and have very low
ESR. However, not all ceramic capacitors are suitable.
X5R and X7R types are stable over temperature and ap-
plied voltage and give dependable service. Other types,
including Y5V and Z5U have very large temperature and
voltage coefficients of capacitance. In an application cir-
cuit they may have only a small fraction of their nominal
capacitance resulting in much higher output voltage ripple
than expected.
Ceramic capacitors are also piezoelectric. In Burst Mode
operation, the LTM8003’s switching frequency depends
on the load current, and can excite a ceramic capacitor
at audio frequencies, generating audible noise. Since the
LTM8003 operates at a lower current limit during Burst
Mode operation, the noise is typically very quiet to a
casual ear.
If this audible noise is unacceptable, use a high perfor-
mance electrolytic capacitor at the output. It may also be
a parallel combination of a ceramic capacitor and a low
cost electrolytic capacitor
.
A final precaution regarding ceramic capacitors concerns
the maximum input voltage rating of the LTM8003. A
ceramic input capacitor combined with trace or cable
inductance forms a high-Q (underdamped) tank circuit.
If the LTM8003 circuit is plugged into a live supply, the
input voltage can ring to twice its nominal value, possi-
bly exceeding the device’s rating. This situation is easily
avoided; see the Hot-Plugging Safely section.
Frequency Selection
The LTM8003 uses a constant frequency PWM architec-
ture that can be programmed to switch from 200kHz to
3MHz by using a resistor tied from the RT pin to ground.
Table 2 provides a list of RT resistor values and their
resultant frequencies.
Table 2. SW Frequency vs RT Value
fSW (MHz) RT (kΩ)
0.2 232
0.3 150
0.4 110
0.5 88.7
0.6 71.5
0.7 60.4
0.8 52.3
1.0 40.2
1.2 33.2
1.4 28.0
1.6 23.7
1.8 20.5
2.0 18.2
2.2 15.8
3.0 10.7
Operating Frequency Trade-Offs
It is recommended that the user apply the optimal RT
value given in Table 1 for the input and output operating
condition. System level or other considerations, however,
may necessitate another operating frequency. While the
LTM8003 is flexible enough to accommodate a wide
range of operating frequencies, a haphazardly chosen
one may result in undesirable operation under certain
operating or fault conditions. A frequency that is too
high can reduce efficiency, generate excessive heat or
even damage the LTM8003 if the output is overloaded
or short-circuited. A frequency that is too low can result
in a final design that has too much output ripple or too
large of an output capacitor.
LTM8003
19
Rev E
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BIAS Pin Considerations
The BIAS pin is used to provide drive power for the in-
ternal power switching stage and operate other internal
circuitry. For proper operation, it must be powered by at
least 3.2V. If the output voltage is programmed to 3.2V
or higher, BIAS may be simply tied to VOUT. If VOUT is less
than 3.2V, BIAS can be tied to VIN or some other voltage
source. If the BIAS pin voltage is too high, the efficiency
of the LTM8003 may suffer. The optimum BIAS voltage
is dependent upon many factors, such as load current,
input voltage, output voltage and switching frequency. In
all cases, ensure that the maximum voltage at the BIAS pin
is less than 19V. If BIAS power is applied from a remote
or noisy voltage source, it may be necessary to apply a
decoupling capacitor locally to the pin. A 1µF ceramic
capacitor works well. The BIAS pin may also be left open
at the cost of a small degradation in efficiency. If unused
or generating a negative output, tie BIAS to LTM8003 GND.
Maximum Load
The maximum practical continuous load that the LTM8003
can drive, while rated at 3.5A, actually depends upon both
the internal current limit and the internal temperature.
The internal current limit is designed to prevent damage
to the LTM8003 in the case of overload or short-circuit.
The internal temperature of the LTM8003 depends upon
operating conditions such as the ambient temperature,
the power delivered, and the heat sinking capability of the
system. For example, if the LTM8003H is configured to
regulate at 1.2V, it may continuously deliver 6A from 12VIN
if the ambient temperature is controlled to less than 50°C.
This is quite a bit higher than the 3.5A continuous rating.
Please see the “Derating, H-Grade, VOUT = 1.2V” curve in
the Typical Performance Characteristics section. Similarly,
if the output voltage is 18V and the ambient temperature
is 100°C, the LTM8003H will deliver at most 2.7A from
24VIN, which is less than the 3.5A continuous rating.
Load Sharing
Neither the LTM8003 nor LTM8003-3.3 are designed to
load share.
Burst Mode Operation
To enhance efficiency at light loads, the LTM8003 auto-
matically switches to Burst Mode operation which keeps
the output capacitor charged to the proper voltage while
minimizing the input quiescent current. During Burst
Mode operation, the LTM8003 delivers single cycle bursts
of current to the output capacitor followed by sleep periods
where most of the internal circuitry is powered off and
energy is delivered to the load by the output capacitor.
During the sleep time, VIN and BIAS quiescent currents
are greatly reduced, so, as the load current decreases
towards a no load condition, the percentage of time that
the LTM8003 operates in sleep mode increases and the
average input current is greatly reduced, resulting in
higher light load efficiency.
Burst Mode operation is enabled by tying SYNC to GND.
Minimum Input Voltage
The LTM8003 is a step-down converter, so a minimum
amount of headroom is required to keep the output in
regulation. Keep the input above 3.4V to ensure proper
operation. Voltage transients or ripple valleys that cause
the input to fall below 3.4V may turn off the LTM8003.
Output Voltage Tracking and Soft-Start
The LTM8003 allows the user to adjust its output voltage
ramp rate by means of the TR/SS pin. An internal 2μA pulls
up the TR/SS pin to about 2.4V. Putting an external capaci-
tor on TR/SS enables soft starting the output to reduce
current surges on the input supply. During the soft-start
ramp the output voltage will proportionally track the TR/
SS pin voltage. For output tracking applications, TR/SS
can be externally driven by another voltage source. From
0V to 0.97V, the TR/SS voltage will override the internal
0.97V reference input to the error amplifier, thus regulat-
ing the FB pin voltage to that of the TR/SS pin. When TR/
SS is above 0.97V, tracking is disabled and the feedback
voltage will regulate to the internal reference voltage. The
TR/SS pin may be left floating if the function is not needed.
LTM8003
20
Rev E
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An active pull-down circuit is connected to the TR/SS pin
which will discharge the external soft-start capacitor in
the case of fault conditions and restart the ramp when the
faults are cleared. Fault conditions that clear the soft-start
capacitor are the RUN pin transitioning low, VIN voltage
falling too low, or thermal shutdown.
Pre-Biased Output
As discussed in the Output Voltage Tracking and Soft-
Start section, the LTM8003 regulates the output to the
FB voltage determined by the TR/SS pin whenever TR/
SS is less than 0.97V. If the LTM8003 output is higher
than the target output voltage, the LTM8003 will attempt
to regulate the output to the target voltage by returning a
small amount of energy back to the input supply. If there
is nothing loading the input supply, its voltage may rise.
Take care that it does not rise so high that the input voltage
exceeds the absolute maximum rating of the LTM8003.
Frequency Foldback
The LTM8003 is equipped with frequency foldback which
acts to reduce the thermal and energy stress on the internal
power elements during a short circuit or output overload
condition. If the LTM8003 detects that the output has
fallen out of regulation, the switching frequency is reduced
as a function of how far the output is below the target
voltage. This in turn limits the amount of energy that can
be delivered to the load under fault. During the start-up
time, frequency foldback is also active to limit the energy
delivered to the potentially large output capacitance of
the load. When a clock is applied to the SYNC pin, the
SYNC pin is floated or held high, the frequency foldback
is disabled, and the switching frequency will slow down
only during overcurrent conditions.
Synchronization
To select low ripple Burst Mode operation, tie the SYNC
pin below about 0.4V (this can be ground or a logic low
output). To synchronize the LTM8003 oscillator to an
external frequency, connect a square wave (with about
20% to 80% duty cycle) to the SYNC pin. The square
wave amplitude should have valleys that are below 0.4V
and peaks above 1.5V.
The LTM8003 will not enter Burst Mode operation at low
output loads while synchronized to an external clock, but
instead will pulse skip to maintain regulation. The LTM8003
may be synchronized over a 200kHz to 3MHz range. The RT
resistor should be chosen to set the switching frequency
equal to or below the lowest synchronization input. For
example, if the synchronization signal will be 500kHz and
higher, the RT should be selected for 500kHz.
For some applications it is desirable for the LTM8003 to
operate in pulse-skipping mode, offering two major dif-
ferences from Burst Mode operation. The first is that the
clock stays awake at all times and all switching cycles
are aligned to the clock. The second is that full switching
frequency is reached at lower output load than in Burst
Mode operation. These two differences come at the expense
of increased quiescent current. To enable pulse-skipping
mode, the SYNC pin is floated.
The LTM8003 features spread spectrum operation to
further reduce EMI/EMC emissions. To enable spread
spectrum operation, apply between 2.9V and 4.2V to the
SYNC pin. In this mode, triangular frequency modulation
is used to vary the switching frequency between the value
programmed by RT to about 20% higher than that value.
The modulation frequency is about 3kHz. For example, when
the LTM8003 is programmed to 2MHz, the frequency will
vary from 2MHz to 2.4MHz at a 3kHz rate. When spread
spectrum operation is selected, Burst Mode operation is
disabled, and the part will run in pulse-skipping mode.
The LTM8003 does not operate in forced continuous mode
regardless of SYNC signal.
Negative Output
The LTM8003 is capable of generating a negative output
voltage by connecting its VOUT to system GND and the
LTM8003 GND to the negative voltage rail. An example
of this is shown in the Typical Applications section. The
LTM8003
21
Rev E
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APPLICATIONS INFORMATION
most versatile way to generate a negative output is to
use a dedicated regulator that was designed to generate
a negative voltage, but using a buck regulator like the
LTM8003 to generate a negative voltage is a simple and
cost effective solution, as long as certain restrictions are
kept in mind.
NEGATIVE
OUTPUT VOLTAGE
LTM8003
VOUT
VIN
8003 F01
GND
VIN
Figure1. The LTM8003 Can Be Used to Generate a Negative Voltage
Figure1 shows a typical negative output voltage application.
Note that LTM8003 VOUT is tied to system GND and input
power is applied from VIN to LTM8003 VOUT. As a result,
the LTM8003 is not behaving as a true buck regulator,
and the maximum output current depends upon the input
voltage. In the example shown in the Typical Applications
section, there is an attending graph that shows how much
current the LTM8003 can deliver for given input voltages.
FAST LOAD
TRANSIENT
OUTPUT TRANSIENT
RESPONSE
LTM8003
VOUT
VIN
8003 F02
GND
VIN
Figure2. Any Output Voltage Transient Appears on LTM8003 GND
Note that this configuration requires that any load current
transient will directly impress the transient voltage onto
the LTM8003 GND, as shown in Figure2, so fast load
transients can disrupt the LTM8003’s operation or even
cause damage.
FAST VIN
TRANSIENT
OUTPUT EXPERIENCES
A POSITIVE TRANSIENT
LTM8003
VOUT
VIN
8003 F03
GND
COUT
CIN
OPTIONAL
SCHOTTKY
DIODE
AC DIVIDER
VIN
Figure3. A Schottky Diode Can Limit the Transient Caused by
a Fast Rising VIN to Safe Levels
The CIN and COUT capacitors in Figure3 form an AC divider
at the negative output voltage node. If VIN is hot-plugged
or rises quickly, the resultant VOUT will be a positive tran-
sient, which may be unhealthy for the application load.
An anti-parallel Schottky diode may be able to prevent
this positive transient from damaging the load. The loca-
tion of this Schottky diode is important. For example, in
a system where the LTM8003 is far away from the load,
placing the Schottky diode closest to the most sensitive
load component may be the best design choice. Care-
fully evaluate whether the negative buck configuration is
suitable for the application. When generating a negative
output voltage, tie BIAS to LTM8003 GND.
Shorted Input Protection
Care needs to be taken in systems where the output is held
high when the input to the LTM8003 is absent. This may
occur in battery charging applications or in battery backup
systems where a battery or some other supply is diode
ORed with the LTM8003’s output. If the VIN pin is allowed
to float and the RUN pin is held high (either by a logic signal
or because it is tied to VIN), then the LTM8003’s internal
circuitry pulls its quiescent current through its internal
power switch. This is fine if your system can tolerate a
few milliamps in this state. If you ground the RUN pin, the
internal current drops to essentially zero. However, if the
VIN pin is grounded while the output is held high, parasitic
LTM8003
22
Rev E
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diodes inside the LTM8003 can pull large currents from
the output through the VIN pin. Figure4 shows a circuit
that runs only when the input voltage is present and that
protects against a shorted or reversed input.
LTM8003
VIN
VIN
8003 F04
RUN
Figure4. The Input Diode Prevents a Shorted Input from
Discharging a Backup Battery Tied to the Output. It Also
Protects the Circuit from a Reversed Input. The LTM8003 Runs
Only When the Input Is Present
PCB Layout
Most of the headaches associated with PCB layout have
been alleviated or even eliminated by the high level of
integration of the LTM8003. The LTM8003 is neverthe-
less a switching power supply, and care must be taken to
minimize EMI and ensure proper operation. Even with the
high level of integration, you may fail to achieve specified
operation with a haphazard or poor layout. See Figure5
for a suggested layout. Ensure that the grounding and
heat sinking are acceptable.
A few rules to keep in mind are:
1. Place CFF, RFB and RT as close as possible to their
respective pins.
2. Place the CIN capacitor as close as possible to the VIN
and GND connection of the LTM8003.
3. Place the COUT capacitor as close as possible to the
VOUT and GND connection of the LTM8003.
4. Place the CIN and COUT capacitors such that their
ground current flow directly adjacent to or underneath
the LTM8003.
5. Connect all of the GND connections to as large a copper
pour or plane area as possible on the top layer. Avoid
breaking the ground connection between the external
components and the LTM8003.
6. Use vias to connect the GND copper area to the board’s
internal ground planes. Liberally distribute these GND
vias to provide both a good ground connection and
thermal path to the internal planes of the printed circuit
board. Pay attention to the location and density of the
thermal vias in Figure5. The LTM8003 can benefit from
the heat-sinking afforded by vias that connect to internal
GND planes at these locations, due to their proximity
to internal power handling components. The optimum
SYNC
GND
GND/ THERMAL VIAS
RUN
BIASFB
VOUT
VIN
COUT
CIN
PG
TR/SS
RT
8003 F05
Figure5. Layout Showing Suggested External Components, GND Plane and Thermal Vias
LTM8003
23
Rev E
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APPLICATIONS INFORMATION
number of thermal vias depends upon the printed
circuit board design. For example, a board might use
very small via holes. It should employ more thermal
vias than a board that uses larger holes.
Hot-Plugging Safely
The small size, robustness and low impedance of ceramic
capacitors make them an attractive option for the input
bypass capacitor of LTM8003. However, these capacitors
can cause problems if the LTM8003 is plugged into a live
supply (see Linear Technology Application Note 88 for a
complete discussion). The low loss ceramic capacitor
combined with stray inductance in series with the power
source forms an underdamped tank circuit, and the volt-
age at the VIN pin of the LTM8003 can ring to more than
twice the nominal input voltage, possibly exceeding the
LTM8003’s rating and damaging the part. If the input supply
is poorly controlled or the LTM8003 is hot-plugged into an
energized supply, the input network should be designed
to prevent this overshoot. This can be accomplished by
installing a small resistor in series to VIN, but the most
popular method of controlling input voltage overshoot is
add an electrolytic bulk cap to the VIN net. This capacitor’s
relatively high equivalent series resistance damps the circuit
and eliminates the voltage overshoot. The extra capacitor
improves low frequency ripple filtering and can slightly
improve the efficiency of the circuit, though it is likely to
be the largest component in the circuit.
Thermal Considerations
The LTM8003 output current may need to be derated if it
is required to operate in a high ambient temperature. The
amount of current derating is dependent upon the input
voltage, output power and ambient temperature. The
derating curves given in the Typical Performance Char-
acteristics section can be used as a guide. These curves
were generated by the LTM8003 mounted to a 58cm2
4-layer FR4 printed circuit board. Boards of other sizes
and layer count can exhibit different thermal behavior, so
it is incumbent upon the user to verify proper operation
over the intended system’s line, load and environmental
operating conditions.
For increased accuracy and fidelity to the actual applica-
tion, many designers use FEA (Finite Element Analysis)
to predict thermal performance. To that end, Page 2 of
the data sheet typically gives four thermal coefficients:
θJA – Thermal resistance from junction to ambient
θJCbottom – Thermal resistance from junction to the
bottom of the product case
θJCtop – Thermal resistance from junction to top of the
product case
θJB – Thermal resistance from junction to the printed
circuit board.
While the meaning of each of these coefficients may
seem to be intuitive, JEDEC has defined each to avoid
confusion and inconsistency. These definitions are given
in JESD51-12, and are quoted or paraphrased below:
θJA is the natural convection junction-to-ambient air
thermal resistance measured in a one cubic foot sealed
enclosure. This environment is sometimes referred to as
“still air” although natural convection causes the air to
move. This value is determined with the part mounted to
a JESD 51-9 defined test board, which does not reflect an
actual application or viable operating condition.
θJCbottom is the junction-to-board thermal resistance with
all of the component power dissipation flowing through the
bottom of the package. In the typical µModule regulator,
the bulk of the heat flows out the bottom of the package,
but there is always heat flow out into the ambient envi-
ronment. As a result, this thermal resistance value may
be useful for comparing packages but the test conditions
don’t generally match the user’s application.
LTM8003
24
Rev E
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APPLICATIONS INFORMATION
θJCtop is determined with nearly all of the component power
dissipation flowing through the top of the package. As the
electrical connections of the typical µModule regulator are
on the bottom of the package, it is rare for an application
to operate such that most of the heat flows from the junc-
tion to the top of the part. As in the case of θJCbottom, this
value may be useful for comparing packages but the test
conditions don’t generally match the user’s application.
θJB is the junction-to-board thermal resistance where
almost all of the heat flows through the bottom of the
µModule regulator and into the board, and is really the
sum of the θJCbottom and the thermal resistance of the
bottom of the part through the solder joints and through a
portion of the board. The board temperature is measured
a specified distance from the package, using a two sided,
two layer board. This board is described in JESD 51-9.
Given these definitions, it should now be apparent that none
of these thermal coefficients reflects an actual physical
operating condition of a µModule regulator. Thus, none
of them can be individually used to accurately predict the
thermal performance of the product. Likewise, it would
be inappropriate to attempt to use any one coefficient to
correlate to the junction temperature vs load graphs given
in the product’s data sheet. The only appropriate way to
use the coefficients is when running a detailed thermal
analysis, such as FEA, which considers all of the thermal
resistances simultaneously.
A graphical representation of these thermal resistances
is given in Figure6. The blue resistances are contained
within the µModule regulator, and the green are outside.
The die temperature of the LTM8003 must be lower than
the maximum rating, so care should be taken in the layout
of the circuit to ensure good heat sinking of the LTM8003.
The bulk of the heat flow out of the LTM8003 is through
the bottom of the package and the pads into the printed
circuit board. Consequently a poor printed circuit board
design can cause excessive heating, resulting in impaired
performance or reliability. Please refer to the PCB Layout
section for printed circuit board design suggestions.
8003 F06
µMODULE DEVICE
JUNCTION-TO-CASE (TOP)
RESISTANCE
JUNCTION-TO-BOARD RESISTANCE
JUNCTION-TO-AMBIENT RESISTANCE (JESD 51-9 DEFINED BOARD)
CASE (TOP)-TO-AMBIENT
RESISTANCE
BOARD-TO-AMBIENT
RESISTANCE
JUNCTION-TO-CASE
(BOTTOM) RESISTANCE
JUNCTION AMBIENT
CASE (BOTTOM)-TO-BOARD
RESISTANCE
Figure6. Graphical Representation of the Thermal Resistances Between the Device Junction and Ambient
LTM8003
25
Rev E
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Fault Tolerance
The fixed output version of LTM8003 is designed to tol-
erate a single fault condition. Shorting two adjacent pins
together or leaving one single pin floating does not raise
VOUT or cause damage to the LTM8003 µModule regulator.
Table 2 describe the effects that result from shorting ad-
jacent pins. Note that, since all pins are redundant, there
is no analysis describing what happens when a single pin
opens. The NC pins must be left floating to ensure fault
tolerance.
Table 3. Table 2. FMEA Analysis — Adjacent Pin Short Test
PIN NAME HEAT SMOKE EFFECT
VIN–NC NO NO Circuit behaves normally.
VIN–RUN NO NO Circuit behaves normally.
RUN–NC NO NO Circuit behaves normally.
RUN–RT NO NO VOUT falls to 0V. Device can be damaged if EN/UV voltage is higher than RT ABS MAX.
RUN–GND NO NO Vout falls to 0V.
RT–GND NO NO SW frequency increases. VOUT may fall below regulation voltage.
RT–GND BANK1 NO NO SW frequency increases. VOUT may fall below regulation voltage.
RT–TRSS NO NO VOUT will fall below regulation voltage.
TR/SS–SYNC NO NO VOUT will fall below regulation voltage.
TR/SS–GND BANK1 NO NO VOUT will fall below regulation voltage.
SYNC–GND NO NO Circuit behaves normally.
SYNC–PG NO NO Circuit behaves normally.
SYNC–GND BANK1 NO NO Circuit behaves normally.
BIAS–GND BANK1 NO NO Efficiency may decrease.
BIAS–VOUT BANK3 NO NO Efficiency may decrease. If BIAS is tied to a voltage source > VOUT, VOUT may rise.
If BIAS is tied to a votlage source < VOUT, VOUT may be reduced.
VOUT BANK3–GND BANK1 NO NO VOUT will fall to 0V.
APPLICATIONS INFORMATION
LTM8003
26
Rev E
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TYPICAL APPLICATIONS
3.3VOUT from 5VIN to 40VIN Step-Down Converter. BIAS Is Tied to VOUT
1.2VOUT from 3.4VIN to 40VIN Step-Down Converter. BIAS Is Tied to an External 3.3V Source
2.5VOUT from 5.5VIN to 15VIN Step-Down Converter. BIAS Is Tied to VIN
4.7µF
100µF
49.9k
850kHz
LTM8003-3.3
VOUT
BIAS
VOUT
3.3V
4A
VIN
VIN
5V TO 40V
GND
RUN
SYNC
RT
8003 TA02
PINS NOT USED IN THIS CIRCUIT: TR/SS, PG
3.3V
4.7µF
100µF
×2
47pF
402k
LTM8003
VOUT
BIAS
VOUT
1.2V
4A
VIN
VIN
3.4V TO 40V
FBGND
RUN
SYNC
8003 TA03
PINS NOT USED IN THIS CIRCUIT: TR/SS, PG
78.7k
550kHz
RT
4.7µF
100µF
63.4k
LTM8003
VOUT
BIAS
VOUT
2.5V
4A
VIN
VIN
5.5V TO 15V
FBGND
RUN
SYNC
8003 TA04
PINS NOT USED IN THIS CIRCUIT: TR/SS, PG
56.2k
750kHz
RT
LTM8003
27
Rev E
For more information www.analog.com
–5VOUT from 5VIN to 35VIN Positive to Negative Converter, BIAS tied to LTM8003 GND
Maximum Load Current vs VIN.
BIAS Tied to LTM8003 GND
4.7µF
47µF
24.3k
LTM8003
VOUT
RUN
OPTIONAL
SCHOTTKY
DIODE
VIN
VIN
5V TO 35V
FB
GND SYNC
BIAS
8003 TA05a
PINS NOT USED IN THIS CIRCUIT: TR/SS, PG
41.2k
1MHz
RT
+
INPUT BULK CAP
VOUT
–5V
INPUT VOLTAGE (V)
0
10
20
30
40
0
1
2
3
4
5
6
MAXIMUM LOAD CURRENT (A)
8003 TA05b
TYPICAL APPLICATIONS
PACKAGE DESCRIPTION
PACKAGE PHOTO
Table 4
LTM8003 Pinout (Adjustable Version, Sorted by Pin Number)
PIN PIN NAME PIN PIN NAME PIN PIN NAME PIN PIN NAME PIN PIN NAME PIN PIN NAME PIN PIN NAME PIN PIN NAME
A 1 GND B 1 PG C 1 PG D 1 GND E 1 GND F 1 FB G 1 BIAS H 1 VOUT
A 2 SYNC B 2 SYNC C 2 GND D 2 GND E 2 GND F 2 FB G 2 BIAS H 2 VOUT
A 3 SS B 3 SS C 3 GND D 3 GND E 3 GND F 3 GND G 3 VOUT H 3 VOUT
A 4 RT B 4 GND C 4 GND D 4 GND E 4 GND F 4 GND G 4 VOUT H 4 VOUT
A 5 RT B 5 RUN C 5 NC D 5 NC E 5 NC F 5 GND G 5 VOUT H 5 VOUT
A 6 GND B 6 RUN C 6 VIN D 6 VIN E 6 NC F 6 GND G 6 VOUT H 6 VOUT
LTM8003 Pinout (Fixed Output Voltage, Sorted by Pin Number)
PIN PIN NAME PIN PIN NAME PIN PIN NAME PIN PIN NAME PIN PIN NAME PIN PIN NAME PIN PIN NAME PIN PIN NAME
A 1 GND B 1 PG C 1 PG D 1 GND E 1 GND F 1 GND G 1 BIAS H 1 VOUT
A 2 SYNC B 2 SYNC C 2 GND D 2 GND E 2 GND F 2 GND G 2 BIAS H 2 VOUT
A 3 SS B 3 SS C 3 GND D 3 GND E 3 GND F 3 GND G 3 VOUT H 3 VOUT
A 4 RT B 4 GND C 4 GND D 4 GND E 4 GND F 4 GND G 4 VOUT H 4 VOUT
A 5 RT B 5 RUN C 5 NC D 5 NC E 5 NC F 5 GND G 5 VOUT H 5 VOUT
A 6 GND B 6 RUN C 6 VIN D 6 VIN E 6 NC F 6 GND G 6 VOUT H 6 VOUT
LTM8003
28
Rev E
For more information www.analog.com
PACKAGE DESCRIPTION
NOTES:
1. DIMENSIONING AND TOLERANCING PER ASME Y14.5M-1994
2. ALL DIMENSIONS ARE IN MILLIMETERS
BALL DESIGNATION PER JEP95
4
3
DETAILS OF PIN #1 IDENTIFIER ARE OPTIONAL,
BUT MUST BE LOCATED WITHIN THE ZONE INDICATED.
THE PIN #1 IDENTIFIER MAY BE EITHER A MOLD OR
MARKED FEATURE
PACKAGE TOP VIEW
4
PIN “A1”
CORNER
X
Y
aaa Z
aaa Z
PACKAGE BOTTOM VIEW
3
SEE NOTES
SUGGESTED PCB LAYOUT
TOP VIEW
BGA 48 0517 REV B
LTMXXXXXX
µModule
TRAY PIN 1
BEVEL PACKAGE IN TRAY LOADING ORIENTATION
COMPONENT
PIN “A1”
PIN 1
0.000
0.5
0.5
1.5
1.5
2.5
2.5
3.5
0.5
2.5
1.5
0.5
1.5
2.5
3.5
0.000
DETAIL A
Øb (48 PLACES)
F
G
H
E
A
B
C
D
2 14 356
D
A
DETAIL B
PACKAGE SIDE VIEW
MX YZddd
MZeee
0.50 ±0.025 Ø 48x
E
b
e
e
b
A2
F
G
BGA Package
48-Lead (9mm × 6.25mm × 3.32mm)
(Reference LTC DWG # 05-08-1999 Rev B)
6
SEE NOTES
DETAIL A
SYMBOL
A
A1
A2
b
b1
D
E
e
F
G
H1
H2
aaa
bbb
ccc
ddd
eee
MIN
3.12
0.40
2.72
0.50
0.47
0.27
2.45
NOM
3.32
0.50
2.82
0.60
0.50
9.00
6.25
1.00
7.00
5.00
0.32
2.50
MAX
3.52
0.60
2.92
0.70
0.53
0.37
2.55
0.15
0.10
0.20
0.25
0.10
TOTAL NUMBER OF BALLS: 48
DIMENSIONS
NOTES
BALL HT
BALL DIMENSION
PAD DIMENSION
SUBSTRATE THK
MOLD CAP HT
Z
DETAIL B
SUBSTRATE
A1
ccc Z
Z
// bbb Z
H2
H1
b1
MOLD
CAP
5. PRIMARY DATUM -Z- IS SEATING PLANE
6 PACKAGE ROW AND COLUMN LABELING MAY VARY
AMONG µModule PRODUCTS. REVIEW EACH PACKAGE
LAYOUT CAREFULLY
!
LTM8003
29
Rev E
For more information www.analog.com
Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog
Devices for its use, nor for any infringements of patents or other rights of third parties that may result from its use. Specifications
subject to change without notice. No license is granted by implication or otherwise under any patent or patent rights of Analog Devices.
REVISION HISTORY
REV DATE DESCRIPTION PAGE NUMBER
A 2/17 Added “Silent Switcher” to product description and features.
Added EMI performance graph.
Added Fault Tolerance section and FMEA analysis table.
1
13, 14
25
B 5/17 Added LTM8003IY and LTM8003H Y.
Changed recommended BIAS pin connection from Open to GND for negative output applications.
2
5, 7, 11, 13, 14,
17, 19, 21, 27
C 12/17 Changed Peak Reflow Body Temperature from 260°C to 250°C. 2
D 7/18 Corrected graph title on p27 from Bias Open to Bias Tied to LTM8003 GND. 27
E 9/18 Corrected part numbers on the Order Information table:
LTM8003-3.3IY#PBF to LTM8003IY-3.3#PBF
LTM8003-3.3HY#PBF to LTM8003HY-3.3#PBF
Updated package thermal resistance:
JA = 23.5°C/W to JA = 24.7°C/W, JCbottom = 3.2°C/W to JCbottom = 4.5°C/W
JCtop = 17.9°C/W to JCtop = 22.3°C/W, JB = 3.1°C/W to JB = 4.2°C/W
Changed recommended BIAS voltage from 5 to, 3.2 to 19 on Table 1
2
2
17
LTM8003
30
Rev E
For more information www.analog.com
www.analog.com
ANALOG DEVICES, INC. 2016-2018
D17129-0-9/18(E)
RELATED PARTS
TYPICAL APPLICATION
PART NUMBER DESCRIPTION COMMENTS
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Silent Switcher µModule Regulator with FMEA
Compliant Pinout
3.4V ≤ VIN ≤ 40V, 0.97V ≤ VOUT ≤ 18V, 6.25mm × 6.25mm × 2.22mm BGA
Package
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LTM8065 40V, 2.5A Step-Down Silent Switcher µModule Regulator 3.4V ≤ VIN ≤ 40V, 0.97V ≤ VOUT ≤ 18V, 6.25mm × 6.25mm × 2.32mm BGA
Package
LTM8032 36V, 2A Low EMI Step-Down µModule Regulator 3.6V ≤ VIN ≤ 36V, 0.8V ≤ VOUT ≤ 10V, EN55022B Compliant
LTM8033 36V, 3A Low EMI Step-Down µModule Regulator 3.6V ≤ VIN ≤ 36V, 0.8V ≤ VOUT ≤ 24V, EN55022B Compliant
LTM8026 36V, 5A CVCC Step-Down µModule Regulator 6V ≤ VIN ≤ 36V, 1.2V ≤ VOUT ≤ 24V, Constant Voltage Constant Current Operation
LTM4613 36V, 8A Low EMI Step-Down µModule Regulator 5V ≤ VIN ≤ 36V, 3.3V ≤ VOUT ≤ 15V, EN55022B Compliant
LTM8073 60V, 3A Step-Down Silent Switcher µModule Regulator 3.4V ≤ VIN ≤ 60V, 0.8V ≤ VOUT ≤ 15V, 6.25mm × 9mm × 3.32mm BGA Package
DESIGN RESOURCES
EXTERNAL
3.3V
4.7µF
100µF
×2
47pF
LTM8003
VOUT
FB
VOUT
0.97V
4A
VIN
VIN
3.4V TO 40V
BIASGND
RUN
SYNC 8003 TA06
PINS NOT USED IN THIS CIRCUIT: TR/SS, PG
84k
450kHz
RT
0.97VOUT from 3.4VIN to 40VIN Step Down Converter with Spread Spectrum. BIAS is Tied to an External 3.3V Source
SUBJECT DESCRIPTION
µModule Design and Manufacturing Resources Design:
• Selector Guides
• Demo Boards and Gerber Files
• Free Simulation Tools
Manufacturing:
• Quick Start Guide
• PCB Design, Assembly and Manufacturing Guidelines
• Package and Board Level Reliability
µModule Regulator Products Search 1. Sort table of products by parameters and download the result as a spread sheet.
2. Search using the Quick Power Search parametric table.
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offer essential functions, including power supply monitoring, supervision, margining and sequencing,
and feature EEPROM for storing user configurations and fault logging.