AO6802
30V Dual N-Channel MOSFET
General Description Product Summary
V
DS
I
D
(at V
GS
=10V) 3.5A
R
DS(ON)
(at V
GS
=10V) < 50mΩ
R
DS(ON)
(at V
GS
= 4.5V) < 70mΩ
Symbol
V
DS
V
GS
I
DM
T
J
, T
STG
Symbol
t ≤ 10s
Steady-State
Steady-State
R
θJL
30V
Maximum
30
±20
Absolute Maximum Ratings T
A
=25°C unless otherwise noted
Gate-Source Voltage
UnitsParameter
T
A
=25°C
T
A
=70°C I
D
3.5
3
The AO6802 uses advanced trench technology to
provide excellent R
DS(ON)
and low gate charge. This
device is suitable for use as a load switch or in PWM
applications.
V
Drain-Source Voltage V
20
1.15
0.73
A
Units
110
W
°C
T
A
=25°C
Parameter Typ Max
-55 to 150
Maximum Junction-to-Ambient
A
Thermal Characteristics
T
A
=70°C
Junction and Storage Temperature Range
Power Dissipation
B
P
D
Pulsed Drain Current
C
Continuous Drain
Current
°C/W
Maximum Junction-to-Lead °C/W
°C/W
Maximum Junction-to-Ambient
A D
64 80
106 150
R
θJA
78
TSOP6
Top View Bottom View
Pin1
Top View
S2
S1
G2
G
1
D
2
D
1
1
2
3
6
5
4
G2
D2
S2
G1
D1
S1
Rev 2: Mar 2011 www.aosmd.com Page 1 of 5
AO6802
Symbol Min Typ Max Units
BV
DSS
30 V
V
DS
=30V, V
GS
=0V 1
T
J
=55°C 5
I
GSS
±100 nA
V
GS(th)
Gate Threshold Voltage 1.5 2 2.5 V
I
D(ON)
20 A
40 50
T
J
=125°C 61 77
52 70 mΩ
g
FS
12 S
V
SD
0.79 1 V
I
S
1.5 A
C
iss
170 210 pF
C
oss
35 pF
C
rss
23 pF
R
g
1.7 3.5 5.3 Ω
Q
g
(10V) 4.05 5 nC
Q
g
(4.5V) 2 3 nC
Q
gs
0.55 nC
Q
gd
1 nC
t
D(on)
4.5 ns
t
r
1.5 ns
t
D(off)
18.5 ns
t
f
15.5 ns
t
rr
7.5 10 ns
Q
rr
2.5 nC
THIS PRODUCT HAS BEEN DESIGNED AND QUALIFIED FOR THE CONSUMER MARKET. APPLICATIONS OR USES AS CRITICAL
COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS ARE NOT AUTHORIZED. AOS DOES NOT ASSUME ANY LIABILITY ARISING
OUT OF SUCH APPLICATIONS OR USES OF ITS PRODUCTS. AOS RESERVES THE RIGHT TO IMPROVE PRODUCT DESIGN,
FUNCTIONS AND RELIABILITY WITHOUT NOTICE.
µA
I
DSS
Zero Gate Voltage Drain Current
I
D
=250µA, V
GS
=0V
Electrical Characteristics (T
J
=25°C unless otherwise noted)
STATIC PARAMETERS Parameter Conditions
R
DS(ON)
Static Drain-Source On-Resistance
Maximum Body-Diode Continuous Current
Input Capacitance
DYNAMIC PARAMETERS
V
DS
=V
GS
I
D
=250µA
Total Gate Charge
V
GS
=10V, V
DS
=15V, I
D
=3.5A
Gate Source Charge
Gate Drain Charge
Total Gate Charge
Output Capacitance
V
GS
=10V, V
DS
=5V
V
GS
=10V, I
D
=3.5A
Body Diode Reverse Recovery Time
Drain-Source Breakdown Voltage
On state drain current
Turn-On DelayTime
Gate-Body leakage current
Forward Transconductance
Diode Forward Voltage
V
DS
=0V, V
GS
= ±20V
mΩ
I
S
=1A,V
GS
=0V
V
DS
=5V, I
D
=3.5A
V
GS
=4.5V, I
D
=2A
V
GS
=0V, V
DS
=15V, f=1MHz
SWITCHING PARAMETERS
Gate resistance V
GS
=0V, V
DS
=0V, f=1MHz
Reverse Transfer Capacitance
Body Diode Reverse Recovery Charge I
F
=3.5A, dI/dt=100A/µs
Turn-Off Fall Time
Turn-On Rise Time
Turn-Off DelayTime V
GS
=10V, V
DS
=15V, R
L
=4.2Ω,
R
GEN
=3Ω
I
F
=3.5A, dI/dt=100A/µs
A. The value of R
θJA
is measured with the device mounted on 1in
2
FR-4 board with 2oz. Copper, in a still air environment with T
A
=25°C. The value
in any given application depends on the user's specific board design.
B. The power dissipation P
D
is based on T
J(MAX)
=150°C, using ≤ 10s junction-to-ambient thermal resistance.
C. Repetitive rating, pulse width limited by junction temperature T
J(MAX)
=150°C. Ratings are based on low frequency and duty cycles to keep
initialT
J
=25°C.
D. The R
θJA
is the sum of the thermal impedence from junction to lead R
θJL
and lead to ambient.
E. The static characteristics in Figures 1 to 6 are obtained using <300µs pulses, duty cycle 0.5% max.
F. These curves are based on the junction-to-ambient thermal impedence which is measured with the device mounted on 1in
2
FR-4 board with
2oz. Copper, assuming a maximum junction temperature of T
J(MAX)
=150°C. The SOA curve provides a single pulse rating.
Rev 2: Mar 2011 www.aosmd.com Page 2 of 5
AO6802
N-Channel: TYPICAL ELECTRICAL AND THERMAL CHARACTERISTICS
17
5
2
10
0
18
40
0
2
4
6
8
10
0.5 1 1.5 2 2.5 3 3.5 4 4.5
V
GS
(Volts)
Figure 2: Transfer Characteristics (Note E)
I
D
(A)
30
40
50
60
70
0246810
I
D
(A)
Figure 3: On-Resistance vs. Drain Current and
Gate Voltage (Note E)
R
DS(ON)
(mΩ
Ω
Ω
Ω)
1.0E-05
1.0E-04
1.0E-03
1.0E-02
1.0E-01
1.0E+00
1.0E+01
1.0E+02
0.0 0.2 0.4 0.6 0.8 1.0 1.2
V
SD
(Volts)
Figure 6: Body-Diode Characteristics (Note E)
I
S
(A)
25°C
125°C
0.8
1
1.2
1.4
1.6
1.8
0 25 50 75 100 125 150 175
Temperature (°C)
Figure 4: On-Resistance vs. Junction Temperature
(Note E)
Normalized On-Resistance
V
GS
=4.5V
I
D
=2A
V
GS
=10V
I
=3.5A
20
40
60
80
100
120
2 4 6 8 10
V
GS
(Volts)
Figure 5: On-Resistance vs. Gate-Source Voltage
(Note E)
R
DS(ON)
(mΩ
Ω
Ω
Ω)
25°C
125°C
V
DS
=5V
V
GS
=4.5V
V
GS
=10V
I
D
=3.5A
25°C
125°C
0
3
6
9
12
15
012345
V
DS
(Volts)
Fig 1: On-Region Characteristics (Note E)
I
D
(A)
V
GS
=3V
3.5V
10V
4V
4.5V
7V
Rev 2: Mar 2011 www.aosmd.com Page 3 of 5
AO6802
N-Channel: TYPICAL ELECTRICAL AND THERMAL CHARACTERISTICS
0
2
4
6
8
10
0 1 2 3 4 5
Q
g
(nC)
Figure 7: Gate-Charge Characteristics
V
GS
(Volts)
0
50
100
150
200
250
300
0 5 10 15 20 25 30
V
DS
(Volts)
Figure 8: Capacitance Characteristics
Capacitance (pF)
C
iss
C
oss
C
rss
V
DS
=15V
I
D
=3.5A
1
10
100
1000
0.00001 0.001 0.1 10 1000
Pulse Width (s)
Figure 10: Single Pulse Power Rating
Junction-to-Ambient (Note F)
Power (W)
T
A
=25°C
0.0
0.1
1.0
10.0
100.0
0.01 0.1 1 10 100
V
DS
(Volts)
I
D
(Amps)
Figure 9: Maximum Forward Biased Safe
Operating Area (Note F)
10
µ
s
10s
1ms
DC
R
DS(ON)
limited
T
J(Max)
=150°C
T
=25°C
100
µ
s
10ms
0.001
0.01
0.1
1
10
0.00001 0.0001 0.001 0.01 0.1 1 10 100 1000
Pulse Width (s)
Figure 11: Normalized Maximum Transient Thermal Impedance (Note F)
Z
θ
θ
θ
θJA
Normalized Transient
Thermal Resistance
In descending order
D=0.5, 0.3, 0.1, 0.05, 0.02, 0.01, single pulse
D=T
on
/T
T
J,PK
=T
A
+P
DM
.Z
θJA
.R
θJA
R
θJA
=150°C/W
T
on
T
P
Single Pulse
Rev 2: Mar 2011 www.aosmd.com Page 4 of 5
AO6802
-
+
VDC
Ig
Vds
DUT
-
+
VDC
Vgs
Vgs
10V
Qg
Qgs Qgd
Charge
Gate Charge Test Circuit & Waveform
-
+
VDC
DUT Vdd
Vgs
Vds
Vgs
RL
Rg
Vgs
Vds
10%
90%
Resistive Switching Test Circuit & Waveforms
t t
r
d(on)
t
on
t
d(off)
t
f
t
off
Vdd
Vgs
Id
Vgs
Rg
DUT
-
+
VDC
L
Vgs
Vds
Id
Vgs
BV
I
Unclamped Inductive Switching (UIS) Test Circuit & Waveforms
Ig
Vgs
-
+
VDC
DUT
L
Vds
Vgs
Vds
Isd
Isd
Diode Recovery Test Circuit & Waveforms
Vds -
Vds +
I
F
AR
DSS
2
E = 1/2 LI
dI/dt
I
RM
rr
Vdd
Vdd
Q = - Idt
AR
AR
t
rr
Rev 2: Mar 2011 www.aosmd.com Page 5 of 5