LT3795
12
3795fc
For more information www.linear.com/LT3795
OPERATION
The LT3795 is a constant-frequency, current mode con-
troller with a low side NMOS gate driver. The operation of
the LT3795 is best understood by referring to the Block
Diagram of the IC. In normal operation, with the PWM pin
low, the GATE pin is driven to GND, the TG pin is pulled
high to ISP to turn off the PMOS disconnect switch, the
VC pin goes high impedance to store the previous switch-
ing state on the external compensation capacitor, and
the ISP and ISN pin bias currents are reduced to leakage
levels. When the PWM pin transitions high, the TG pin
transitions low after a short delay. At the same time, the
internal oscillator wakes up and generates a pulse to set
the PWM latch, turning on the external power N-channel
MOSFET switch (GATE goes high). A voltage input propor-
tional to the switch current, sensed by an external current
sense resistor between the SENSE and GND input pins,
is added to a stabilizing slope compensation ramp and
the resulting switch current sense signal is fed into the
negative terminal of the PWM comparator. The current in
the external inductor increases steadily during the time
the switch is on. When the switch current sense voltage
exceeds the output of the error amplifier, labeled VC, the
latch is reset and the switch is turned off. During the
switch off phase, the inductor current decreases. At the
completion of each oscillator cycle, internal signals such
as slope compensation return to their starting points and
a new cycle begins with the set pulse from the oscillator.
Through this repetitive action, the PWM control algorithm
establishes a switch duty cycle to regulate a current or
voltage in the load. The VC signal is integrated over many
switching cycles and is an amplified version of the differ-
ence between the LED current sense voltage, measured
between ISP and ISN, and the target difference voltage
set by the CTRL1 or CTRL2 pin. In this manner, the error
amplifier sets the correct peak switch current level to keep
the LED current in regulation. If the error amplifier output
increases, more current is demanded in the switch; if it
decreases, less current is demanded. The switch current
is monitored during the on phase and the voltage across
the SENSE pin is not allowed to exceed the current limit
threshold of 113mV (typical). If the SENSE pin exceeds
the current limit threshold, the SR latch is reset regardless
of the output state of the PWM comparator. Likewise, any
fault condition, i.e. FB overvoltage (FB > 1.3V), output
short (FB < 0.3V) after start-up, input overvoltage (OVLO
> 1.25V) LED overcurrent, or INTVCC undervoltage (INTVCC
< 4V), the GATE pin is pulled down to GND immediately.
In voltage feedback mode, the operation is similar to that
described above, except the voltage at the VC pin is set by
the amplified difference of the internal reference of 1.25V
(nominal) and the FB pin. If FB is lower than the reference
voltage, the switch current increases; if FB is higher than
the reference voltage, the switch demand current decreases.
The LED current sense feedback interacts with the voltage
feedback so that FB does not exceed the internal reference
and the voltage between ISP and ISN does not exceed the
threshold set by either of the CTRL pins. For accurate current
or voltage regulation, it is necessary to be sure that under
normal operating conditions, the appropriate loop is domi-
nant. To deactivate the voltage loop entirely, FB can be set
between 0.4V and 1V through a resistor network to VREF pin.
To deactivate the LED current loop entirely, the ISP and ISN
should be tied together and CTRL1 and CTRL2 tied to VREF.
Tw o LED specific functions featured on the LT3795 are
controlled by the voltage feedback FB pin. First, when the
FB pin exceeds a voltage 52mV lower (–4%) than the FB
regulation voltage and V(ISP-ISN) is less than 25mV (typi-
cal), the pull-down driver on the OPENLED pin is activated.
This function provides a status indicator that the load may
be disconnected and the constant-voltage feedback loop
is taking control of the switching regulator. When the FB
pin drops below 0.3V after start-up, the SHORTLED pin
is asserted by comparator A16. A blanking period occurs
during start-up for the SHORTLED protection feature from
the EN/UVLO toggle until the SS pin reaches 1.7V.
LT3795 features a PMOS disconnect switch driver. The PMOS
disconnect switch can be used to improve the PWM dimming
ratio, and operate as fault protection as well. Once a fault
condition is detected, the TG pin is pulled high to turnoff the
PMOS switch. The action isolates the LED array from the power
path, preventing excessive current from damaging the LEDs.
A standalone input current sense amplifier is integrated in
the LT3795. The input current sense amplifier A11 senses
the input current and converts it to a voltage signal at the
IVINCOMP pin. When the voltage potential at the IVINCOMP
pin moves close to 1.2V, the amplifier A8 starts to interact
with the VC pin, and thus reduces the regulated LED cur-
rent. In this way, the input current is limited.