Document Number: MPC17510
Rev. 3.0, 1/2007
Freescale Semiconductor
Advance Information
* This document contains certain information on a new product.
Specifications and information herein are subject to change without notice.
© Freescale Semiconductor, Inc., 2007. All rights reserved.
1.2 A 15 V H-Bridge Motor
Driver IC
The 17510 is a monolithic H-Bridge designed to be used in
portable electronic applications such as digital and SLR cameras to
control small DC motors.
The 17510 can operate efficiently with supply voltages as low as
2.0 V to as high as 1 5 V. Its low RDS(ON) H-Bridge output MOSFETs
(0.45 typical) can provide continuous motor drive currents of 1.2 A
and handle peak currents up to 3.8 A. It is easily interfaced to low-
cost MCUs via parallel 5.0 V compatible logic. The device can be
pulse width modulated (PWM-ed) at up to 200 kHz.
This device contains an integrated charge pump and level shifter
(for gate drive voltages), integrated shoot-through current protection
(cross-conduction suppression logic and timing), and undervoltage
detection and shutdown circuitry.
The 17510 has four operating modes: Forward, Reverse, Brake,
and Tri-Stated (High Impedance).
Features
•2.0 V to 15 V Continuous Operation
Output Current 1.2 A (DC), 3.8 A (Peak)
450 m RDS(ON) H-Bridge MOSFETs
•5.0 V TTL- / CMOS-Compatible In pu ts
PWM Frequencies up to 200 kHz
Undervoltage Shutdown
Cross-Conduction Suppression
Pb-Free Packaging Designated by Suffix Cod e EJ
Figure 1. 17510 Simplified Application Diagra m
H-BRIDGE MOTOR DRIVER
MTB SUFFIX
EJ SUFFIX (Pb-FREE)
98ASH70455A
24-LEAD TSSOP
17510
ORDERING INFORMATION
Device Temperature
Range (TA)Package
MPC17510EJ/R2
-30°C to 65°C 24 TSSOPWMPC17510MTB
MPC17510MTBEL
VDD
CRES
C1L
C1H
C2L
C2H
IN2
IN1
EN
OUT2
OUT1
GOUT
VM
GND
MCU GIN
MOTOR
5.0 V 15 V
17510
Analog Integrated Circuit Device Data
2Freescale Semiconductor
17510
INTERNAL BLOCK DIAGRAM
INTERNAL BLOCK DIAGRAM
Figure 2. 17510 Simplified Internal Block Diagram
3
23
2
21
8
1
5
17
18
6
19
4 7 20 22
15
Charge Pump
H-Bridge
Level
Shifter
Predriver
Control
Logic
Low Voltage
Detector
TOUT
VM1
VM2
OUTA
OUTA'
OUTB'
OUTB
PGND1
PGND2
NC
CRES
VDD
LGND
24
TINB
16
EN
10
IN2
9
IN1
12
C1L
11
C1H
13
C2L
14
C2H
Analog Integrated Circuit Device Data
Freescale Semiconductor 3
17510
PIN CONNECTIONS
PIN CONNECTIONS
Figure 3. 17510 Pin Conne ctions
Table 1. 17510 Pin Definitions
A functional description of each pin can be found in the Functional Pin Description section beginning on page 8.
Pin Number Pin Name Formal Name Definition
1, 5 OUT1 Output 1 Driver output 1 pins.
2LGND Logic Ground Logic ground.
3CRES Charge Pump Output
Capacitor Connection Charge pump reservoir capacitor pin.
4, 7,
20, 22 NC No Connect No connection to these pins.
17, 18 OUT2 Output 2 Driver output 2 pins.
6, 19 PGND Power Ground Power ground.
8, 21 VM Motor Drive Power
Supply Motor power supply voltage input pins.
9IN1 Input Control 1 Control signal input 1 pin.
10 IN2 Input Control 2 Control signal input 2 pin.
11 C1H Charge Pump 1H Charge pump bucket capacitor 1 (positive pole).
12 C1L Charge Pump 1L Charge pump bucket capacitor 1 (negative pole).
13 C2L Charge Pump 2L Charge pump bucket capacitor 2 (negative pole).
14 C2H Charge Pump 2H Charge pump bucket capacitor 2 (positive pole).
15 GOUT Gate Driver Output Output gate driver signal to external MOSFET switch.
16 EN Enable Control Enable control signal input pin.
23 VDD Logic Supply Control circuit power supply pin.
24 GIN Gate Driver Input LOW = True control signal for GOUT pin.
GIN
NC
PGND
OUT2
OUT2
EN
GOUT
C2H
C2L
VDD
NC
VM
OUT1
OUT1
PGND
NC
VM
IN1
IN2
C1L
LGND
CRES
NC
C1H
24
20
19
18
17
16
15
13
23
22
21
14
5
6
7
8
9
10
11
12
2
3
4
1
Analog Integrated Circuit Device Data
4Freescale Semiconductor
17510
ELECTRICAL CHARACTERISTICS
MAXIMUM RATINGS
ELECTRICAL CHARACTERISTICS
MAXIMUM RATINGS
Table 2. Maximum Ratings
All voltages are with respect to ground unless otherwise noted. Exceeding these ratings may cause a malfunction or
permanent damage to the device.
Ratings Symbol Value Unit
Motor Supply Voltage VM- 0.5 – - 16 V
Charge Pump Output Voltage (1) VCRES -0.5 to 13 V
Logic Supply Voltage VDD -0.5 to 16 V
Signal Input Voltage (EN, IN1, IN2, GIN)VIN -0.5 to VDD + 0.5 V
Driver Output Current
Continuous
Peak (2) IO
IOPK
1.2
3.8
A
ESD Voltage (3)
Human Body Model
Machine Model VESD1
VESD2
±1900
± 130
V
Storage Temperature TSTG -65 to 150 °C
Operating Junction Temperature TJ-30 to 150 °C
Operating Ambient Temperature TA-30 to 65 °C
Power Dissipation (4) PD1.0 W
Thermal Resistance RθJA 120 °C/W
Soldering Temperature (5) TSOLDER 260 °C
Notes
1. When supplied externally, connect via 3.0 k resistor.
2. TA = 25°C, 10 ms pulse at 200 ms interval.
3. ESD1 testing is performed in accordance with the Human Body Model (CZAP = 100 pF, RZAP = 1500 ), ESD2 testing is performed in
accordance with the Machine Model (CZAP = 200 pF, RZAP = 0 ).
4. TA = 25°C, RθJA = 120°C/W, 37 mm x 50 mm Cu area (1.6 mm FR-4 PCB).
5. Soldering temperature limit is for 10 seconds maximum duration. Not designed for immersion soldering. Exceeding these limits may
cause malfunction or permanent damage to the device.
Analog Integrated Circuit Device Data
Freescale Semiconductor 5
17510
ELECTRICAL CHARACTERISTICS
STATIC ELECTRICAL CHARACTERISTICS
STATIC ELECTRICAL CHARACTERISTICS
Table 3. Static Electrical Characteristics
Characteristics noted under conditions TA = 25°C, VM = 15 V, VDD = 5.0 V, GND = 0 V unless otherwise noted. Typical values
noted reflect the approximate parameter means at TA = 25°C under nominal condition s un less otherwise noted.
Characteristic Symbol Min Typ Max Unit
POWER
Motor Supply Voltage VM2.0 15 V
Logic Supply Voltage VDD 4.0 5.5 V
Capacitor for Charge Pump C1, C2, C3 0.001 0.1 µF
Standby Power Supply Current (6)
Motor Supply Standby Current
Logic Supply Standby Current
I VMSTBY
I VDDSTBY
0.3 1.0
1.0
µA
mA
Logic Supply Current (7) I VDD 3.3 4.0 mA
Low-Voltage Detection Circuit
Detection Voltage (VDD) (8)
Detection Voltage (VM)
VDDDET
VMDET 1.5
4.0 2.5
5.0 3.5
6.0
V
Driver Output ON Resistance (9)
VM = 2.0 V, 8.0 V, 15 V RDS(ON) 0.45 0.55
GATE DRIVE
Gate Drive Voltage (10)
No Current Load
VCRES 12 13 13.5 V
Gate Drive Ability (Internally Supplied)
ICRES = -1.0 mA
VCRESLOAD 10 11.2 V
Gate Drive Output
IOUT = -50 µA
IIN = 50 µAVGOUTHIGH
VGOUTLOW
VCRES -
0.5
LGND
VCRES -
0.1
LGND + 0.1
VCRES
LGND +0.5
V
CONTROL LOGIC
Logic Input Voltage (EN, IN1, IN2, GIN)VIN 0 VDD V
Logic Input Function (4.0 V < VDD < 5.5 V)
High-Level Input Voltage
Low-Level Input Voltage
High-Level Input Current
Low-Level Input Current
EN / GIN Pin
VIH
VIL
IIH
IIL
IIL
VDD x 0.7
-1.0
- 200
- 50
VDD x 0.3
1.0
V
V
µA
µA
µA
Notes
6. Excluding pull-up resistor current, including current of gate-drive circuit.
7. fIN = 100 kHz.
8. Detection voltage is defined as when the output becomes high-impedance after VDD drops below the detection threshold. When the gate
voltage VCRES is applied from an external source, VCRES = 7.5 V.
9. IO = 1.2 A source + sink.
10. Input logic signal not present.
Analog Integrated Circuit Device Data
6Freescale Semiconductor
17510
ELECTRICAL CHARACTERISTICS
DYNAMIC ELECTRICAL CHARACTERISTICS
DYNAMIC ELECTRICAL CHARACTERISTICS
Table 4. Dynamic Electrical Characteristics
Characteristics noted under conditions TA = 25°C, VM = 15 V, VDD = 5.0 V, GND = 0 V unless otherwise noted. Typical values
noted reflect the approximate parameter means at TA = 25°C under nominal condition s un less otherwise noted.
Characteristic Symbol Min Typ Max Unit
INPUT (EN, IN1, IN2, GIN)
Pulse Input Frequency fIN 200 kHz
Input Pulse Rise Time (11) tR 1.0
(12) µs
Input Pulse Fall Time (13) tF 1.0
(12) µs
OUTPUT
Propagation Delay Time
Turn-ON Time
Turn-ON Time
Turn-OFF Time
tPZH
tPLH
tPHL
0.3
1.2
0.5
1.0
2.0
1.0
µs
GOUT Output Delay Time (14)
Turn-ON Time
Turn-OFF Time tTON
tTOFF
10
10
µs
Charge Pump Circuit
Oscillator Frequency
Rise Time (15) fOSC
tVCRESON
100
200
0.1 400
1.0 kHz
ms
Low-Voltage Detection Time tVDDDET 10 ms
Notes
11. Time is defined between 10% and 90%.
12. That is, the input waveform slope must be steeper than this.
13. Time is defined between 90% and 10%.
14. Load is 500 pF.
15. Time to charge CRES to 11 V after application of VDD.
Analog Integrated Circuit Device Data
Freescale Semiconductor 7
17510
ELECTRICAL CHARACTERISTICS
TIMING DIAGRAMS
TIMING DIAGRAMS
Figure 4. tPLH, tPHL, and tPZH Timing Figure 5. Low-Vo ltag e Detectio n Timi ng
tPZH*,
10%
IN1, IN2, EN
OUTn
50%
90%
tPHL
tPLH
*The last state is “Z”.
(GIN)
(GOUT)
(tTON) (tTOFF) tVDDDET
0%
VDD
IM
3.5 V
90%
tVDDDET
VDDDETON VDDDETOFF
(<1.0 µA
)
50%
1.5 V
Table 5. Truth Table
INPUT OUTPUT
EN IN1 IN2 GIN OUT1 OUT2 GOUT
H L L X Z Z X
H H L X H L X
H L H X L H X
H H H X L L X
L X X X L L L
H X X L X X H
H X X H X X L
H = High.
L = Low.
Z = High impedance.
X = Don’t care.
The GIN pin and EN pin are pulled up to V DD with inter nal resistance.
Analog Integrated Circuit Device Data
8Freescale Semiconductor
17510
FUNCTIONAL DESCRIPTION
INTRODUCTION
FUNCTIONAL DESCRIPTION
INTRODUCTION
The 17510 is a monolithic H-Bridge power IC applicable to
small DC motors used in portable electronics. The 17510 can
operate efficiently with supply voltages as low as 2.0 V to as
high as 15 V, and it can provide continuos motor drive
currents of 1.2 A while handling peak currents up to 3.8 A. It
is easily interfaced to lo w-cost MCUs via parallel 5.0 V-
compatible logic. The device can be pulse width modulated
(PWM-ed) at up to 200 kHz. The 17510 has four operating
modes: Forward, Reverse, Brake, and Tri-Stated (High
Impedance).
Basic protection and operational features (direction,
dynamic braking, PWM control of spe ed and torque, main
power supply undervoltage detection and shutdown, logic
power supply undervoltage detection and sh utdown), in
addition to the 1.0 A rms output current capability, make the
17510 a very attractive, cost-effective solution for controlling
a broad range of small DC motors. In addition, a pair of 17510
devices can be used to control bipolar stepper motors. The
17510 can also be used to excite transformer primary
windings with a switched square wave to produce secondary
winding AC currents.
As shown in Figure 2, 17510 Simplifi ed Internal Block
Diagram, page 2, the 17510 is a monolithic H-Bridge with
built-in charge pump circuitry. For a DC motor to run, the
input conditions need to be set as follows: ENable input logic
HIGH, one INput logic LOW, and the other INput logic HIGH
(to define output polarity). The 17510 can execute dynamic
braking by setting both IN1 and IN2 logic HIGH, causing both
low-side MOSFETs in the output H-Bridge to turn ON.
Dynamic braking can also implemented by taking the ENable
logic LOW. The output of the H-Bridge can be set to an open-
circuit high-impedance (Z) condition by taking both IN1 and
IN2 logic LOW. (refer to Table 5, Truth Table, page 7).
The 17510 outputs are capable of providing a continuous
DC load current of up to 1.2 A. An internal charge pump
supports PWM frequencies to 200 kHz. The EN pin al so
controls the charge pump, turning it off when EN = LOW, thus
allowing the 17510 to be placed in a power-conserving sleep
mode.
FUNCTIONAL PIN DESCRIPTION
OUTPUT 1 AND OUTPUT2 (OUT1, OUT2)
The OUT1 and OUT2 pins provide the connectio n to the
internal power MOSFET H-Bridge of the IC. A typical load
connected between these pins would be a small DC motor.
These outputs will connect to either VM or PGND, depending
on the states of the control inputs (refer to Table 5, Truth
Table, page 7).
POWER GROUND AND LOGIC GROUND (PGND,
LGND)
The power and logic ground pins (PGND and LGND)
should be connected together with a very low-impedan ce
connection.
CHARGE PUMP RESERVOIR CAPACITOR (CRES)
The CRES pin provides the connection for the external
reservoir capacitor (output of the charge pump). Alternatively
this pin can also be used as an input to supply gate-drive
voltage from an external source via a series current-limiting
resistor. The voltage at the CRES pin will be approximately
three times the VDD voltage, as the internal charge pump
utilizes a voltage tripler circuit. The VCRES voltage is used by
the IC to supply gate drive for the intern al power MOSFET
H-Bridge.
MOTOR SUPPLY VOLTAGE INPUT (VM)
The VM pins carry the main supply voltage and current into
the power sections of the IC. This supply then becomes
controlled and/or modulated by the IC as it delivers the power
to the load attached between OUT1 and OUT2. All VM pins
must be connected together on the printed circuit board with
as short as possible traces offering as low impedance as
possible between pins.
VM has an undervoltage threshold. If the supply voltage
drops below the undervoltage threshold, the output power
stage switches to a tri-state condition. When the supply
voltage returns to a level that is above the threshold, the
power stage automatically resumes normal operation
according to the established condition of the input pins.
CONTROL SIGNAL INPUT AND ENABLE CONTROL
SIGNAL INPUT (IN1, IN2, EN)
The IN1, IN2, and EN pins are input control pins use d to
control the outputs. These pins are 5.0 V CMOS-compatible
inputs with hysteresis. The IN1, IN2, and EN work together to
control OUT1 and OUT2 (refer to Table 5, Trut h Table).
GATE DRIVER INPUT (GIN)
The GIN input controls the GOUT pin. When GIN is set
logic LOW, GOUT supplies a level-shifted high-side gate
drive signal to an external MOSFET. When GIN is set logic
HIGH, GOUT is set to GND potential.
Analog Integrated Circuit Device Data
Freescale Semiconductor 9
17510
FUNCTIONAL DESCRIPTION
FUNCTIONAL PIN DESCRIPTION
CHARGE PUMP BUCKET CAPACITOR (C1L, C1H,
C2L, C2H)
These two pairs of pins, the C1L and C1H and the C2L and
C2H, connect to the external bucket capacitors required by
the internal charge pump. The typical value for the bucket
capacitors is 0.1 µF.
GATE DRIVER OUTPUT (GOUT)
The GOUT output pin provide s a level-shifted, high-side
gate drive signal to an external MOSFET with CISS up to
500 pF.
CONTROL CIRCUIT POWER SUPPLY (VDD)
The VDD pin carries the 5.0 V supply voltage and current
into the logic sections of the IC. VDD has an undervoltage
threshold. If the supply voltage drops below the undervoltage
threshold, th e ou t pu t po w e r stage switches to a tri-state
condition. When the supply voltage returns to a level th at is
above the threshold, the power stage automatically resumes
normal operation according to the established condition of
the input pins.
Analog Integrated Circuit Device Data
10 Freescale Semiconductor
17510
TYPICAL APPLICATIONS
FUNCTIONAL PIN DESCRIPTION
TYPICAL APPLICATIONS
Figure 6 shows a typical applica tion for the 17510.
Figure 6. 17510 Typical Application Diagram
CEMF SNUBBING TECHNIQUES
Care must be taken to protect the IC from potentially
damaging CEMF spikes induced when commutating currents
in inductive loads. Typical practice is to provide snubbing of
voltage transients by placing a capacitor or zener at the
supply pin (VM) (see Figure 7).
Figure 7. CEMF Snubbing Tec h niq ue s
MCU
17510
5.0 V
GND
C1L
C1H
C2L
C2H
CRES
EN
GIN
IN1
IN2
VM
VDD
Motor
GOUT
Solenoid
OUT1
OUT2
17510
5.0 V 15 V
C1L
C1H
C2L
C2H
CRES
VM
VDD
OUT1
OUT2
GND
17510
5.0 V 15 V
C1L
C1H
C2L
C2H
CRES
VM
VDD
OUT1
OUT2
GND
Analog Integrated Circuit Device Data
Freescale Semiconductor 11
17510
PACKAGING
PACKAGE DIMENSIONS
PACKAGING
PACKAGE DIMENSIONS
For the most current pack age revision, visit www.freescale.com and perform a keyword search using the “98A” listed below.
MTB SUFFIX
EJ SUFFIX (PB-FREE)
24-PIN
PLASTIC PACKAGE
98ASH70455A
ISSUE B
Analog Integrated Circuit Device Data
12 Freescale Semiconductor
17510
PACKAGING
PACKAGE DIMENSIONS (CONTINUED)
PACKAGE DIMENSIONS (continued)
MTB SUFFIX
EJ SUFFIX (PB-FREE)
24-PIN
PLASTIC PACKAGE
98ASH70455A
ISSUE B
Analog Integrated Circuit Device Data
Freescale Semiconductor 13
17510
REVISION HISTORY
REVISION HISTORY
REVISION DATE DESCRIPTION OF CHANGES
2.0 7/2006 Implemented a Revisio n History page.
Converted to Freescale format, and up dated to the prevaiing form and style
Added EJ Pb-FREE package
3.0 1/2007 Corrected symbol in Table 3, Driver Output ON Resistance from “W” to ""
MPC17510
Rev. 3.0
1/2007
RoHS-compliant and/or Pb-fre e versions of Freescale products have the functionality
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