34.807IRELESS
IMPORTANT NOTICE
Dear customer,
As from August 2nd 2008, the wireless operations of NXP have moved to a new company,
ST-NXP Wireless.
As a result, the following changes are applicable to the attached document.
Company name - NXP B.V. is replaced with ST-NXP Wireless.
Copyright - the copyright notice at the bottom of each page “© NXP B.V. 200x. All
rights reserved”, shall now read: “© ST-NXP Wireless 200x - All rights reserved”.
Web site - http://www.nxp.com is replaced with http://www.stnwireless.com
Contact information - the list of sales offices previously obtained by sending
an email to salesaddresses@nxp.com , is now found at http://www.stnwireless.com
under Contacts.
If you have any questions related to the document, please contact our nearest sales office.
Thank you for your cooperation and understanding.
ST-NXP Wireless
34.807IRELESS
www.stnwireless.com
1. General description
The ISP1110 is a Universal Serial Bus (USB) transceiver that supports Universal
Asynchronous Receiver-Transmitter (UART) signaling mode.
The ISP1110 USB transceiver is fully compliant with
Universal Serial Bus Specification
Rev. 2.0
. The ISP1110 can transmit and receive USB data at full-speed (12 Mbit/s).
The ISP1110 transceiver allows USB Application Specific Integrated Circuits (ASICs) with
I/O power supply voltage from 1.65 V to 2.85 V to interface to the physical layer of the
USB. The transceiver has an integrated 5 V-to-3.3 V voltage regulator for direct powering
through USB supply line VBUS and an integrated voltage detector to detect the presence
of the VBUS voltage on the VCC(5V0) pin. When VBUS is present, the transceiver is in USB
mode. When VBUS is not present, the transceiver can be set to UART signaling mode.
The ISP1110 transceiver is available in HBCC16 lead-free and halogen-free package.
2. Features
nFully complies with
Universal Serial Bus Specification Rev. 2.0
nSupports USB data transfer at full-speed (12 Mbit/s)
nIntegrated DP pull-up resistor to reduce external components
nImplemented internal DP pull-up resistor as described in
ECN_27%_Resistor
nIntegrated 5 V-to-3.3 V voltage regulator to power through USB line VBUS
nVBUS voltage presence is indicated on pin VBUSDET
nPins VP and VM function in bidirectional mode, allowing pin count saving for ASIC
interface
nUsed as a USB peripheral transceiver
nStable RCV output during Single-Ended Zero (SE0) condition
nTwo single-ended receivers with hysteresis
nLow-power operation
nSupports 2.8 V UART signaling mode on the DP and DM lines
nSupports VCC(I/O) voltage range from 1.65 V to 2.85 V
nSupports VCC(UART) voltage range from 2.7 V to 4.5 V
nOff-state supply current from VCC(UART) is less than 3 µA
nStatic current from VCC(I/O) is less than 3 µA (typical 1 µA)
nAvailable in small HBCC16 (3 mm ×3 mm) lead-free and halogen-free package
ISP1110
Universal Serial Bus transceiver with UART signaling
Rev. 02 — 19 March 2007 Product data sheet
ISP1110_2 © NXP B.V. 2007. All rights reserved.
Product data sheet Rev. 02 — 19 March 2007 2 of 25
NXP Semiconductors ISP1110
USB transceiver with UART signaling
3. Applications
nMobile phone
nPersonal Digital Assistant (PDA)
nOther portable devices
4. Ordering information
5. Block diagram
Table 1. Ordering information
Type
number Package
Name Description Version
ISP1110VH HBCC16 plastic thermal enhanced bottom chip carrier; 16 terminals; body 3 ×3×0.65 mm SOT639-2
Fig 1. Block diagram
004aaa678
VCC(I/O)
VCC(5V0)
VOLTAGE
REGULATOR
LEVEL
SHIFTER
AND
CONTROL
LOGIC
ISP1110VH
SOFTCON
VREG
GND
DP
DM
OE_N
RCV
VP/VPO
VM/VMO
VBUSDET
SUSPEND
POWER
SELECTOR
VBUS
DETECTOR
VCC(UART)
DP PULL-UP
RESISTOR
RXD
TXD
UART_EN
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
ISP1110_2 © NXP B.V. 2007. All rights reserved.
Product data sheet Rev. 02 — 19 March 2007 3 of 25
NXP Semiconductors ISP1110
USB transceiver with UART signaling
6. Pinning information
6.1 Pinning
Fig 2. Pin configuration HBCC16; top view
Fig 3. Pin configuration HBCC16; bottom view
ISP1110VH
Transparent top view
RXD
UART_EN
VCC(I/O)
VREG
OE_N
SUSPEND
SOFTCON
TXD
RCV
VP/VPO
VM/VMO
VCC(UART)
VCC(5V0)
DP
DM
VBUSDET
004aaa683
1
2
3
4
5
13
12
11
10
9
16
15
14
6
7
8
ISP1110VH
Bottom view
VM/VMO
OE_N
SUSPEND
SOFTCON
UART_EN
VCC(I/O)
VREG
VP/VPO
RCV
TXD
RXD
VBUSDET
DM
DP
VCC(5V0)
VCC(UART)
004aaa684
1
2
3
4
5
13
12
11
10
9
16
15
14
6
7
8
GND (exposed
die pad)
ISP1110_2 © NXP B.V. 2007. All rights reserved.
Product data sheet Rev. 02 — 19 March 2007 4 of 25
NXP Semiconductors ISP1110
USB transceiver with UART signaling
6.2 Pin description
Table 2. Pin description
Symbol[1] Pin Type[2] Description
RXD 1 O UART RXD output to microcontroller (CMOS level with respect to
VCC(I/O)); driven LOW in USB mode
output pad; push pull; 4 mA output drive; CMOS
TXD 2 I UART TXD input from microcontroller (CMOS level with respect
to VCC(I/O))
input pad; push pull; CMOS
RCV 3 O differential data receiver output (CMOS level with respect to
VCC(I/O)); driven LOW when input SUSPEND is HIGH; the output
state of RCV is preserved and stable during an SE0 condition;
driven LOW when in UART mode
output pad; push pull; 4 mA output drive; CMOS
VP/VPO 4 I/O single-ended DP receiver output VP (CMOS level with respect to
VCC(I/O)); for external detection of SE0, error conditions and
speed of connected device; this pin also acts as drive data input
VPO; see Table 5 and Table 6
bidirectional pad; push-pull input; 3-state output; 4 mA output
drive; CMOS
VM/VMO 5 I/O single-ended DM receiver output VM (CMOS level with respect to
VCC(I/O)); for external detection of SE0, error conditions and
speed of connected device; this pin also acts as drive data input
VMO; see Table 5 and Table 6
bidirectional pad; push-pull input; 3-state output; 4 mA output
drive; CMOS
OE_N 6 I USB output enable (CMOS level with respect to VCC(I/O), active
LOW); enables the transceiver to transmit data on the USB bus
input pad; push pull; CMOS
SUSPEND 7 I suspend input (CMOS level with respect to VCC(I/O)); a HIGH level
enables low-power state while the USB bus is inactive and drives
output RCV to a LOW level; this pin is ignored when in UART
mode
input pad; push pull; CMOS
SOFTCON 8 I software controlled USB connection input; a HIGH level enables
the internal DP pull-up resistor when VBUSDET is HIGH; this pin
is ignored when in UART mode
input pad; push pull; CMOS
VBUSDET 9 O VBUS indicator output (CMOS level with respect to VCC(I/O)); when
VBUS > VCC(5V0)th, then VBUSDET = HIGH and when
VBUS <V
CC(5V0)th, then VBUSDET = LOW
output pad; push pull; 4 mA output drive; CMOS
DM 10 AI/O USB mode — Negative USB data bus connection (analog,
bidirectional, differential)
UART mode — UART TXD line (digital output)
DP 11 AI/O USB mode — Positive USB data bus connection (analog,
bidirectional, differential)
UART mode — UART RXD line (digital input)
ISP1110_2 © NXP B.V. 2007. All rights reserved.
Product data sheet Rev. 02 — 19 March 2007 5 of 25
NXP Semiconductors ISP1110
USB transceiver with UART signaling
[1] Symbol names ending with underscore N, for example, _N, indicate active LOW signals.
[2] I = input; O = output; I/O = digital input/output; AI/O = analog input/output.
VCC(5V0) 12 - supply voltage input (4.0 V to 5.5 V); can be directly connected to
USB line VBUS
VCC(UART) 13 - supply voltage input (2.7 V to 4.5 V) for the UART signaling
VREG 14 - internal regulator output; a decoupling capacitor of at least 0.1 µF
is required
VCC(I/O) 15 - supply voltage for digital I/O pins (1.65 V to 2.85 V). When
VCC(I/O) is not connected, the DP and DM pins are in off-state.
This supply pin is totally independent of VCC(5V0) and VREG, and
must never exceed VREG.
UART_EN 16 I enable UART signaling mode when VCC(5V0) is not present
input pad; push-pull; CMOS
GND exposed
die pad - ground supply; down bonded to the exposed die pad (heat sink);
to be connected to the PCB ground
Table 2. Pin description
…continued
Symbol[1] Pin Type[2] Description
ISP1110_2 © NXP B.V. 2007. All rights reserved.
Product data sheet Rev. 02 — 19 March 2007 6 of 25
NXP Semiconductors ISP1110
USB transceiver with UART signaling
7. Functional description
7.1 Modes of operation
The ISP1110 supports two modes of operation:
USB mode (3.3 V signaling)
UART mode (2.8 V signaling)
Table 3 shows the definition of various operating modes.
Table 4 shows the pin status in various operating modes.
7.1.1 USB mode
When the ISP1110 is in USB mode, pins DP and DM work as the USB D+ and D lines,
respectively. The DP and DM driver is powered by VREG. The USB function is compatible
with the ISP1102 transceiver.
When the ISP1110 is in USB mode, the TXD input pin is ignored and the RXD output pin
is driven LOW.
The ISP1110 is in USB mode when VCC(5V0) > VCC(5V0)th and UART_EN is LOW. VCC(I/O)
must be on.
A short description of the USB detection sequence is:
1. The phone is connected to the USB port of a powered PC.
2. The ISP1110 detects VBUS is above VCC(5V0)th. The ISP1110 enters USB mode and
the Analog USB Transceiver (ATX) is powered by VREG.
Table 3. Operating modes: definition
VCC(I/O) VCC(UART) VCC(5V0) = VBUS UART_EN Mode
Off X X X not defined
On X off LOW isolate mode
On on off HIGH UART mode
On X on LOW USB mode
Table 4. Pin status in various modes
Pin Isolate mode UART mode USB mode
DP not powered high-Z see Table 5
DM not powered driven (= TXD) see Table 5
VP/VPO, VM/VMO high-Z LOW when OE_N = HIGH see Table 5
high-Z when OE_N = LOW
RCV LOW LOW see Table 5
VBUSDET LOW LOW HIGH
RXD LOW driven (= DP) LOW
UART_EN, TXD, SUSPEND,
SOFTCON, OE_N high-Z high-Z high-Z
VREG not powered 2.8 V 3.3 V
ISP1110_2 © NXP B.V. 2007. All rights reserved.
Product data sheet Rev. 02 — 19 March 2007 7 of 25
NXP Semiconductors ISP1110
USB transceiver with UART signaling
3. If the phone is switched off (VCC(I/O) is not present), then the DP and DM pins of the
ISP1110 remain at high-impedance and the PC will not detect any device attachment.
4. If the phone is switched on (VCC(I/O) is present), then the ISP1110 will drive the
VBUSDET pin to a HIGH level.
5. The phone processor detects that pin VBUSDET is HIGH. If the phone system
software is ready for USB operation, the phone processor will assert pin SOFTCON.
6. The ISP1110 will enable the DP pull-up resistor (RPU(DP)).
7. The PC detects DP at the HIGH level and starts the USB full-speed enumeration.
8. The PC loads the driver for the phone, if enumeration is successful.
For the flowchart, see Section 7.1.3.
7.1.2 UART mode
When the ISP1110 is in UART mode, the DP and DM driver is powered by 2.8 V. The
ISP1110 works as a level shifter between these pairs of pins:
From TXD (VCC(I/O) level) to DM (2.8 V level).
From DP (2.8 V level) to RXD (VCC(I/O) level).
When the ISP1110 is in UART mode, the USB differential receiver is disabled. The
SUSPEND and SOFTCON input pins are ignored. The RCV pin is driven LOW. The
VP/VPO and VM/VMO pins are driven LOW, if OE_N is HIGH. The VP/VPO and VM/VMO
pins are 3-state LOW, if OE_N is LOW.
The ISP1110 is in UART mode when VCC(5V0) < VCC(5V0)th and pin UART_EN is HIGH.
VCC(I/O) and VCC(UART) must be on.
A short description of the UART detection sequence is:
1. The phone is switched on (VCC(I/O) is present).
2. If VBUS is off, the ISP1110 will drive VBUSDET to a LOW level. The ATX is powered by
2.8 V.
3. The ISP1110 will enter UART signaling mode, if UART_EN is HIGH.
For the flowchart, see Section 7.1.3.
ISP1110_2 © NXP B.V. 2007. All rights reserved.
Product data sheet Rev. 02 — 19 March 2007 8 of 25
NXP Semiconductors ISP1110
USB transceiver with UART signaling
7.1.3 Mode detection flowchart
7.1.4 Mode switching time
When the USB cable is connected, the ISP1110 is in USB mode. When the USB cable is
removed and the UART cable is connected, the ISP1110 may switch to UART mode as
long as the VBUSDET output is LOW. On the other hand, if the UART cable is removed
and the USB cable is connected, the ISP1110 can switch to USB mode.
Fig 4. ISP1110 mode detection flowchart
004aaa681
START
PHONE IS OFF
(VCC(I/O) IS NOT POWERED;
DP AND DM ARE OFF-STATE)
VCC(I/O) = ON?
NO
VBUSDET = HIGH?
DP AND DM ARE
OFF-STATE AND
RXD = LOW
YES
NO
UART_EN = HIGH?
UART MODE ENABLED;
(TXD DM; DP RXD)
YES
PHONE IN UART FUNCTION
PC IS CONNECTED;
ISP1110 IS IN
USB MODE
YES
UART_EN =
LOW
AND
SOFTCON
= HIGH?
YES
DP PULL-UP
RESISTOR ENABLED
PHONE IN USB FUNCTION
NO
NO
ISP1110_2 © NXP B.V. 2007. All rights reserved.
Product data sheet Rev. 02 — 19 March 2007 9 of 25
NXP Semiconductors ISP1110
USB transceiver with UART signaling
UART mode cannot be enabled until the voltage on VCC(5V0) drops below the VBUSDET
threshold (0.8 V to 4.0 V). Therefore, the time required to switch from USB mode to UART
mode is determined by the RC discharge time on the VBUS line. Given that
VCC(5V0) = 5.0 V, R = 100 k and C = 1 µF, the discharge time is less than 200 ms (from
5 V to 0.8 V). Assume the detection of the UART cable connect or disconnect is very fast
(within 1 ms), the total switching time from the USB cable removal to entering UART mode
can be less than 200 ms. The total switching time from the UART cable removal to
entering USB mode can be less than 200 ms.
When VBUSDET becomes LOW, it is recommended that you wait for 50 ms before
asserting UART_EN. This is because there is no hysteresis built for the VBUSDET
threshold detector.
The time between VBUSDET going HIGH and SOFTCON assertion is 0 ms to 100 ms,
according to
Universal Serial Bus Specification Rev. 2.0, Section 7.1.7.3
.
7.2 Analog USB Transceiver (ATX)
The ISP1110 ATX supports USB full-speed (12 Mbit/s) signaling. The ATX function is
compatible with the ISP1102 transceiver. Table 5 shows the function of the ATX.
[1] Signal levels on the DP and DM pins are determined by other USB devices and external pull-up or pull-down resistors.
[2] In suspend mode (SUSPEND = HIGH), the differential receiver is inactive and output RCV is always LOW. The resume signaling is
detected through single-ended receivers VP/VPO and VM/VMO.
[1] RCV* denotes the signal level on output RCV just before the SE0 state occurs. This level is stable during
the SE0 period.
Table 5. USB function
SUSPEND OE_N DP and DM RCV VP/VPO VM/VMO Function
LOW LOW driving/receiving active VPO input VMO input normal driving (differential
receiver active)
LOW HIGH receiving[1] active VP output VM output receiving
HIGH LOW driving inactive[2] VPO input VMO input driving during suspend
(differential receiver inactive)
HIGH HIGH high-Z[1] inactive[2] VP output VM output low-power state
Table 6. USB driving function (pin OE_N = LOW)
VM/VMO VP/VPO Data
LOW LOW SE0
LOW HIGH differential logic 1
HIGH LOW differential logic 0
HIGH HIGH illegal state
Table 7. USB receiving function (pin OE_N = HIGH)
DP, DM RCV VP/VPO VM/VMO
Differential logic 0 LOW LOW HIGH
Differential logic 1 HIGH HIGH LOW
SE0 RCV*[1] LOW LOW
ISP1110_2 © NXP B.V. 2007. All rights reserved.
Product data sheet Rev. 02 — 19 March 2007 10 of 25
NXP Semiconductors ISP1110
USB transceiver with UART signaling
7.3 VBUS detector
The VBUS detector provides voltage level detection on VBUS, if VBUS is connected to
VCC(5V0). If VBUS is greater than VBUS valid threshold VCC(5V0)th, pin VBUSDET will output
a HIGH level. Otherwise, pin VBUSDET will output a LOW level.
The VBUS detector is powered by VCC(I/O).
7.4 DP pull-up resistor
The internal DP pull-up resistor is connected between the VREG and DP pins, if
pin SOFTCON is a HIGH level.
The pull-up resistor is context variable, as described in document
ECN_27%_Resistor
.
The variable pull-up resistor hardware is implemented here to meet the
ECN_27%_Resistor
specification.
7.5 DC-DC regulator
In USB mode, when VCC(5V0) = 4.0 V to 5.5 V, the regulator will output 3.0 V to 3.6 V. In
UART mode, when VCC(UART) = 2.7 V to 4.5 V, the regulator will output 2.35 V to 2.85 V.
A 0.1 µF capacitor is required to connect to the VREG pin.
7.6 Power selector
When VBUSDET = HIGH, the regulator will be powered by VCC(5V0). When
VBUSDET = LOW and UART_EN = HIGH, the regulator will be powered by VCC(UART).
When VCC(I/O) is not connected, the DP and DM output will be in off-state.
For proper operation, the VCC(I/O) voltage must not exceed VREG.
ISP1110_2 © NXP B.V. 2007. All rights reserved.
Product data sheet Rev. 02 — 19 March 2007 11 of 25
NXP Semiconductors ISP1110
USB transceiver with UART signaling
8. Limiting values
[1] Equivalent to discharging a 100 pF capacitor through a 1.5 k resistor (Human Body Model).
9. Recommended operating conditions
10. Static characteristics
Table 8. Limiting values
In accordance with the Absolute Maximum Rating System (IEC 60134).
Symbol Parameter Conditions Min Max Unit
VCC(5V0) supply voltage (5.0 V) 0.5 +6.0 V
VCC(UART) supply voltage (UART) 0.5 +5.5 V
VCC(I/O) input/output supply voltage 0.5 +4.6 V
VIinput voltage 0.5 VCC(I/O) + 0.5 V V
Ilu latch-up current VI=1.8 V to +5.4 V - 100 mA
VESD electrostatic discharge voltage all pins; ILI < 1 µA[1] 2000 +2000 V
pins DP, DM, VCC(5V0), GND;
ILI < 3 µA; 1 µF capacitor on
VCC(5V0)
[1] 3000 +3000 V
Tstg storage temperature 40 +125 °C
Table 9. Recommended operating conditions
Symbol Parameter Conditions Min Typ Max Unit
VCC(5V0) supply voltage (5.0 V) 4.0 5.0 5.5 V
VCC(UART) supply voltage (UART) 2.7 - 4.5 V
VCC(I/O) input/output supply voltage 1.65 1.8 2.85 V
VIinput voltage 0 - VCC(I/O) V
VIA(I/O) input voltage on analog I/O pins pins DP and DM 0 - 3.6 V
Tamb ambient temperature 40 - +85 °C
Tjjunction temperature 40 - +125 °C
Table 10. Static characteristics: supply pins
V
CC(5V0)
= 4.0 V to 5.5 V; V
CC(UART)
= 2.7 V to 4.5 V; V
CC(I/O)
= 1.65 V to 2.85 V; T
amb
=
40
°
C to +85
°
C.
Typical values are at V
CC(5V0)
= 5.0 V; V
CC(UART)
= 2.8 V; V
CC(I/O)
= 1.8 V; T
amb
= +25
°
C; unless otherwise specified.
Symbol Parameter Conditions Min Typ Max Unit
VO(VREG) output voltage on pin VREG USB mode [1] 3.0 3.3 3.6 V
UART mode 2.35 2.6 2.85 V
ICC(5V0) supply current (5.0 V) USB mode; transmitting and
receiving at 12 Mbit/s;
CL= 50 pF on pins DP and DM
[2] - 48mA
ICC(UART) supply current (UART) UART mode; 921.6 kbit/s - - 4 mA
ICC(I/O) supply current on pin VCC(I/O) transmitting and receiving at
12 Mbit/s [2] - 12mA
ISP1110_2 © NXP B.V. 2007. All rights reserved.
Product data sheet Rev. 02 — 19 March 2007 12 of 25
NXP Semiconductors ISP1110
USB transceiver with UART signaling
[1] The minimum voltage is 2.7 V in suspend mode.
[2] Maximum value characterized only, not tested in production.
[3] Excluding any load current and source current to the DP/DM pull-up and pull-down resistors (200 µA typical).
ICC(5V0)(idle) idle and SE0 supply current
(5.0 V) USB mode; idle: VDP > 2.7 V,
VDM < 0.3 V; SE0: VDP < 0.3 V,
VDM < 0.3 V
[3] - - 300 µA
ICC(I/O)(static) static supply current on
pin VCC(I/O)
--3µA
ICC(5V0)(susp) suspend mode supply current
(5.0 V) USB mode SUSPEND = HIGH [3] --35µA
ICC(UART)(off) off-state supply current
(UART) USB mode or UART_EN = LOW - - 3 µA
VCC(5V0)th supply voltage detection
threshold (5.0 V) 1.65 V VCC(I/O) 2.85 V 0.8 - 4.0 V
VCC(I/O)th supply voltage detection
threshold (I/O) 0.5 - 1.4 V
Table 10. Static characteristics: supply pins
…continued
V
CC(5V0)
= 4.0 V to 5.5 V; V
CC(UART)
= 2.7 V to 4.5 V; V
CC(I/O)
= 1.65 V to 2.85 V; T
amb
=
40
°
C to +85
°
C.
Typical values are at V
CC(5V0)
= 5.0 V; V
CC(UART)
= 2.8 V; V
CC(I/O)
= 1.8 V; T
amb
= +25
°
C; unless otherwise specified.
Symbol Parameter Conditions Min Typ Max Unit
Table 11. Static characteristics: digital pins
V
CC(5V0)
= 4.0 V to 5.5 V; V
CC(UART)
= 2.7 V to 4.5 V; V
CC(I/O)
= 1.65 V to 2.85 V; T
amb
=
40
°
C to +85
°
C.
Typical values are at V
CC(5V0)
= 5.0 V; V
CC(UART)
= 2.8 V; V
CC(I/O)
= 1.8 V; T
amb
= +25
°
C; unless otherwise specified.
Symbol Parameter Conditions Min Typ Max Unit
VCC(I/O) = 1.65 V to 2.85 V
Input levels
VIL LOW-level input voltage - - 0.3VCC(I/O) V
VIH HIGH-level input voltage 0.7VCC(I/O) -- V
Output levels
VOL LOW-level output voltage IOL = 100 µA - - 0.15 V
IOL = 2 mA - - 0.4 V
VOH HIGH-level output voltage IOH = 100 µAV
CC(I/O) 0.15 V - - V
IOH = 2 mA VCC(I/O) 0.4 V - - V
Leakage current
ILI input leakage current [1] 1-+1µA
Capacitance
Cin input capacitance pin to GND - - 10 pF
Example 1: VCC(I/O) = 1.8 V ± 0.15 V
Input levels
VIL LOW-level input voltage - - 0.5 V
VIH HIGH-level input voltage 1.2 - - V
Output levels
VOL LOW-level output voltage IOL = 100 µA - - 0.15 V
IOL = 2 mA - - 0.4 V
ISP1110_2 © NXP B.V. 2007. All rights reserved.
Product data sheet Rev. 02 — 19 March 2007 13 of 25
NXP Semiconductors ISP1110
USB transceiver with UART signaling
[1] If VCC(I/O) VCC(UART), then the leakage current will be higher than the specified value when in UART mode.
VOH HIGH-level output voltage IOH = 100 µA 1.5 - - V
IOH = 2 mA 1.25 - - V
Example 2: VCC(I/O) = 2.775 V ± 0.075 V
Input levels
VIL LOW-level input voltage - - 0.8 V
VIH HIGH-level input voltage 3.0 - - V
Output levels
VOL LOW-level output voltage IOL = 100 µA - - 0.15 V
IOL = 2 mA - - 0.4 V
VOH HIGH-level output voltage IOH = 100 µA 2.55 - - V
IOH = 2 mA 2.3 - - V
Table 11. Static characteristics: digital pins
…continued
V
CC(5V0)
= 4.0 V to 5.5 V; V
CC(UART)
= 2.7 V to 4.5 V; V
CC(I/O)
= 1.65 V to 2.85 V; T
amb
=
40
°
C to +85
°
C.
Typical values are at V
CC(5V0)
= 5.0 V; V
CC(UART)
= 2.8 V; V
CC(I/O)
= 1.8 V; T
amb
= +25
°
C; unless otherwise specified.
Symbol Parameter Conditions Min Typ Max Unit
Table 12. Static characteristics: analog I/O pins DP and DM
V
CC(5V0)
= 4.0 V to 5.5 V; V
CC(UART)
= 2.7 V to 4.5 V; V
CC(I/O)
= 1.65 V to 2.85 V; T
amb
=
40
°
C to +85
°
C.
Typical values are at V
CC(5V0)
= 5.0 V; V
CC(UART)
= 2.8 V; V
CC(I/O)
= 1.8 V; T
amb
= +25
°
C; unless otherwise specified.
Symbol Parameter Conditions Min Typ Max Unit
Input levels (USB mode)
Differential receiver
VDI differential input sensitivity |VDP VDM|0.2 - - V
VCM differential common mode
voltage range includes VDI range 0.8 - 2.5 V
Single-ended receiver
VIL LOW-level input voltage - - 0.8 V
VIH HIGH-level input voltage 2.0 - - V
Vhys hysteresis voltage 0.4 - 0.7 V
Input levels (UART mode)
VIL LOW-level input voltage 0.3 - +0.8 V
VIH HIGH-level input voltage 2.0 - 3.0 V
Vhys hysteresis voltage 0.4 - 0.7 V
Output levels (USB mode)
VOL LOW-level output voltage RL= 1.5 k to 3.6 V - - 0.3 V
VOH HIGH-level output voltage RL= 15 k to GND [1] 2.8 - 3.6 V
Output levels (UART mode)
VOL LOW-level output voltage IOL = 4 mA 0.1 - +0.37 V
VOH HIGH-level output voltage IOH = 4 mA 2.16 - 2.85 V
Leakage current
ILZ off-state leakage current 1- +1µA
Capacitance
Cin input capacitance pin to GND - - 10 pF
ISP1110_2 © NXP B.V. 2007. All rights reserved.
Product data sheet Rev. 02 — 19 March 2007 14 of 25
NXP Semiconductors ISP1110
USB transceiver with UART signaling
[1] VOH(min) = VREG 0.2 V.
[2] Includes external resistors of 33 Ω± 1 % on pins DP and DM.
[3] This voltage is available at pin VREG.
[4] The minimum voltage is 2.7 V in suspend mode.
11. Dynamic characteristics
Resistance
ZDRV driver output impedance steady-state drive [2] 34 39 44
ZINP input impedance 10 - - M
RPU(DP) pull-up resistance on pin DP bus idle 900 - 1575
bus active 1425 - 3090
Termination
VTERM termination voltage for upstream port pull-up
(RPU(DP))[3][4] 3.0 - 3.6 V
Table 12. Static characteristics: analog I/O pins DP and DM
…continued
V
CC(5V0)
= 4.0 V to 5.5 V; V
CC(UART)
= 2.7 V to 4.5 V; V
CC(I/O)
= 1.65 V to 2.85 V; T
amb
=
40
°
C to +85
°
C.
Typical values are at V
CC(5V0)
= 5.0 V; V
CC(UART)
= 2.8 V; V
CC(I/O)
= 1.8 V; T
amb
= +25
°
C; unless otherwise specified.
Symbol Parameter Conditions Min Typ Max Unit
Table 13. Dynamic characteristics: analog I/O pins DP and DM
V
CC(5V0)
= 4.0 V to 5.5 V; V
CC(UART)
= 2.7 V to 4.5 V; V
CC(I/O)
= 1.65 V to 2.85 V; T
amb
=
40
°
C to +85
°
C.
Typical values are at V
CC(5V0)
= 5.0 V; V
CC(UART)
= 2.8 V; V
CC(I/O)
= 1.8 V; T
amb
= +25
°
C; unless otherwise specified.
Symbol Parameter Conditions Min Typ Max Unit
Driver characteristics (UART mode)
tLR transition time: rise time CL< 250 pF; 10 % to 90 % of
|VOH VOL|; see Figure 5 [1] 50 - 200 ns
tLF transition time: fall time CL< 250 pF; 90 % to 10 % of
|VOH VOL|; see Figure 5 [1] 50 - 200 ns
Driver characteristics (USB mode)
tFR rise time CL= 50 pF to 125 pF; 10 % to
90 % of |VOH VOL|; see Figure 5 4 - 20 ns
tFF fall time CL= 50 pF to 125 pF; 90 % to
10 % of |VOH VOL|; see Figure 5 4 - 20 ns
FRFM differential rise time/fall
time matching excluding the first transition from
Idle state [2] 90 - 111.1 %
VCRS output signal crossover
voltage excluding the first transition from
Idle state; see Figure 6 [3] 1.3 - 2.0 V
Driver timing
tPLH(drv) driver propagation delay
(LOW to HIGH) VPO, VMO to DP, DM; see
Figure 6 and Figure 9 --18ns
tPHL(drv) driver propagation delay
(HIGH to LOW) VPO, VMO to DP, DM; see
Figure 6 and Figure 9 --18ns
tPHZ driver disable delay from
HIGH level OE_N to DP, DM; see Figure 7
and Figure 10 --15ns
tPLZ driver disable delay from
LOW level OE_N to DP, DM; see Figure 7
and Figure 10 --15ns
ISP1110_2 © NXP B.V. 2007. All rights reserved.
Product data sheet Rev. 02 — 19 March 2007 15 of 25
NXP Semiconductors ISP1110
USB transceiver with UART signaling
[1] For UART TXD on pin DM.
[2] tFR / tFF.
[3] Characterized only, not tested. Limits guaranteed by design.
tPZH driver enable delay to
HIGH level OE_N to DP, DM; see Figure 7
and Figure 10 --15ns
tPZL driver enable delay to LOW
level OE_N to DP, DM; see Figure 7
and Figure 10 --15ns
Receiver timings
Differential receiver
tPLH(rcv) receiver propagation delay
(LOW to HIGH) DP, DM to RCV; see Figure 8 and
Figure 11 --15ns
tPHL(rcv) receiver propagation delay
(HIGH to LOW) DP, DM to RCV; see Figure 8 and
Figure 11 --15ns
Single-ended receiver
tPLH(se) single-ended propagation
delay (LOW to HIGH) DP, DM to VP/VPO, VM/VMO;
see Figure 8 and Figure 11 --18ns
tPHL(se) single-ended propagation
delay (HIGH to LOW) DP, DM to VP/VPO, VM/VMO;
see Figure 8 and Figure 11 --18ns
Table 13. Dynamic characteristics: analog I/O pins DP and DM
…continued
V
CC(5V0)
= 4.0 V to 5.5 V; V
CC(UART)
= 2.7 V to 4.5 V; V
CC(I/O)
= 1.65 V to 2.85 V; T
amb
=
40
°
C to +85
°
C.
Typical values are at V
CC(5V0)
= 5.0 V; V
CC(UART)
= 2.8 V; V
CC(I/O)
= 1.8 V; T
amb
= +25
°
C; unless otherwise specified.
Symbol Parameter Conditions Min Typ Max Unit
Fig 5. Rise time and fall time Fig 6. Timing of VPO and VMO to DP and DM
Fig 7. Timing of OE_N to DP and DM Fig 8. Timing of DP and DM to RCV, VP/VPO and
VM/VMO
004aaa572
VOL
tFR, tLR tFF, tLF
VOH 90 %
10 % 10 %
90 %
004aaa573
VOL
VOH
tPHL(drv)
tPLH(drv)
VCRS VCRS
0.9 V
0.9 V
1.8 V
0 V
logic input
differential
data lines
004aaa574
VOL
VOH
tPZH
tPZL tPHZ
tPLZ
VOH 0.3 V
VOL + 0.3 V
VCRS
0.9 V
0.9 V
1.8 V
0 V
logic
input
differential
data lines
tPLH(se) tPHL(se)
004aaa575
VOL
VOH
tPHL(rcv)
tPLH(rcv)
VCRS VCRS
0.9 V
0.9 V
2.0 V
0.8 V
logic output
differential
data lines
ISP1110_2 © NXP B.V. 2007. All rights reserved.
Product data sheet Rev. 02 — 19 March 2007 16 of 25
NXP Semiconductors ISP1110
USB transceiver with UART signaling
12. Test information
Load capacitance CL= 50 pF (minimum or maximum timing)
Fig 9. Load on pins DP and DM
V = 0 V for tPZH and tPHZ
V = VREG for tPZL and tPLZ
Fig 10. Load on pins DP and DM for enable time and disable time
Fig 11. Load on pins VM/VMO, VP/VPO and RCV
004aaa680
CL
test point
15 k
DP or DM
33
D.U.T.
V
33
D.U.T. 500
50 pF
004aaa517
DP or
DM
test point
004aaa709
25 pF
test point
D.U.T.
ISP1110_2 © NXP B.V. 2007. All rights reserved.
Product data sheet Rev. 02 — 19 March 2007 17 of 25
NXP Semiconductors ISP1110
USB transceiver with UART signaling
13. Package outline
Fig 12. Package outline SOT639-2 (HBCC16)
2.5
A1bA2
UNIT DEhe1
REFERENCES
OUTLINE
VERSION EUROPEAN
PROJECTION ISSUE DATE
01-11-13
03-03-12
IEC JEDEC JEITA
mm 0.8 0.10
0.05 0.7
0.6 3.1
2.9 1.45
1.35
3.1
2.9
1.45
1.35
0.33
0.27
DIMENSIONS (mm are the original dimensions)
SOT639-2 MO-217
Dh
0.33
0.27
b1
0.38
0.32
b3
0.38
0.32
b2
2.45
e3
E
0.23
0.17
f
0.5
we yy
1
0.1 0.05 0.2
2.5
e2
2.45
e4
0.08
v
0 2.5 5 mm
scale
SOT639-2
HBCC16: plastic thermal enhanced bottom chip carrier; 16 terminals; body 3 x 3 x 0.65 mm
A
max.
detail X
y
y1C
e
e
e1
e3
Dh
e4
D
E
X
C
BA
16
113
59
e2
1/2 e3
1/2 e4
Eh
A1
A2
A
b2
b1
b3
b
f
terminal 1
index area
AC
CB
vM
wM
AC
CB
vM
wM
AC
CB
vM
wM
AC
CB
vM
wM
ISP1110_2 © NXP B.V. 2007. All rights reserved.
Product data sheet Rev. 02 — 19 March 2007 18 of 25
NXP Semiconductors ISP1110
USB transceiver with UART signaling
14. Packing information
The ISP1110VH (HBCC16 package) is delivered on a Type A carrier tape, see Figure 13.
The tape dimensions are given in Table 14.
The reel diameter is 330 mm. The reel is made of polystyrene and is not designed for use
in a baking process.
The cumulative tolerance of 10 successive sprocket holes is ±0.02 mm. The camber must
not exceed 1 mm in 100 mm.
15. Soldering
This text provides a very brief insight into a complex technology. A more in-depth account
of soldering ICs can be found in Application Note
AN10365 “Surface mount reflow
soldering description”
.
Fig 13. Carrier tape dimensions
Table 14. Type A carrier tape dimensions for the ISP1110VH
Dimension Value Unit
A0 3.3 mm
B0 3.3 mm
K0 1.1 mm
P1 8.0 mm
W 12.0 ± 0.3 mm
004aaa728
type B
type A
B0
4
W
K0
A0
4K0
A0
P1
B0
P1
elongated
sprocket hole
direction of feed
W
direction of feed
ISP1110_2 © NXP B.V. 2007. All rights reserved.
Product data sheet Rev. 02 — 19 March 2007 19 of 25
NXP Semiconductors ISP1110
USB transceiver with UART signaling
15.1 Introduction to soldering
Soldering is one of the most common methods through which packages are attached to
Printed Circuit Boards (PCBs), to form electrical circuits. The soldered joint provides both
the mechanical and the electrical connection. There is no single soldering method that is
ideal for all IC packages. Wave soldering is often preferred when through-hole and
Surface Mount Devices (SMDs) are mixed on one printed wiring board; however, it is not
suitable for fine pitch SMDs. Reflow soldering is ideal for the small pitches and high
densities that come with increased miniaturization.
15.2 Wave and reflow soldering
Wave soldering is a joining technology in which the joints are made by solder coming from
a standing wave of liquid solder. The wave soldering process is suitable for the following:
Through-hole components
Leaded or leadless SMDs, which are glued to the surface of the printed circuit board
Not all SMDs can be wave soldered. Packages with solder balls, and some leadless
packages which have solder lands underneath the body, cannot be wave soldered. Also,
leaded SMDs with leads having a pitch smaller than ~0.6 mm cannot be wave soldered,
due to an increased probability of bridging.
The reflow soldering process involves applying solder paste to a board, followed by
component placement and exposure to a temperature profile. Leaded packages,
packages with solder balls, and leadless packages are all reflow solderable.
Key characteristics in both wave and reflow soldering are:
Board specifications, including the board finish, solder masks and vias
Package footprints, including solder thieves and orientation
The moisture sensitivity level of the packages
Package placement
Inspection and repair
Lead-free soldering versus PbSn soldering
15.3 Wave soldering
Key characteristics in wave soldering are:
Process issues, such as application of adhesive and flux, clinching of leads, board
transport, the solder wave parameters, and the time during which components are
exposed to the wave
Solder bath specifications, including temperature and impurities
15.4 Reflow soldering
Key characteristics in reflow soldering are:
Lead-free versus SnPb soldering; note that a lead-free reflow process usually leads to
higher minimum peak temperatures (see Figure 14) than a PbSn process, thus
reducing the process window
ISP1110_2 © NXP B.V. 2007. All rights reserved.
Product data sheet Rev. 02 — 19 March 2007 20 of 25
NXP Semiconductors ISP1110
USB transceiver with UART signaling
Solder paste printing issues including smearing, release, and adjusting the process
window for a mix of large and small components on one board
Reflow temperature profile; this profile includes preheat, reflow (in which the board is
heated to the peak temperature) and cooling down. It is imperative that the peak
temperature is high enough for the solder to make reliable solder joints (a solder paste
characteristic). In addition, the peak temperature must be low enough that the
packages and/or boards are not damaged. The peak temperature of the package
depends on package thickness and volume and is classified in accordance with
Table 15 and 16
Moisture sensitivity precautions, as indicated on the packing, must be respected at all
times.
Studies have shown that small packages reach higher temperatures during reflow
soldering, see Figure 14.
Table 15. SnPb eutectic process (from J-STD-020C)
Package thickness (mm) Package reflow temperature (°C)
Volume (mm3)
< 350 350
< 2.5 235 220
2.5 220 220
Table 16. Lead-free process (from J-STD-020C)
Package thickness (mm) Package reflow temperature (°C)
Volume (mm3)
< 350 350 to 2000 > 2000
< 1.6 260 260 260
1.6 to 2.5 260 250 245
> 2.5 250 245 245
MSL: Moisture Sensitivity Level
Fig 14. Temperature profiles for large and small components
001aac844
temperature
time
minimum peak temperature
= minimum soldering temperature
maximum peak temperature
= MSL limit, damage level
peak
temperature
ISP1110_2 © NXP B.V. 2007. All rights reserved.
Product data sheet Rev. 02 — 19 March 2007 21 of 25
NXP Semiconductors ISP1110
USB transceiver with UART signaling
For further information on temperature profiles, refer to Application Note
AN10365
“Surface mount reflow soldering description”
.
16. Abbreviations
17. References
[1] Universal Serial Bus Specification Rev. 2.0
[2] ECN_27%_Resistor (Pull-up/pull-down Resistors ECN)
18. Revision history
Table 17. Abbreviations
Acronym Description
ASIC Application Specific Integrated Circuits
ATX Analog USB Transceiver
CMOS Complementary Metal-Oxide Semiconductor
HBM Human Body Model
PDA Personal Digital Assistant
RXD Receive Data
SE0 Single-Ended Zero
TXD Transmit Data
UART Universal Asynchronous Receiver-Transmitter
USB Universal Serial Bus
Table 18. Revision history
Document ID Release date Data sheet status Change notice Supersedes
ISP1110_2 20070319 Product data sheet - ISP1110_1
Modifications: The format of this data sheet has been redesigned to comply with the new identity
guidelines of NXP Semiconductors.
Legal texts have been adapted to the new company name where appropriate.
Table 2 “Pin description”: updated description for pin 6.
Section 7.1 “Modes of operation”: updated Table 3 and added Table 4.
Section 7.1.1 “USB mode”: updated third paragraph.
Section 7.1.2 “UART mode”: updated fourth paragraph.
Table 9 “Recommended operating conditions”: added Tj.
ISP1110_1 20060323 Product data sheet - -
ISP1110_2 © NXP B.V. 2007. All rights reserved.
Product data sheet Rev. 02 — 19 March 2007 22 of 25
NXP Semiconductors ISP1110
USB transceiver with UART signaling
19. Legal information
19.1 Data sheet status
[1] Please consult the most recently issued document before initiating or completing a design.
[2] The term ‘short data sheet’ is explained in section “Definitions”.
[3] The product status of device(s) described in this document may have changed since this document was published and may differ in case of multiple devices. The latest product status
information is available on the Internet at URL http://www.nxp.com.
19.2 Definitions
Draft — The document is a draft version only. The content is still under
internal review and subject to formal approval, which may result in
modifications or additions. NXP Semiconductors does not give any
representations or warranties as to the accuracy or completeness of
information included herein and shall have no liability for the consequences of
use of such information.
Short data sheet — A short data sheet is an extract from a full data sheet
with the same product type number(s) and title. A short data sheet is intended
for quick reference only and should not be relied upon to contain detailed and
full information. For detailed and full information see the relevant full data
sheet, which is available on request via the local NXP Semiconductors sales
office. In case of any inconsistency or conflict with the short data sheet, the
full data sheet shall prevail.
19.3 Disclaimers
General — Information in this document is believed to be accurate and
reliable. However, NXP Semiconductors does not give any representations or
warranties, expressed or implied, as to the accuracy or completeness of such
information and shall have no liability for the consequences of use of such
information.
Right to make changes — NXP Semiconductors reserves the right to make
changes to information published in this document, including without
limitation specifications and product descriptions, at any time and without
notice. This document supersedes and replaces all information supplied prior
to the publication hereof.
Suitability for use — NXP Semiconductors products are not designed,
authorized or warranted to be suitable for use in medical, military, aircraft,
space or life support equipment, nor in applications where failure or
malfunction of a NXP Semiconductors product can reasonably be expected to
result in personal injury, death or severe property or environmental damage.
NXP Semiconductors accepts no liability for inclusion and/or use of NXP
Semiconductors products in such equipment or applications and therefore
such inclusion and/or use is at the customer’s own risk.
Applications — Applications that are described herein for any of these
products are for illustrative purposes only. NXP Semiconductors makes no
representation or warranty that such applications will be suitable for the
specified use without further testing or modification.
Limiting values — Stress above one or more limiting values (as defined in
the Absolute Maximum Ratings System of IEC 60134) may cause permanent
damage to the device. Limiting values are stress ratings only and operation of
the device at these or any other conditions above those given in the
Characteristics sections of this document is not implied. Exposure to limiting
values for extended periods may affect device reliability.
Terms and conditions of sale — NXP Semiconductors products are sold
subject to the general terms and conditions of commercial sale, as published
at http://www.nxp.com/profile/terms, including those pertaining to warranty,
intellectual property rights infringement and limitation of liability, unless
explicitly otherwise agreed to in writing by NXP Semiconductors. In case of
any inconsistency or conflict between information in this document and such
terms and conditions, the latter will prevail.
No offer to sell or license — Nothing in this document may be interpreted
or construed as an offer to sell products that is open for acceptance or the
grant, conveyance or implication of any license under any copyrights, patents
or other industrial or intellectual property rights.
19.4 Trademarks
Notice: All referenced brands, product names, service names and trademarks
are the property of their respective owners.
20. Contact information
For additional information, please visit: http://www.nxp.com
For sales office addresses, send an email to: salesaddresses@nxp.com
Document status[1][2] Product status[3] Definition
Objective [short] data sheet Development This document contains data from the objective specification for product development.
Preliminary [short] data sheet Qualification This document contains data from the preliminary specification.
Product [short] data sheet Production This document contains the product specification.
ISP1110_2 © NXP B.V. 2007. All rights reserved.
Product data sheet Rev. 02 — 19 March 2007 23 of 25
continued >>
NXP Semiconductors ISP1110
USB transceiver with UART signaling
21. Tables
Table 1. Ordering information . . . . . . . . . . . . . . . . . . . . .2
Table 2. Pin description . . . . . . . . . . . . . . . . . . . . . . . . . .4
Table 3. Operating modes: definition . . . . . . . . . . . . . . . .6
Table 4. Pin status in various modes . . . . . . . . . . . . . . . .6
Table 5. USB function . . . . . . . . . . . . . . . . . . . . . . . . . . .9
Table 6. USB driving function (pin OE_N = LOW) . . . . . .9
Table 7. USB receiving function (pin OE_N = HIGH) . . .9
Table 8. Limiting values . . . . . . . . . . . . . . . . . . . . . . . . .11
Table 9. Recommended operating conditions . . . . . . . .11
Table 10. Static characteristics: supply pins . . . . . . . . . .11
Table 11. Static characteristics: digital pins . . . . . . . . . . .12
Table 12. Static characteristics: analog I/O pins
DP and DM . . . . . . . . . . . . . . . . . . . . . . . . . . .13
Table 13. Dynamic characteristics: analog I/O pins
DP and DM . . . . . . . . . . . . . . . . . . . . . . . . . . .14
Table 14. Type A carrier tape dimensions for the
ISP1110VH . . . . . . . . . . . . . . . . . . . . . . . . . . .18
Table 15. SnPb eutectic process (from J-STD-020C) . . .20
Table 16. Lead-free process (from J-STD-020C) . . . . . .20
Table 17. Abbreviations . . . . . . . . . . . . . . . . . . . . . . . . . .21
Table 18. Revision history . . . . . . . . . . . . . . . . . . . . . . . .21
ISP1110_2 © NXP B.V. 2007. All rights reserved.
Product data sheet Rev. 02 — 19 March 2007 24 of 25
continued >>
NXP Semiconductors ISP1110
USB transceiver with UART signaling
22. Figures
Fig 1. Block diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . .2
Fig 2. Pin configuration HBCC16; top view . . . . . . . . . . .3
Fig 3. Pin configuration HBCC16; bottom view . . . . . . . .3
Fig 4. ISP1110 mode detection flowchart . . . . . . . . . . . .8
Fig 5. Rise time and fall time . . . . . . . . . . . . . . . . . . . . .15
Fig 6. Timing of VPO and VMO to DP and DM . . . . . . .15
Fig 7. Timing of OE_N to DP and DM . . . . . . . . . . . . . .15
Fig 8. Timing of DP and DM to RCV, VP/VPO and
VM/VMO . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .15
Fig 9. Load on pins DP and DM. . . . . . . . . . . . . . . . . . .16
Fig 10. Load on pins DP and DM for enable time and
disable time . . . . . . . . . . . . . . . . . . . . . . . . . . . . .16
Fig 11. Load on pins VM/VMO, VP/VPO and RCV . . . . .16
Fig 12. Package outline SOT639-2 (HBCC16). . . . . . . . .17
Fig 13. Carrier tape dimensions. . . . . . . . . . . . . . . . . . . .18
Fig 14. Temperature profiles for large and small
components . . . . . . . . . . . . . . . . . . . . . . . . . . . . .20
NXP Semiconductors ISP1110
USB transceiver with UART signaling
© NXP B.V. 2007. All rights reserved.
For more information, please visit: http://www.nxp.com
For sales office addresses, please send an email to: salesaddresses@nxp.com
Date of release: 19 March 2007
Document identifier: ISP1110_2
Please be aware that important notices concerning this document and the product(s)
described herein, have been included in section ‘Legal information’.
23. Contents
1 General description. . . . . . . . . . . . . . . . . . . . . . 1
2 Features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1
3 Applications . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2
4 Ordering information. . . . . . . . . . . . . . . . . . . . . 2
5 Block diagram . . . . . . . . . . . . . . . . . . . . . . . . . . 2
6 Pinning information. . . . . . . . . . . . . . . . . . . . . . 3
6.1 Pinning . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3
6.2 Pin description . . . . . . . . . . . . . . . . . . . . . . . . . 4
7 Functional description . . . . . . . . . . . . . . . . . . . 6
7.1 Modes of operation. . . . . . . . . . . . . . . . . . . . . . 6
7.1.1 USB mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
7.1.2 UART mode . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
7.1.3 Mode detection flowchart . . . . . . . . . . . . . . . . . 8
7.1.4 Mode switching time. . . . . . . . . . . . . . . . . . . . . 8
7.2 Analog USB Transceiver (ATX). . . . . . . . . . . . . 9
7.3 VBUS detector . . . . . . . . . . . . . . . . . . . . . . . . . 10
7.4 DP pull-up resistor . . . . . . . . . . . . . . . . . . . . . 10
7.5 DC-DC regulator. . . . . . . . . . . . . . . . . . . . . . . 10
7.6 Power selector . . . . . . . . . . . . . . . . . . . . . . . . 10
8 Limiting values. . . . . . . . . . . . . . . . . . . . . . . . . 11
9 Recommended operating conditions. . . . . . . 11
10 Static characteristics. . . . . . . . . . . . . . . . . . . . 11
11 Dynamic characteristics . . . . . . . . . . . . . . . . . 14
12 Test information. . . . . . . . . . . . . . . . . . . . . . . . 16
13 Package outline . . . . . . . . . . . . . . . . . . . . . . . . 17
14 Packing information. . . . . . . . . . . . . . . . . . . . . 18
15 Soldering . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18
15.1 Introduction to soldering . . . . . . . . . . . . . . . . . 19
15.2 Wave and reflow soldering . . . . . . . . . . . . . . . 19
15.3 Wave soldering. . . . . . . . . . . . . . . . . . . . . . . . 19
15.4 Reflow soldering. . . . . . . . . . . . . . . . . . . . . . . 19
16 Abbreviations. . . . . . . . . . . . . . . . . . . . . . . . . . 21
17 References . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21
18 Revision history. . . . . . . . . . . . . . . . . . . . . . . . 21
19 Legal information. . . . . . . . . . . . . . . . . . . . . . . 22
19.1 Data sheet status . . . . . . . . . . . . . . . . . . . . . . 22
19.2 Definitions. . . . . . . . . . . . . . . . . . . . . . . . . . . . 22
19.3 Disclaimers. . . . . . . . . . . . . . . . . . . . . . . . . . . 22
19.4 Trademarks. . . . . . . . . . . . . . . . . . . . . . . . . . . 22
20 Contact information. . . . . . . . . . . . . . . . . . . . . 22
21 Tables . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23
22 Figures . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24
23 Contents . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25