AOD4126/AOI4126
100V N-Channel MOSFET
SDMOSTM
General Description Product Summary
V
DS
I
D
(at V
GS
=10V) 43A
R
DS(ON)
(at V
GS
=10V) < 24m
R
DS(ON)
(at V
GS
= 7V) < 30m
100% UIS Tested
100% R
g
Tested
Symbol
V
DS
Drain-Source Voltage
100
The AOD4126&AOI4126 are fabricated with SDMOS
TM
trench technology that combines excellent R
DS(ON)
with
low gate charge.The result is outstanding efficiency with
controlled switching behavior. This universal technology is
well suited for PWM, load switching and general purpose
applications.
V
Maximum UnitsParameter
Absolute Maximum Ratings T
A
=25°C unless otherwise noted
100V
G
D
S
TO252
DPAK
Top View
G
S
D
G
S
D
G
G
D
D
S
S
D
Top View
Bottom View
TO-251A
IPAK
V
DS
V
GS
I
DM
I
AS
, I
AR
E
AS
, E
AR
T
J
, T
STG
Symbol
t 10s
Steady-State
Steady-State
R
θJC
100Pulsed Drain Current
C
Continuous Drain
Current
B
Parameter Typ Max
T
C
=25°C
3
50
T
C
=100°C
Maximum Junction-to-Ambient
A
°C/W
R
θJA
8
35 10
V±25Gate-Source Voltage
Drain-Source Voltage
100
Units
Junction and Storage Temperature Range -55 to 175 °C
Thermal Characteristics
V
Avalanche energy L=0.1mH
C
mJ
Avalanche Current
C
6
Continuous Drain
Current
A
39
7.5
A28
A
T
A
=25°C I
DSM
A
T
A
=70°C
I
D
43
30
T
C
=25°C
T
C
=100°C
Power Dissipation
B
P
D
W
Power Dissipation
A
P
DSM
W
T
A
=70°C
100
1.9
T
A
=25°C
Maximum Junction-to-Case °C/W
°C/W
Maximum Junction-to-Ambient
A D
142
1.5
Rev1 : May 2012
www.aosmd.com Page 1 of 7
AOD4126/AOI4126
Symbol Min Typ Max Units
BV
DSS
100 V
V
DS
=100V, V
GS
=0V 10
T
J
=55°C 50
I
GSS
100 nA
V
GS(th)
Gate Threshold Voltage 2 3.3 4 V
I
D(ON)
100 A
19 24
T
J
=125°C 36 43
23.5 30 m
g
FS
34 S
V
SD
0.66 1 V
I
S
40 A
C
iss
1400 1770 2200 pF
C
oss
115 165 214 pF
C
rss
33 55 80 pF
R
g
0.3 0.65 1.0
Q
g
14 28 42 nC
Q
gs
4 9 14 nC
Q
gd
6 10 14 nC
t
D(on)
12 ns
t
r
4 ns
t
17
ns
Maximum Body-Diode Continuous Current
Input Capacitance
Output Capacitance
Turn-On DelayTime
DYNAMIC PARAMETERS
Turn-On Rise Time
Turn-Off DelayTime
V
GS
=10V, V
DS
=50V, R
L
=2.5,
R
=3
Gate resistance V
GS
=0V, V
DS
=0V, f=1MHz
Total Gate Charge V
GS
=10V, V
DS
=50V, I
D
=20A
Gate Source Charge
Gate Drain Charge
R
DS(ON)
Static Drain-Source On-Resistance m
I
S
=1A,V
GS
=0V
V
DS
=5V, I
D
=20A
V
GS
=7V, I
D
=15A
V
DS
=V
GS
I
D
=250µA
V
DS
=0V, V
GS
= ±25V
Zero Gate Voltage Drain Current
Gate-Body leakage current
Forward Transconductance
Diode Forward Voltage
Electrical Characteristics (T
J
=25°C unless otherwise noted)
STATIC PARAMETERS Parameter Conditions
I
DSS
µA
Drain-Source Breakdown Voltage
On state drain current
I
D
=250µA, V
GS
=0V
V
GS
=10V, V
DS
=5V
V
GS
=10V, I
D
=20A
Reverse Transfer Capacitance V
GS
=0V, V
DS
=50V, f=1MHz
SWITCHING PARAMETERS
t
D(off)
17
ns
t
f
5 ns
t
rr
12 20 26 ns
Q
rr
60 82 110 nC
COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS ARE NOT AUTHORIZED. AOS DOES NOT ASSUME ANY LIABILITY ARISING
OUT OF SUCH APPLICATIONS OR USES OF ITS PRODUCTS. AOS RESERVES THE RIGHT TO IMPROVE PRODUCT DESIGN,
FUNCTIONS AND RELIABILITY WITHOUT NOTICE.
Body Diode Reverse Recovery Charge I
F
=20A, dI/dt=500A/µs
Turn-Off DelayTime
R
GEN
=3
Turn-Off Fall Time
Body Diode Reverse Recovery Time I
F
=20A, dI/dt=500A/µs
A. The value of RθJA is measured with the device mounted on 1in2FR-4 board with 2oz. Copper, in a still air environment with TA=25°C. The
Power dissipation PDSM is based on R θJA and the maximum allowed junction temperature of 150°C. The value in any given application depends
on the user's specific board design, and the maximum temperature of 175°C may be used if the PCB allows it.
B. The power dissipation PDis based on TJ(MAX)=175°C, using junction-to-case thermal resistance, and is more useful in setting the upper
dissipation limit for cases where additional heatsinking is used.
C. Repetitive rating, pulse width limited by junction temperature TJ(MAX)=175°C. Ratings are based on low frequency and duty cycles to keep
initial TJ =25°C.
D. The RθJA is the sum of the thermal impedence from junction to case RθJC and case to ambient.
E. The static characteristics in Figures 1 to 6 are obtained using <300µs pulses, duty cycle 0.5% max.
F. These curves are based on the junction-to-case thermal impedence which is measured with the device mounted to a large heatsink, assuming
a maximum junction temperature of TJ(MAX)=175°C. The SOA curve provides a single pulse rating.
G. These tests are performed with the device mounted on 1 in2FR-4 board with 2oz. Copper, in a still air environment with TA=25°C.
Rev 1 : May 2012 www.aosmd.com Page 2 of 7
AOD4126/AOI4126
TYPICAL ELECTRICAL AND THERMAL CHARACTERISTICS
17
5
2
10
0
18
0
10
20
30
40
50
60
3 4 5 6 7
ID(A)
VGS(Volts)
Figure 2: Transfer Characteristics (Note E)
15
18
21
24
27
30
0 5 10 15 20 25 30 35 40
RDS(ON) (m
)
ID(A)
Figure 3: On-Resistance vs. Drain Current and Gate
Voltage (Note E)
0.8
1
1.2
1.4
1.6
1.8
2
2.2
2.4
0 25 50 75 100 125 150 175 200
Normalized On-Resistance
Temperature (°C)
Figure 4: On-Resistance vs. Junction Temperature
(Note E)
VGS=7V
ID=15A
VGS=10V
ID=20A
25°C
125°C
V
DS
=5V
VGS=7V
VGS=10V
0
20
40
60
012345
ID(A)
VDS (Volts)
Fig 1: On-Region Characteristics (Note E)
V
GS
=6V
6.5V
8V
10V 7V
40
Voltage (Note E)
1.0E-05
1.0E-04
1.0E-03
1.0E-02
1.0E-01
1.0E+00
1.0E+01
1.0E+02
0.0 0.2 0.4 0.6 0.8 1.0 1.2
IS(A)
VSD (Volts)
Figure 6: Body-Diode Characteristics (Note E)
25°C
125°C
(Note E)
10
20
30
40
50
6 7 8 9 10
RDS(ON) (m
)
VGS (Volts)
Figure 5: On-Resistance vs. Gate-Source Voltage
(Note E)
ID=20A
25°C
125°C
Rev 1: May 2012 www.aosmd.com Page 3 of 7
AOD4126/AOI4126
TYPICAL ELECTRICAL AND THERMAL CHARACTERISTICS
17
5
2
10
0
18
0
2
4
6
8
10
0 5 10 15 20 25 30
VGS (Volts)
Qg(nC)
Figure 7: Gate-Charge Characteristics
0
500
1000
1500
2000
2500
0 20 40 60 80 100
Capacitance (pF)
VDS (Volts)
Figure 8: Capacitance Characteristics
Ciss
0
200
400
600
800
1000
0.0001 0.001 0.01 0.1 1 10
Power (W)
Pulse Width (s)
Figure 10: Single Pulse Power Rating Junction-to-
Coss C
rss
VDS=50V
ID=20A
TJ(Max)=175°C
TC=25°C
10
µ
s
0.0
0.1
1.0
10.0
100.0
1000.0
0.01 0.1 1 10 100 1000
ID(Amps)
VDS (Volts)
Figure 9: Maximum Forward Biased Safe
10
µ
s
10ms
1ms
DC
RDS(ON)
limited
TJ(Max)=175°C
T
C
=25°C
100
µ
s
40
Case (Note F)
0.01
0.1
1
10
0.00001 0.0001 0.001 0.01 0.1 1 10
Zθ
θ
θ
θJC Normalized Transient
Thermal Resistance
Pulse Width (s)
Figure 11: Normalized Maximum Transient Thermal Impedance (Note F)
Single Pulse
D=Ton/T
TJ,PK=TC+PDM.ZθJC.RθJC
Ton T
PD
In descending order
D=0.5, 0.3, 0.1, 0.05, 0.02, 0.01, single pulse
Operating Area (Note F)
RθJC=1.5°C/W
Rev 1: May 2012 www.aosmd.com Page 4 of 7
AOD4126/AOI4126
TYPICAL ELECTRICAL AND THERMAL CHARACTERISTICS
17
5
2
10
0
18
10
100
0.000001 0.00001 0.0001 0.001
IAR (A) Peak Avalanche Current
Time in avalanche, tA(s)
Figure 12: Single Pulse Avalanche capability
(Note C)
0
30
60
90
120
0 25 50 75 100 125 150 175
Power Dissipation (W)
TCASE (°
°°
°C)
Figure 13: Power De-rating (Note F)
0
10
20
30
40
50
60
0 25 50 75 100 125 150 175
Current rating ID(A)
TCASE (°
°°
°C)
Figure 14: Current De
-
rating (Note F)
TA=25°C
1
10
100
1000
0.01 1 100
Power (W)
Pulse Width (s)
Figure 15: Single Pulse Power Rating Junction
-
to
-
TA=25°C
TA=150°C
TA=100°C
TA=125°C
40
0.001
0.01
0.1
1
10
0.00001 0.0001 0.001 0.01 0.1 1 10 100 1000
Zθ
θ
θ
θJA Normalized Transient
Thermal Resistance
Pulse Width (s)
Figure 16: Normalized Maximum Transient Thermal Impedance (Note H)
Single Pulse
D=Ton/T
TJ,PK=TA+PDM.ZθJA.RθJA
Ton T
PD
In descending order
D=0.5, 0.3, 0.1, 0.05, 0.02, 0.01, single pulse
Figure 14: Current De
-
rating (Note F)
Figure 15: Single Pulse Power Rating Junction
-
to
-
Ambient (Note H)
RθJA=42°C/W
Rev 1: May 2012 www.aosmd.com Page 5 of 7
AOD4126/AOI4126
TYPICAL ELECTRICAL AND THERMAL CHARACTERISTICS
0
3
6
9
12
15
50
100
150
200
250
300
0 5 10 15 20 25 30
Irm (A)
Qrr (nC)
IS(A)
Figure 17: Diode Reverse Recovery Charge and Peak
Current vs. Conduction Current
di/dt=800A/µs125ºC
125ºC
25ºC
25ºC
Qrr
Irm
-2
2
6
10
14
18
22
26
30
0
30
60
90
120
150
0 200 400 600 800 1000
Irm (A)
Qrr (nC)
di/dt (A/µ
µµ
µs)
Figure 19: Diode Reverse Recovery Charge and Peak
Current vs. di/dt
125ºC
125ºC
25ºC
25ºC
Is=20A
Q
rr
Irm
0
0.2
0.4
0.6
0.8
1
1.2
1.4
1.6
1.8
2
0
4
8
12
16
20
24
0 5 10 15 20 25 30
S
trr (ns)
IS(A)
Figure 18: Diode Reverse Recovery Time and
Softness Factor vs. Conduction Current
di/dt=800A/µs125ºC
125ºC
25ºC
25ºC
trr
S
0
0.5
1
1.5
2
2.5
3
0
6
12
18
24
30
0 200 400 600 800 1000
S
trr (ns)
di/dt (A/µ
µµ
µs)
Figure 20: Diode Reverse Recovery Time and
Softness Factor vs. di/dt
125ºC
25ºC
25ºC
125ºC
Is=20A
trr
S
Rev 1: May 2012 www.aosmd.com Page 6 of 7
AOD4126/AOI4126
-
+
VDC
Ig
Vds
DUT
-
+
VDC
Vgs
Vgs
10V
Qg
Qgs Qgd
Charge
Gate Charge Test Circuit & Waveform
-
+
VDC
DUT Vdd
Vgs
Vds
Vgs
RL
Rg
Vgs
Vds
10%
90%
Resistive Switching Test Circuit & Waveforms
t t
r
d(on)
t
on
t
d(off)
t
f
t
off
Id
+
L
Vds
BV
Unclamped Inductive Switching (UIS) Test Circuit & Waveforms
Vds
DSS
2
E = 1/2 LI
AR
AR
Vdd
Vgs
Vgs
Rg
DUT
-
+
VDC
Vgs
Id
Vgs
I
Ig
Vgs
-
+
VDC
DUT
L
Vgs
Vds
Isd
Isd
Diode Recovery Test Circuit & Waveforms
Vds -
Vds +
I
F
AR
dI/dt
I
RM
rr
Vdd
Vdd
Q = - Idt
t
rr
Rev 1: May 2012 www.aosmd.com Page 7 of 7