ee FAIRCHILD ee SEMICONDUCTOR 100307 Low Power Quint Exclusive OR/NOR Gate General Description The 100307 is monolithic quint exclusive-OR/NOR gate. The Function output is the wire-OR of all five exclusive-OR out- puts. All inputs have 50 kQ pull-down resistors. Features mw Low Power Operation @ 2000V ESD protection March 1998 w Pin/function compatible with 100107 w Voltage compensated operating range = -4.2V to -5.7V @ Available to industrial grade temperature range @ Available to MIL-STD-883 Ordering Code: Logic Symbol Dia Daa Dib Dob a Day 4 Dag a Dee Connection Diagrams F Oa Oa Ob Op Oc Oc Oa Og Oe on DS010682-1 Logic Equation F = (Dig Daa) + (Dip Dap) + (Die Dac) + (Dia Daa) + (Dye Dag). Pin Names Description Data Inputs Function Output Data Outputs Complementary Data Outputs 24-Pin DIP/SOIC 7 1 24E-Do, 2 23}-Di, 3 221-D,4 4 21P-Dog 5 20}D>, 6 19D, 7 18-Vee 8 17 Do, 9 16 Di, 10 15 Dog 11 14-Di, 12 13-0, DS010682-2 1998 Fairchild Semiconductor Corporation DS010682 www fairchildsemi.com 3}&5 YON/HO AAISNIOX_ JUINH 19M0d MO] ZOEOOLConnection Diagrams (Continued) 28-Pin PCC Dog D1a Om VeEs On Mp OF (4) 19 (2) (2) 7) 1) wi wt et et > Dip Dob Veg Vees Di. Doo Dag Dig O19 Oe VeES Og Oy Og DS010582-4 24-Pin Quad Cerpak Dod Dae Die VEE Dap Pip Li | | td 24 23 22 21 20 19 Dig! 18 Dp, Die-42 7D, Do, 43 16|0, e414 15F 0, 5 14-0, 04-46 13 Op 7 8 9 10 11 12 TrTrridrt Og F Vee Yoca % % DS010682-3 www fairchildsemi.com 2Absolute Maximum Ratings (note 1) Above which the useful life may be impaired. Storage Temperature (Tera) -65C to +150C Maximum Junction Temperature (Tj) Recommended Operating Conditions Case Temperature (Tg) Ceramic H175C Plastic +150C Vee Pin Potential to Ground Pin -7.0V to +0.5V Input Voltage (DC) Vee to +0.5V Output Current (DC Output HIGH) -50 mA ESD (Note 2) 22000V Commercial Version DC Electrical Characteristics Commercial 0C to +85C Industrial -40C to +85C Military -55C to +125C Supply Voltage (Vee) -5.7V to -4.2V Note 1: Absolute maximum ratings are those values beyond which the de- vice may be damaged or have its useful life impaired. Functional operation under these conditions is not implied. Note 2: ESD testing conforms to MIL-STD-883, Method 3015. Vee = 4.2V to -5.7V, Voo = Voca = GND, To = 0C to +85C (Note 3) Symbol Parameter Min Typ Max Units Conditions Vou Output HIGH Voltage -1025 -955 -870 mV Vin =Vin (Max) Loading with VoL Output LOW Voltage -1830 -1705 -1620 mV or Vit (min) 50Q to -2.0V Voue Output HIGH Voltage -1035 mV Vin = Vin aminy Loading with Vote Output LOW Voltage -1610 mV or Vit (Max) 50Q to -2.0V Vin Input HIGH Voltage -1165 -870 mV Guaranteed HIGH Signal for All Inputs Vit Input LOW Voltage -1830 -1475 mV Guaranteed LOW Signal for All Inputs lit Input LOW Current 0.50 HA Vin = Vic min) liq Input HIGH Current Dza-Dee 250 HA Vin = Vin (Max) DiaDie 350 lee Power Supply Current -69 -43 -30 mA Inputs Open Note 3: The specified limits represent the "worst case value for the parameter. Since these values normally occur at the temperature extremes, additional noise im- munity and guardbanding can be achieved by decreasing the allowable system operating ranges. Conditions for testing shown in the tables are chosen to guarantee operation under worst case conditions. DIP AC Electrical Characteristics Vee = -4.2V to -5.7V, Veo = Veca = GND Symbol Parameter To = OC To = +25C To = +85C Units Conditions Min Max Min Max Min Max teLH Propagation Delay 0.55 1.90 0.55 1.80 0.55 1.90 ns teHL Dga-Da, to O, ) teLy Propagation Delay 0.55 1.70 0.55 1.60 0.55 1.70 ns tout Dia-D1, to 0, 0 Figures 1, 2 teLy Propagation Delay 1.15 2.75 1.15 2.75 1.15 3.00 ns teu Data to F tty Transition Time 0.35 1.20 0.35 1.20 0.35 1.20 ns tH 20% to 80%, 80% to 20% 3 www fairchildsemi.comSOIC, PCC and Cerpak AC Electrical Characteristics Vee = 4.2V to -5.7V, Voo = Voca = GND Symbol Parameter To = OC To = +25C To = +85C Units Conditions Min Max Min Max Min Max teLy Propagation Delay 0.55 1.70 0.55 1.60 0.55 1.70 ns teHL DzaDa to O, 5 teLy Propagation Delay 0.55 1.50 0.55 1.40 0.55 1.50 ns SPH Pia Pre 0 0,0 Figures 1, 2 teLy Propagation Delay 1.15 2.55 1.15 2.55 1.15 2.80 ns teu Data to F tty Transition Time 0.35 1.10 0.35 1.10 0.35 1.10 ns tH 20% to 80%, 80% to 20% Industrial Version PCC DC Electrical Characteristics Vee = -4.2V to -5.7V, Veco = Veca = GND, To = -40C to +85C (Note 4) Symbol Parameter To = -40C To = OC to +85C | Units Conditions Min Max Min Max Vou Output HIGH Voltage |-1085 -870 -1025 -870 mV Vin = Vinqmax) Loading with Voi Output LOW Voltage |-1830 -1575 -1830 -1620 mV or Vitqminy 50Q to -2.0V Vouc Output HIGH Voltage |-1095 -1035 mV Vin = Vincminy Loading with Vote Output LOW Voltage -1565 -1610 mV or Vit(max 50Q to -2.0V Vin Input HIGH Voltage -1170 -870 -1165 -870 mV Guaranteed HIGH Signal for All Inputs Vit Input LOW Voltage -1830 -1480 -1830 -1475 mV Guaranteed LOW Signal for All Inputs lit Input LOW Current 0.50 0.50 HA Vin = Vicawiny liq Input HIGH Current DogDae 250 250 HA Vin = Vin(Max) Dia Die 350 350 lee Power Supply -69 -30 -69 -30 mA Inputs Open Current PCC AC Electrical Characteristics Ver = -4.2V to -5.7V, Vog = Voca = GND Note 4: The specified limits represent the "worst case value for the parameter. Since these values normally occur at the temperature extremes, additional noise im- munity and guardbanding can be achieved by decreasing the allowable system operating ranges. Conditions for testing shown in the tables are chosen to guarantee operation under worst case conditions. Symbol Parameter Te = -40C To = +25C To = +85C Units Conditions Min Max Min Max Min Max teLy Propagation Delay 0.45 1.70 0.55 1.60 0.55 1.70 ns Figures 1, 2 teHL DzaDa to O, 5 teLy Propagation Delay 0.45 1.50 0.55 1.40 0.55 1.50 ns teu DyaDy, 10.0, 0 teLy Propagation Delay 1.05 2.55 1.15 2.55 1.15 2.80 ns teu Data to F toy Transition Time 0.35 1.10 0.35 1.10 0.35 1.10 ns tH 20% to 80%, 80% to 20% www fairchildsemi.comMilitary Version DC Electrical Characteristics Vee = -4.2V to -5.7V, Veo = Veca = GND, To = -85C to +125C Symbol Parameter Min Max Units Te Conditions Notes Vou Output HIGH Voltage | -1025 | -870 mV 0C to +125C -1085 | -870 mV -55C Vin = Vin (Max) 1,2,3 Vo Output LOW Voltage -1830 | -1620 mV 0C to or Vi (Min) 50Q to -2.0V +125C -1830 | -1555 mV -55C Vouc Output HIGH Voltage | -1035 mV 0C to +125C -1085 mV -55C Vin = Vin (Min) 1,2,3 Vote Output LOW Voltage -1610 mV 0C to or Vi_ (Max) 500 to -2.0V +125C -1555 mV -55C Vin Input HIGH Voltage -1165 -870 mV 55C Guaranteed HIGH Signal 1,2,3,4 +125C for All Inputs Vit Input LOW Voltage -1830 | -1475 mV -55C to | Guaranteed LOW Signal 1,2,3,4 +125C for All Inputs lit Input LOW Current 0.50 HA -55C to | Veg = -4.2V 1,2,3 +125C Vin = Vit (Min) lia Input High Current DaaDae 250 HA 0C to Dia Die 350 +125C Vee = -5.7V 1,2,3 DaaDae 350 HA -55C Vin = Vin (Max) Dia Die 500 lee Power Supply Current -75 -25 mA -58C to Inputs Open 1,2,3 +125C Note 5: F100K 300 Series cold temperature testing is performed by temperature soaking (to guarantee junction temperature equals -55'C), then testing immediately without allowing for the junction temperature to stabilize due to heat dissipation after power-up. This provides cold start specs which can be considered a worst case condition at cold temperatures. Note 6: Screen tested 100% on each device at -55C, +25C, and +125C, Subgroups 1, 2 3, 7, and 8. Note 7: Sample tested (Method 5005, Table |) on each manufactured lot at -55C, +25C, and +125C, Subgroups A1, 2, 3, 7, and 8. Note 8: Guaranteed by applying specified input condition and testing VoH/VoL. AC Electrical Characteristics Vee = -4.2V to -5.7V, Veco = Veca = GND Symbol Parameter To = -55C To = +25C Te = +125C | Units Conditions Notes Min Max Min Max Min Max TeLH Propagation Delay 0.30 2.10 0.40 1.90 0.40 2.40 ns teHL Dga-Da, to O, 3 teLy Propagation Delay 0.30 1.90 0.40 1.80 0.40 2.20 ns 1,2,3 teu Dy,-D,, to 0,0 Figures 1,2 teLy Propagation Delay 0.80 2.90 0.90 2.80 0.90 3.40 ns teu Data to F troy Transition Time 0.20 1.70 0.30 1.60 0.20 1.70 ns 4 true 20% to 80%, 80% to 20% Note 9: F100K 300 Series cold temperature testing is performed by temperature soaking (to guarantee junction temperature equals -55C), then testing immediately after power-up. This provides cold start specs which can be considered a worst case condition at cold temperatures. Note 10: Screen tested 100% on each device at +25C temperature only, Subgroup AQ. Note 11: Sample tested (Method 5005, Table |) on each mfg. lot at +25C, Subgroup AQ, and at +125C and -55C temperatures, Subgroups A10 and A11. Note 12: Not tested at +25C, +125C, and -55C temperature (design characterization data). www fairchildsemi.comTest Circuitry u1 eN SCOPE 7 CHAN A Veo 9.4 1G (HT PULSE oO ONDER. mr SCOPE GENERATOR I TEST Va CHAN B 1 L gm, 7 Vee T" ~ DS010582-5 Notes: Voc. Veca = +2V, Veg = -2.5V L1 and L2 = equal length 50Q impedance lines Ry = 50Q terminator internal to scope Decoupling 0.1 pF from GND to Voc and Vee All unused outputs are loaded with 500 to GND C, = Fixture and stray capacitance < 3 pF FIGURE 1. AC Test Circuit Switching Waveforms 0.7+0.1 ns | << [~_ 0.7+0.1 ns +1.05 V INPUT +0.31V 1PHL>| < ! tPLH TRUE 50% OUTPUT tPLH - | < tPHL 5 COMPLEMENT nn [<tr DS010582-6 FIGURE 2. Propagation Delay and Transition Times www fairchildsemi.com 6Ordering Information The device number is used to form part of a simplified purchasing code where a package type and temperature range are defined as follows: 100307 D CG QB Device Type (Basic) TL Special Variation QB = Military grade device with Package Code environmental and burn-in processing D = Ceramic DIP F = Quad Cerpak Temperature Range Q = Plastic Leaded Chip Carrier (PCC) C = Commercial (0C to + 85C) P = Plastic DIP | = Industrial ( 40C to + 85C) (PCC S = Small Outline (SOIC) only) M = Military (55C to + 125C) DS010882-7 7 www fairchildsemi.comPhysical DimeNnSiONS inches (millimeters) unless otherwise noted 1.215 (30.86) 0.025 MAX 0.030 0.055 (0.64) 24 13 (0.76 1.40) RAD AA RAD TYP > 0.390 (8.91) MAX >) ~ f LEGA CT oT Gt tA GA Gt Ge Ge CA ul] 1 2 ef Ratt vw 0.005 GLASS 0.0500.060 5), : 0.4000.430 1 (0.13) SEALANT (1271.52) "YP 0.015 0.055 15 (10.16 10.92) (4.57) MIN TYP (0.38 1.40) 1 MAX T 4 XN 2 y 0.225 | | p My (5.72) i\ Vmax Tv ! 8694 A t \ 90 100 0.0080.012 pel ag 9.008 - 0.012 NP TYP (0.200.30) 0.125 TYP 0.055 6.9900.110 _, | 0.015 0.021 (3.18) 0.435-0.535 (1.40) (2.29 2.79) (0.38 0.53) MIN (11.05-13.59) MAX TYP TYP TYP TYP BOTH ENDS J24E (REV Ji 24-Pin Ceramic Dual-In-Line Package (D) Package Number J24E =o 0.6141 B 015985 15.60 15.20 24 23 22 21 20 19 18 17 16 15 14 LEAD NO 1 IDENTIFICATION \J-}- - - - 5 5 6 7 8 9 10 11 12 b0138 0.010 0.508 | YP o[si3 Lae |p| 0.1043 0.350 0.0125 0.0926 45 5378 2.009" TYP ALL LEADS 2.65 0.0118 x 0.75 0.23 2135 ft 9.0040 0:25 | THEE | SEATING =A _ \. PLANE F a] 9.004 8 MAX TYP-F 0.014 ALL LEAD TIPS Ooreo ALL LEADS 0.35 >| fx SoS TYP ALL LEADS 0.40 M24B (REY F) 24-Lead Molded Package (0.300" Wide) (S) Package Number M24B www fairchildsemi.com9.035-0.045 R To.a9-1.14] IN 1.194-1.214 [30.33-30.84] 0.202 24 [5.13] 13 DOO ooo 5 b) 0.337-0.347 [8.56-8.81] u OUOUOUOIOI OU u 12 o 0.125 24-Lead Plastic Dual-In-Line Package (P) PIN NO. 1 IDENT [3.18] 0.125-0.135 4 0.060 0.039 [3.18-3.43] TYP |e 4X | [1.52] [0.99] 0.065 [1.65] 0.145-0.200_| | } [3.68-5.08] 6-44 9.020 iy L__ 0.125-0.140 1, noo Ip [0.51] [3.18-3.56] ! | |___0.047-0.057 0.050 typ [1.19-1.45] [1.27] 0.090-0.110 0.015-0.021 [0.38-0.53] |? [2.29-2.79] TYP Package Number N24E Physical DimensiON$ inches (millimeters) unless otherwise noted (Continued) 0.390-0.410 [9.91-10.41] 90-100 0.380 yin [9.65] +0.040 0.428 10-040 +1.02] 0.009-0.015 [10.87 5 35] [0.23-0.38] N24E (REV A) www fairchildsemi.comPhysical DimMeNnSiONS inches (millimeters) unless otherwise noted (Continued) +0.006 7 2450 oreae 40.15 Sha WENT 450 x 7708s [1.14] 9.01740.004 typ 4 1 26 i 02940. ore (0.4340, 10] [0.7440.08] ly _ [25 [ o 4] + H 0.41040.020 U [10.4140.51] O U [lis 12 18 SEATING PLANE [i271 re |e a : be 9-029 in Typ 0.300 typ [0.54] [7.62] 0.1050.015 typ age y 9-045 [2.6740.38] [1.14] 0.165-0.180 TYP [4.19-4.57] TH ] 0.004 [0.10] 0.490+0.005 TYP [12.450.13] V28A (REV k) 28-Lead Plastic Leaded Chip Carrier (Q) Package Number V28A aml www fairchildsemi.com100307 Low Power Quint Exclusive OR/NOR Gate Physical DimensiON$ inches (millimeters) unless otherwise noted (Continued) 0.360 ~ 9.250 TYP > PIN ND. 1 N (MOLDED BODY) 0.370 MIN 0.360 TYP 9959 TYP {24 19 111 18 fz __ | 1 _ J 6 3> 7 12 0.018 | 0.075 MAX o.o1g TYP 8 PLCS 0.050 + 0.005 , TYP LIFE SUPPORT POLICY 0.400 MAX ___,,. | TYP GLASS 0.007 * I~ o.o04 TYP 0.050 Pl 01035 -~t 0.085 MAX W248 (REV Di 24-Pin Quad Cerpak (F) Package Number W24B FAIRCHILDS PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DE- VICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT OF FAIRCHILD SEMI- CONDUCTOR CORPORATION. As used herein: 1. Life support devices or systems are devices or sys- tems which, (a) are intended for surgical implant into the body, or (b) support or sustain life, failure to perform when properly used with instructions for use provided in th be reasonably expected to result inas and (c) whose in accordance e labeling, can ignificant injury 2. Accritical component in any component of a life support device or system whose failure to perform can be rea- sonably expected to cause the failure of the life support device or system, or to affect its safety or effectiveness. to the user. Fairchild Semiconductor Fairchild Corporation Europe Semiconductor Americas Fax: +49 (0) 1 80-530 85 86 Customer Response Center Tel: 1-888-522-5372 Deutsch English Italy www fairchildsemi.com Email: europe.support@nsc.com Tel: +49 (0) 8 141-35-0 Tel: +44 (0) 1 793-85-68-56 Tel: +39 (0) 2 57 5631 Fairchild Semiconductor Hong Kong Ltd. 13th Floor, Straight Block, Ocean Centre, & Canton Rd. Tsimshatsui, Kowloon Hong Kong Tel: +852 2737-7200 Fax: +852 2314-0061 National Semiconductor Japan Ltd. Tel: 81-3-5620-6175 Fax: 81-3-5620-6179 Fairchild does not assume any responsibility for use of any circuitry described, no circuit patent licenses are implied and Fairchild reserves the right at any time without notice to change said circuitry and specifications.