NCN3612B
http://onsemi.com
4
PIN FUNCTION AND DESCRIPTION
Pin Name Description
6, 17, 22, 27,
34,50, 55
VDD DC Supply, 3.3 V $10%
1, 11, 16, 20, 21,
28, 29, 35, 48,
49, 56
GND Power Ground.
Exposed Pad −The exposed pad on the backside of package is internally connected to Gnd. Externally the exposed
pad should also be user−connected to GND.
2 SEL SEL controls the mux through a flow−through latch. Do not float this pin.
SEL = 0 for PCIE Mode; SEL = 1 for DP Mode
3 LE LE controls the latch gate. Do not float this pin.
4 IN_0+ Differential input from GMCH PCIE outputs. IN_0+ makes a differential pair with IN_0−.
5 IN_0−Differential input from GMCH PCIE outputs. IN_0− makes a differential pair with IN_0+.
7 IN_1+ Differential input from GMCH PCIE outputs. IN_1+ makes a differential pair with IN_1−.
8 IN_1−Differential input from GMCH PCIE outputs. IN_1− makes a differential pair with IN_1+.
9 IN_2+ Differential input from GMCH PCIE outputs. IN_2+ makes a differential pair with IN_2−.
10 IN_2−Differential input from GMCH PCIE outputs. IN_2− makes a differential pair with IN_2+.
12 IN_3+ Differential input from GMCH PCIE outputs. IN_3+ makes a differential pair with IN_3−.
13 IN_3−Differential input from GMCH PCIE outputs. IN_3− makes a differential pair with IN_3+.
14 OUT+ Pass−through output from AUX+ input when SEL = 1. Pass−through output from Rx0+ input when
SEL = 0.
15 OUT−Pass−through output from AUX− input when SEL = 1. Pass−through output from Rx0− input when
SEL = 0.
18 X+ X+ is an analog pass−through output corresponding to Rx1+.
19 X−X− is an analog pass−through output corresponding to the Rx1− input. The path
from Rx1− to X− must be matched with the path from Rx1+ to X+. X+ and X− form a
differential pair when the pass−through mux mode is selected.
23 Rx1−Differential input from PCIE connector or device. Rx1− makes a differential pair with Rx1+. Rx1− is
passed through to the X− pin on the path that matches the Rx1+ to X+ pin.
24 Rx1+ Differential input from PCIE connector or device. Rx1+ makes a differential pair with Rx1−. Rx1+ is
passed through to the X+ pin when SEL = 0.
25 Rx0−Differential input from PCIE connector or device. Rx0− makes a differential pair with Rx0+. Rx0− is
passed through to the OUT− pin when SEL = 0.
26 Rx0+ Differential input from PCIE connector or device. Rx0+ makes a differential pair with Rx0−. Rx0+ is
passed through to the OUT+ pin when SEL = 0.
30 HPD2 Negative low frequency HPD input handshake protocol signal (normally not connected).
31 HPD1 Positive low frequency HPD input handshake protocol signal.
32 AUX−Differential input from HDMI/DP connector. AUX− makes a differential
pair with AUX+. AUX− is passed through to the OUT− pin when SEL = 1.
33 AUX+ Differential input from HDMI/DP connector. AUX+ makes a differential
pair with AUX−. AUX+ is passed through to the OUT+ pin when SEL = 1.
37, 36 Tx3+, Tx3−Analog pass−through output#2 corresponding to IN_3+ and IN_3− when SEL = 0.
39, 38 Tx2+, Tx2−Analog pass−through output#2 corresponding to IN_2+ and IN_2− when SEL = 0.
41, 40 Tx1+, Tx1−Analog pass−through output#2 corresponding to IN_1+ and IN_1− when SEL = 0.
43, 42 Tx0+, Tx0−Analog pass−through output#2 corresponding to IN_0+ and IN_0− when SEL = 0.
45, 44 D3+, D3−Analog pass−through output#1 corresponding to IN_3+ and IN_3−, when SEL = 1.
47, 46 D2+, D2−Analog pass−through output#1 corresponding to IN_2+ and IN_2−, when SEL = 1.
52, 51 D1+, D1−Analog pass−through output#1 corresponding to IN_1+ and IN_1−, when SEL = 1.
54, 53 D0+, D0−Analog pass−through output#1 corresponding to IN_0+ and IN_0−, when SEL = 1.