Surface Mount PIN Diodes
Technical Data
Features
• Unique Configurations in
Surface Mount Packages
– Add Flexibility
– Save Board Space
– Reduce Cost
• Switching
– Low Distortion Switching
– Low Capacitance
• Attenuating
– Low Current Attenuating for
Less Power Consumption
• Matched Diodes for
Consistent Performance
• Better Thermal
Conductivity for Higher
Power Dissipation
• Low Failure in Time (FIT)
Rate[1]
• Lead-free Option Available
Note:
1. For more information see the
Surface Mount PIN Reliability Data
Sheet.
HSMP-386x Series
Description/Applications
The HSMP-386x series of general
purpose PIN diodes are designed
for two classes of applications.
The first is attenuators where
current consumption is the most
important design consideration.
The second application for this
series of diodes is in switches
where low capacitance is the
driving issue for the designer.
The HSMP-386x series Total
Capacitance (C
T
) and Total
Resistance (R
T
) are typical specifi-
cations. For applications that
require guaranteed performance,
the general purpose HSMP-383x
series is recommended.
A SPICE model is not available
for PIN diodes as SPICE does not
provide for a key PIN diode
characteristic, carrier lifetime.
Notes:
1. Package marking provides
orientation, identification, and
date code.
2. See “Electrical Specifications” for
appropriate package marking.
Pin Connections and
Package Marking, SOT-363
LUx
1
2
3
6
5
4
2
Package Lead Code
Identification, SOT-23
(Top View)
Package Lead Code
Identification, SOT-323
(Top View)
COMMON
CATHODE
#4
COMMON
ANODE
#3
SERIES
#2
SINGLE
#0
COMMON
CATHODE
F
COMMON
ANODE
E
SERIES
C
SINGLE
B
Package Lead Code
Identification, SOT-363
(Top View)
UNCONNECTED
TRIO
L
123
654
Electrical Specifications TC = 25°C, each diode
PIN General Purpose Diodes, Typical Specifications TA = 25°C
Package Minimum Typical Typical
Part Number Marking Lead Breakdown Series Resistance Total Capacitance
HSMP- Code Code Configuration Voltage VBR (V) RS (Ω)C
T (pF)
3860 L0[1] 0 Single 50 3.0/1.5* 0.20
3862 L2[1] 2 Series
3863 L3[1] 3 Common Anode
3864 L4[1] 4 Common Cathode
386B L0[2] B Single
386C L2[2] C Series
386E L3[2] E Common Anode
386F L4[2] F Common Cathode
386L LL[2] L Unconnected Trio
Test Conditions VR = VBR IF = 10 mA VR = 50 V
Measure f = 100 MHz f = 1 MHz
IR ≤ 10 µAIF = 100 mA*
Notes:
1. Package marking code is laser marked.
Absolute Maximum Ratings[1] TC = +25°C
Symbol Parameter Unit SOT-23 SOT-323
IfForward Current (1 µs Pulse) Amp 1 1
PIV Peak Inverse Voltage V 50 50
TjJunction Temperature °C 150 150
Tstg Storage Temperature °C -65 to 150 -65 to 150
θjc Thermal Resistance[2] °C/W 500 150
Notes:
1. Operation in excess of any one of these conditions may result in permanent damage to
the device.
2. TC = +25°C, where TC is defined to be the temperature at the package pins where
contact is made to the circuit board.
ESD WARNING:
Handling Precautions Should Be
Taken To Avoid Static Discharge.
3
HSMP-386x Typical Parameters at TC = 25°C
Part Number Total Resistance Carrier Lifetime Reverse Recovery Time Total Capacitance
HSMP- RT (Ω)τ (ns) Trr (ns) CT (pF)
386x 22 500 80 0.20
Test Conditions IF = 1 mA IF = 50 mA VR = 10 V VR = 50 V
f = 100 MHz TR = 250 mA IF = 20 mA f = 1 MHz
90% Recovery
Typical Performance, TC = 25°C, each diode
Figure 1. RF Capacitance vs. Reverse
Bias.
0.15
0.30
0.25
0.20
0.35
02 64101281614 18 20
TOTAL CAPACITANCE (pF)
REVERSE VOLTAGE (V)
1 GHz
100 MHz
1 MHz
120
115
110
105
100
95
90
85
11030
I
F
– FORWARD BIAS CURRENT (mA)
Figure 3. 2nd Harmonic Input
Intercept Point vs. Forward Bias
Current for Switch Diodes.
INPUT INTERCEPT POINT (dBm)
Diode Mounted as a
Series Switch in a
50 Ω Microstrip and
Tested at 123 MHz
FORWARD CURRENT (mA)
Figure 4. Reverse Recovery Time vs.
Forward Current for Various Reverse
Voltages.
T
rr
– REVERSE RECOVERY TIME (ns)
10
100
1000
10 20 30
V
R
= 5V
V
R
= 10V
V
R
= 20V
Figure 2. Typical RF Resistance vs.
Forward Bias Current.
0.01 100
1000
110
RESISTANCE (OHMS)
BIAS CURRENT (mA)
10
100
10.1
TA = +85°C
TA = +25°C
TA = –55°C
100
10
1
0.1
0.01
0 0.2 0.4 0.6 0.8 1.0 1.2
I
F
– FORWARD CURRENT (mA)
V
F
– FORWARD VOLTAGE (mA)
Figure 5. Forward Current vs.
Forward Voltage.
125°C 25°C–50°C
Equivalent Circuit Model
HSMP-386x Chip*
0.12 pF
1.5 Ω
R
j
R
s
C
j
R
j
= 12 Ω
I
0.9
R
T
= 1.5 + R
j
C
T
= C
P
+ C
j
I = Forward Bias Current in mA
* See AN1124 for package models
4
Typical Applications for Multiple Diode Products
Figure 10. Four Diode π Attenuator. See AN1048 for details.
INPUT RF IN/OUT
FIXED
BIAS
VOLTAGE
VARIABLE BIAS
Figure 6. Simple SPDT Switch, Using Only Positive
Current.
Figure 7. High Isolation SPDT Switch, Dual Bias.
Figure 8. Switch Using Both Positive and Negative
Current.
Figure 9. Very High Isolation SPDT Switch, Dual Bias.
RF COMMON
RF 1
BIAS 1
RF 2
BIAS 2
RF COMMON
BIAS BIAS
RF 2
RF 1
RF COMMON
RF 1 RF 2
BIAS
RF COMMON
RF 2
RF 1
BIAS
5
Typical Applications for Multiple Diode Products (continued)
RF in RF out
1
+V
0
2
0
+V
“ON”
“OFF”
456
1
11
2
2
3
1
123
4
056
b1 b2 b3
2
3
1
11
RF in RF out
2
2
3
456
1
0
0
2
+V
–V
“ON”
“OFF”
Figure 12. HSMP-386L Unconnected Trio used in a
Positive Voltage, High Isolation Switch.
Figure 14. HSMP-386L Unconnected Trio used in a
Dual Voltage, High Isolation Switch.
Figure 13. HSMP-386L used in a SP3T Switch.
BIAS
Figure 11. High Isolation SPST Switch
(Repeat Cells as Required).
Ordering Information
Specify part number followed by option. For example:
HSMP - 386x - XXX
Bulk or Tape and Reel Option
Part Number; x = Lead Code
Surface Mount PIN
Option Descriptions
-BLK = Bulk, 100 pcs. per antistatic bag
-TR1 = Tape and Reel, 3000 devices per 7" reel
-TR2 = Tape and Reel, 10,000 devices per 13" reel
Tape and Reeling conforms to Electronic Industries RS-481, “Taping of
Surface Mounted Components for Automated Placement.”
For lead-free option, the part number will have the character "G" at the
end, eg. -TR2G for a 10K pc lead-free reel.
6
Assembly Information
SOT-323 PCB Footprint
Recommended PCB pad layouts
for the miniature SOT packages
are shown in Figures 15, 16, 17.
These layouts provide ample
allowance for package placement
by automated assembly equipment
without adding parasitics that
could impair the performance.
0.026
0.035
0.07
0.016
Figure 15. PCB Pad Layout, SOT-323.
(dimensions in inches).
0.026
0.075
0.016
0.035
Figure 16. PCB Pad Layout, SOT-363.
(dimensions in inches).
0.037
0.95
0.037
0.95
0.079
2.0
0.031
0.8
DIMENSIONS IN inches
mm
0.035
0.9
Figure 17. PCB Pad Layout, SOT-23.
TIME (seconds)
TMAX
TEMPERATURE (°C)
0
0
50
100
150
200
250
60
Preheat
Zone Cool Down
Zone
Reflow
Zone
120 180 240 300
Figure 18. Surface Mount Assembly Profile.
SMT Assembly
Reliable assembly of surface
mount components is a complex
process that involves many
material, process, and equipment
factors, including: method of
heating (e.g., IR or vapor phase
reflow, wave soldering, etc.)
circuit board material, conductor
thickness and pattern, type of
solder alloy, and the thermal
conductivity and thermal mass of
components. Components with a
low mass, such as the SOT
package, will reach solder reflow
temperatures faster than those
with a greater mass.
Agilent’s diodes have been
qualified to the time-temperature
profile shown in Figure 18. This
profile is representative of an IR
reflow type of surface mount
assembly process.
After ramping up from room
temperature, the circuit board
with components attached to it
(held in place with solder paste)
passes through one or more
preheat zones. The preheat zones
increase the temperature of the
board and components to prevent
thermal shock and begin evaporat-
ing solvents from the solder paste.
The reflow zone briefly elevates
the temperature sufficiently to
produce a reflow of the solder.
The rates of change of tempera-
ture for the ramp-up and cool-
down zones are chosen to be low
enough to not cause deformation
of the board or damage to compo-
nents due to thermal shock. The
maximum temperature in the
reflow zone (TMAX) should not
exceed 235°C.
These parameters are typical for a
surface mount assembly process
for Agilent diodes. As a general
guideline, the circuit board and
components should be exposed
only to the minimum tempera-
tures and times necessary to
achieve a uniform reflow of
solder.
7
Package Dimensions
Outline SOT-323 (SC-70, 3 Lead)
Package Characteristics
Lead Material ............................ Copper (SOT-323/363); Alloy 42 (SOT-23)
Lead Finish ............................................................................ Tin-Lead 85-15%
Maximum Soldering Temperature .............................. 260°C for 5 seconds
Minimum Lead Strength .......................................................... 2 pounds pull
Typical Package Inductance .................................................................. 2 nH
Typical Package Capacitance .............................. 0.08 pF (opposite leads)
Outline 23 (SOT-23)
Outline 363 (SC-70, 6 Lead)
3
12
SIDE VIEW
TOP VIEW
END VIEW
DIMENSIONS ARE IN MILLIMETERS
(
INCHES
)
1.02 (0.040)
0.89 (0.035)
0.60 (0.024)
0.45 (0.018)
1.40 (0.055)
1.20 (0.047)
2.65 (0.104)
2.10 (0.083)
3.06 (0.120)
2.80 (0.110)
2.04 (0.080)
1.78 (0.070)
1.02 (0.041)
0.85 (0.033)
0.152 (0.006)
0.066 (0.003)
0.10 (0.004)
0.013 (0.0005)
0.69 (0.027)
0.45 (0.018)
0.54 (0.021)
0.37 (0.015)
X X X
PACKAGE
MARKING
CODE (XX)
DATE CODE (X)
2.20 (0.087)
2.00 (0.079)
1.35 (0.053)
1.15 (0.045)
1.30 (0.051)
REF.
0.650 BSC (0.025)
2.20 (0.087)
1.80 (0.071)
0.10 (0.004)
0.00 (0.00)
0.25 (0.010)
0.15 (0.006)
1.00 (0.039)
0.80 (0.031) 0.20 (0.008)
0.10 (0.004)
0.30 (0.012)
0.10 (0.004)
0.30 REF.
10°
0.425 (0.017)
TYP.
DIMENSIONS ARE IN MILLIMETERS
(
INCHES
)
PACKAGE
MARKING
CODE (XX)
X X X
DATE CODE (X)
2.20 (0.087)
2.00 (0.079)
1.35 (0.053)
1.15 (0.045)
1.30 (0.051)
REF.
0.650 BSC (0.025)
2.20 (0.087)
1.80 (0.071)
0.10 (0.004)
0.00 (0.00)
0.25 (0.010)
0.15 (0.006)
1.00 (0.039)
0.80 (0.031)
0.20 (0.008)
0.10 (0.004)
0.30 (0.012)
0.10 (0.004)
0.30 REF.
10°
0.425 (0.017)
TYP.
DIMENSIONS ARE IN MILLIMETERS
(
INCHES
)
PACKAGE
MARKING
CODE (XX)
X X X
DATE CODE (X)
8
Device Orientation
USER
FEED
DIRECTION
COVER TAPE
CARRIER
TAPE
REEL
Tape Dimensions and Product Orientation
For Outline SOT-23
For Outlines SOT-23, -323
Note: "AB" represents package marking code.
"C" represents date code.
END VIE
W
8 mm
4 mm
TOP VIEW
ABC ABC ABC ABC
END VIE
W
8 mm
4 mm
TOP VIEW
Note: "AB" represents package marking code.
"C" represents date code.
ABC ABC ABC ABC
For Outline SOT-363
9° MAX
A0
P
P0
D
P2
E
F
W
D1
Ko 8° MAX
B0
13.5° MAX
t1
DESCRIPTION SYMBOL SIZE (mm) SIZE (INCHES)
LENGTH
WIDTH
DEPTH
PITCH
BOTTOM HOLE DIAMETER
A0
B0
K0
P
D1
3.15 ± 0.10
2.77 ± 0.10
1.22 ± 0.10
4.00 ± 0.10
1.00 + 0.05
0.124 ± 0.004
0.109 ± 0.004
0.048 ± 0.004
0.157 ± 0.004
0.039 ± 0.002
CAVITY
DIAMETER
PITCH
POSITION
D
P0
E
1.50 + 0.10
4.00 ± 0.10
1.75 ± 0.10
0.059 + 0.004
0.157 ± 0.004
0.069 ± 0.004
PERFORATION
WIDTH
THICKNESS
W
t1
8.00 + 0.30 – 0.10
0.229 ± 0.013
0.315 + 0.012 – 0.004
0.009 ± 0.0005
CARRIER TAPE
CAVITY TO PERFORATION
(WIDTH DIRECTION)
CAVITY TO PERFORATION
(LENGTH DIRECTION)
F
P2
3.50 ± 0.05
2.00 ± 0.05
0.138 ± 0.002
0.079 ± 0.002
DISTANCE
BETWEEN
CENTERLINE
Tape Dimensions and Product Orientation
For Outlines SOT-323, -363
P
P
0
P
2
F
W
C
D
1
D
E
A
0
An
t
1
(CARRIER TAPE THICKNESS) T
t
(COVER TAPE THICKNESS)
An
B
0
K
0
DESCRIPTION SYMBOL SIZE (mm) SIZE (INCHES)
LENGTH
WIDTH
DEPTH
PITCH
BOTTOM HOLE DIAMETER
A
0
B
0
K
0
P
D
1
2.40 ± 0.10
2.40 ± 0.10
1.20 ± 0.10
4.00 ± 0.10
1.00 + 0.25
0.094 ± 0.004
0.094 ± 0.004
0.047 ± 0.004
0.157 ± 0.004
0.039 + 0.010
CAVITY
DIAMETER
PITCH
POSITION
D
P
0
E
1.55 ± 0.05
4.00 ± 0.10
1.75 ± 0.10
0.061 ± 0.002
0.157 ± 0.004
0.069 ± 0.004
PERFORATION
WIDTH
THICKNESS
W
t
1
8.00 ± 0.30
0.254 ± 0.02
0.315 ± 0.012
0.0100 ± 0.0008
CARRIER TAPE
CAVITY TO PERFORATION
(WIDTH DIRECTION)
CAVITY TO PERFORATION
(LENGTH DIRECTION)
F
P
2
3.50 ± 0.05
2.00 ± 0.05
0.138 ± 0.002
0.079 ± 0.002
DISTANCE
FOR SOT-323 (SC70-3 LEAD) An 8°C MAX
FOR SOT-363 (SC70-6 LEAD) 10°C MAX
ANGLE
WIDTH
TAPE THICKNESS
C
T
t
5.4 ± 0.10
0.062 ± 0.001
0.205 ± 0.004
0.0025 ± 0.00004
COVER TAPE
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Data subject to change.
Copyright © 2004 Agilent Technologies, Inc.
Obsoletes 5988-7917EN
March 24, 2004
5989-0485EN
