Semiconductor Components Industries, LLC, 2013
June, 2013 Rev. 16
1Publication Order Number:
CAT5112/D
CAT5112
32‐tap Digital
Potentiometer (POT)
with Buffered Wiper
Description
The CAT5112 is a single digital POT designed as an electronic
replacement for mechanical potentiometers. Ideal for automated
adjustments on high volume production lines, they are also well suited
for applications where equipment requiring periodic adjustment is
either difficult to access or located in a hazardous or remote
environment.
The CAT5112 contains a 32-tap series resistor array connected
between two terminals RH and RL. An up/down counter and decoder
that are controlled by three input pins, determines which tap is
connected to the wiper, RWB. The CAT5112 wiper is buffered by an op
amp that operates rail to rail. The wiper setting, stored in non-volatile
memory, is not lost when the device is powered down and is
automatically recalled when power is returned. The wiper can be
adjusted to test new system values without effecting the stored setting.
Wiper-control of the CAT5112 is accomplished with three input
control pins, CS, U/D, and INC. The INC input increments the wiper
in the direction which is determined by the logic state of the U/D input.
The CS input is used to select the device and also store the wiper
position prior to power down.
The digital POT can be used as a buffered voltage divider. For
applications where the potentiometer is used as a 2-terminal variable
resistor, please refer to the CAT5114. The buffered wiper of the
CAT5112 is not compatible with that application.
Features
32-position Linear Taper Potentiometer
Non-volatile EEPROM Wiper Storage; Buffered Wiper
Low Power CMOS Technology
Single Supply Operation: 2.5 V 6.0 V
Increment Up/Down Serial Interface
Resistance Values: 10 kW, 50 kW and 100 kW
Available in PDIP, SOIC, TSSOP and MSOP Packages
These Devices are Pb-Free, Halogen Free/BFR Free and are RoHS
Compliant
Applications
Automated Product Calibration
Remote Control Adjustments
Offset, Gain and Zero Control
Tamper-proof Calibrations
Contrast, Brightness and Volume Controls
Motor Controls and Feedback Systems
Programmable Analog Functions
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PIN CONFIGURATIONS
RH
RWB
RL
U/D
INC
VCC
CS
1
See detailed ordering and shipping information in the package
dimensions section on page 10 of this data sheet.
ORDERING INFORMATION
SOIC8
V SUFFIX
CASE 751BD
MSOP8
Z SUFFIX
CASE 846AD
GND
PDIP (L), SOIC (V), MSOP (Z)
PDIP8
L SUFFIX
CASE 646AA
TSSOP8
Y SUFFIX
CASE 948AL
Increment ControlINC
Up/Down ControlU/D
Potentiometer High TerminalRH
GroundGND
Buffered Wiper TerminalRWB
Potentiometer Low TerminalRL
FunctionPin Name
PIN FUNCTION
Chip SelectCS
Supply VoltageVCC
TSSOP (Y)
(Top Views)
GND
RH
U/D
INC
RWB
CS
VCC
RL
1
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Figure 1. Functional Diagram Figure 2. Electronic Potentiometer Implementation
Control
and
Memory
Power On Recall
GND
+
+
U/D
INC
CS
VCC
RWB
RH
RL
RWB
RL
RH
Pin Description
INC: Increment Control Input
The INC input (on the falling edge) moves the wiper in the
up or down direction determined by the condition of the U/D
input.
U/D: Up/Down Control Input
The U/D input controls the direction of the wiper movement.
When in a high state and CS is low, any hightolow
transition on INC will cause the wiper to move one
increment toward the RH terminal. When in a low state and
CS is low, any high-to-low transition on INC will cause the
wiper to move one increment towards the RL terminal.
RH: High End Potentiometer Terminal
RH is the high end terminal of the potentiometer. It is not
required that this terminal be connected to a potential greater
than the RL terminal. Voltage applied to the RH terminal
cannot exceed the supply voltage, VCC or go below ground,
GND.
RWB: Wiper Potentiometer Terminal (Buffered)
RWB is the buffered wiper terminal of the potentiometer. Its
position on the resistor array is controlled by the control
inputs, INC, U/D and CS.
RL: Low End Potentiometer Terminal
RL is the low end terminal of the potentiometer. It is not
required that this terminal be connected to a potential less
than the RH terminal. Voltage applied to the RL terminal
cannot exceed the supply voltage, VCC or go below ground,
GND. RL and RH are electrically interchangeable.
CS: Chip Select
The chip select input is used to activate the control input of
the CAT5112 and is active low. When in a high state, activity
on the INC and U/D inputs will not affect or change the
position of the wiper.
Device Operation
The CAT5112 operates like a digitally controlled
potentiometer with RH and RL equivalent to the high and low
terminals and RWB equivalent to the mechanical
potentiometers wiper. There are 32 available tap positions
including the resistor end points, RH and RL. There are 31
resistor elements connected in series between the RH and RL
terminals. The wiper terminal is connected to one of the 32
taps and controlled by three inputs, INC, U/D and CS. These
inputs control a five-bit up/down counter whose output is
decoded to select the wiper position. The selected wiper
position can be stored in nonvolatile memory using the INC
and CS inputs.
With CS set LOW the CAT5112 is selected and will
respond to the U/D and INC inputs. HIGH to LOW
transitions on INC will increment or decrement the wiper
(depending on the state of the U/D input and five-bit
counter). The wiper, when at either fixed terminal, acts like
its mechanical equivalent and does not move beyond the last
position. The value of the counter is stored in nonvolatile
memory whenever CS transitions HIGH while the INC input
is also HIGH. When the CAT5112 is powered-down, the last
stored wiper counter position is maintained in the
nonvolatile memory. When power is restored, the contents
of the memory are recalled and the counter is set to the value
stored.
With INC set low, the CAT5112 may be deselected and
powered down without storing the current wiper position in
nonvolatile memory. This allows the system to always
power up to a preset value stored in nonvolatile memory.
CAT5112
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Table 1. OPERATION MODES
INC CS U/D Operation
High to Low Low High Wiper toward RH
High to Low Low Low Wiper toward RL
High Low to High XStore Wiper Position
Low Low to High XNo Store, Return to Standby
X High X Standby
Figure 3. Potentiometer Equivalent Circuit
CW
RL
CL
CH
RWB
RWI
RH
Table 2. ABSOLUTE MAXIMUM RATINGS
Parameters Ratings Units
Supply Voltage
VCC to GND 0.5 to +7
V
Inputs
CS to GND 0.5 to VCC +0.5
V
INC to GND 0.5 to VCC +0.5 V
U/D to GND 0.5 to VCC +0.5 V
RH to GND 0.5 to VCC +0.5 V
RL to GND 0.5 to VCC +0.5 V
RWB to GND 0.5 to VCC +0.5 V
Operating Ambient Temperature
Commercial (‘C’ or Blank suffix) 0 to 70
C
Industrial (‘I’ suffix) 40 to +85 C
Junction Temperature +150 C
Storage Temperature 65 to +150 C
Lead Soldering (10 s max) +300 C
Stresses exceeding Maximum Ratings may damage the device. Maximum Ratings are stress ratings only. Functional operation above the
Recommended Operating Conditions is not implied. Extended exposure to stresses above the Recommended Operating Conditions may affect
device reliability.
Table 3. RELIABILITY CHARACTERISTICS
Symbol Parameter Test Method Min Typ Max Units
VZAP (Note 1) ESD Susceptibility MILSTD883, Test Method 3015 2000 V
ILTH (Notes 1, 2) Latch-Up JEDEC Standard 17 100 mA
TDR Data Retention MILSTD883, Test Method 1008 100 Years
NEND Endurance MILSTD883, Test Method 1003 1,000,000 Stores
1. This parameter is tested initially and after a design or process change that affects the parameter.
2. Latch-up protection is provided for stresses up to 100 mA on address and data pins from 1 V to VCC + 1 V
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Table 4. DC ELECTRICAL CHARACTERISTICS (VCC = +2.5 V to +6 V unless otherwise specified)
Symbol Parameter Conditions Min Typ Max Units
POWER SUPPLY
VCC Operating Voltage Range 2.5 6 V
ICC1 Supply Current (Increment) VCC = 6 V, f = 1 MHz, IW = 0 200 mA
VCC = 6 V, f = 250 kHz, IW = 0 100 mA
ICC2 Supply Current (Write) Programming, VCC = 6 V 1000 mA
VCC = 3 V 500 mA
ISB1 (Note 4) Supply Current (Standby) CS = VCC 0.3 V
U/D, INC = VCC 0.3 V or GND
75 150 mA
LOGIC INPUTS
IIH Input Leakage Current VIN = VCC 10 mA
IIL Input Leakage Current VIN = 0 V 10 mA
VIH1 TTL High Level Input Voltage 4.5 V VCC 5.5 V 2 VCC V
VIL1 TTL Low Level Input Voltage 0 0.8 V
VIH2 CMOS High Level Input Voltage 2.5 V VCC 6 V VCC x 0.7 VCC + 0.3 V
VIL2 CMOS Low Level Input Voltage 0.3 VCC x 0.2 V
POTENTIOMETER CHARACTERISTICS
RPOT Potentiometer Resistance 10 Device 10 kW
50 Device 50
00 Device 100
Pot. Resistance Tolerance 20 %
VRH Voltage on RH pin 0 VCC V
VRL Voltage on RL pin 0 VCC V
Resolution 1 %
INL Integral Linearity Error IW 2 mA0.5 1 LSB
DNL Differential Linearity Error IW 2 mA0.25 0.5 LSB
ROUT Buffer Output Resistance 0.05 VCC VWB 0.95 VCC,
VCC = 5 V
1W
IOUT Buffer Output Current 0.05 VCC VWB 0.95 VCC,
VCC = 5 V
3 mA
TCRPOT TC of Pot Resistance 300 ppm/C
TCRATIO Ratiometric TC 20 ppm/C
CRH/CRL/CRW Potentiometer Capacitances 8/8/25 pF
fc Frequency Response Passive Attenuator, 10 kW1.7 MHz
VWB(SWING) Output Voltage Range IOUT 100 mA, VCC = 5 V 0.01 VCC 0.99 VCC
3. This parameter is tested initially and after a design or process change that affects the parameter.
4. Latch-up protection is provided for stresses up to 100 mA on address and data pins from 1 V to VCC + 1 V
5. IW = source or sink
6. These parameters are periodically sampled and are not 100% tested.
CAT5112
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Table 5. AC TEST CONDITIONS
VCC Range 2.5 V VCC 6 V
Input Pulse Levels 0.2 VCC to 0.7 VCC
Input Rise and Fall Times 10 ns
Input Reference Levels 0.5 VCC
Table 6. AC OPERATING CHARACTERISTICS (VCC = +2.5 V to +6.0 V, VH = VCC, VL = 0 V, unless otherwise specified)
Symbol Parameter Min Typ (Note 7) Max Units
tCI CS to INC Setup 100 ns
tDI U/D to INC Setup 50 ns
tID U/D to INC Hold 100 ns
tIL INC LOW Period 250 ns
tIH INC HIGH Period 250 ns
tIC INC Inactive to CS Inactive 1 ms
tCPH CS Deselect Time (NO STORE) 100 ns
tCPH CS Deselect Time (STORE) 10 ms
tIW INC to VOUT Change 1 5 ms
tCYC INC Cycle Time 1 ms
tR, tF (Note 8) INC Input Rise and Fall Time 500 ms
tPU (Note 8) Power-up to Wiper Stable 1 ms
tWR Store Cycle 5 10 ms
7. Typical values are for TA = 25C and nominal supply voltage.
8. This parameter is periodically sampled and not 100% tested.
9. MI in the A.C. Timing diagram refers to the minimum incremental change in the W output due to a change in the wiper position.
Figure 4. A.C. Timing
90% 90%
10%
(store)
tR
tF
MI(3)
tIC tCPH
tIW
RWB
U/D
INC
CS
tCI
tDI tID
tIL tIH
tCYC
CAT5112
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PACKAGE DIMENSIONS
PDIP8, 300 mils
CASE 646AA
ISSUE A
E1
D
A
L
eb
b2
A1
A2
E
eB
c
TOP VIEW
SIDE VIEW END VIEW
PIN # 1
IDENTIFICATION
Notes:
(1) All dimensions are in millimeters.
(2) Complies with JEDEC MS-001.
SYMBOL MIN NOM MAX
A
A1
A2
b
b2
c
D
e
E1
L
0.38
2.92
0.36
6.10
1.14
0.20
9.02
2.54 BSC
3.30
5.33
4.95
0.56
7.11
1.78
0.36
10.16
eB 7.87 10.92
E 7.62 8.25
2.92 3.80
3.30
0.46
6.35
1.52
0.25
9.27
7.87
CAT5112
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PACKAGE DIMENSIONS
SOIC 8, 150 mils
CASE 751BD
ISSUE O
E1 E
A
A1
h
θ
L
c
eb
D
PIN # 1
IDENTIFICATION
TOP VIEW
SIDE VIEW END VIEW
Notes:
(1) All dimensions are in millimeters. Angles in degrees.
(2) Complies with JEDEC MS-012.
SYMBOL MIN NOM MAX
θ
A
A1
b
c
D
E
E1
e
h
0.10
0.33
0.19
0.25
4.80
5.80
3.80
1.27 BSC
1.75
0.25
0.51
0.25
0.50
5.00
6.20
4.00
L0.40 1.27
1.35
CAT5112
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PACKAGE DIMENSIONS
TSSOP8, 4.4x3
CASE 948AL
ISSUE O
E1 E
A2
A1
e
b
D
c
A
TOP VIEW
SIDE VIEW END VIEW
q1
L1 L
Notes:
(1) All dimensions are in millimeters. Angles in degrees.
(2) Complies with JEDEC MO-153.
SYMBOL
θ
MIN NOM MAX
A
A1
A2
b
c
D
E
E1
e
L1
L
0.05
0.80
0.19
0.09
0.50
2.90
6.30
4.30
0.65 BSC
1.00 REF
1.20
0.15
1.05
0.30
0.20
0.75
3.10
6.50
4.50
0.90
0.60
3.00
6.40
4.40
CAT5112
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PACKAGE DIMENSIONS
MSOP 8, 3x3
CASE 846AD
ISSUE O
E1E
A2
A1 e b
D
c
A
TOP VIEW
SIDE VIEW END VIEW
L1
L2
L
DETAIL A
DETAIL A
Notes:
(1) All dimensions are in millimeters. Angles in degrees.
(2) Complies with JEDEC MO-187.
SYMBOL MIN NOM MAX
q
θ
A
A1
A2
b
c
D
E
E1
e
L
L2
0.05
0.75
0.22
0.13
0.40
2.90
4.80
2.90
0.65 BSC
0.25 BSC
1.10
0.15
0.95
0.38
0.23
0.80
3.10
5.00
3.10
0.60
3.00
4.90
3.00
L1 0.95 REF
0.10
0.85
CAT5112
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10
Table 7. ORDERING INFORMATION
Device Order Number
Specific Device
Marking
Package
Type
Temperature
Range
Lead
Finish Shipping
CAT5112VI10GT3 CAT5112V SOIC840C to +85C NiPdAu Tape & Reel, 3,000 Units / Reel
CAT5112VI50GT3 CAT5112V SOIC840C to +85C NiPdAu Tape & Reel, 3,000 Units / Reel
CAT5112VI00GT3 CAT5112V SOIC840C to +85C NiPdAu Tape & Reel, 3,000 Units / Reel
CAT5112YI10GT3 A22 TSSOP840C to +85C NiPdAu Tape & Reel, 3,000 Units / Reel
CAT5112YI50GT3 A24 TSSOP840C to +85C NiPdAu Tape & Reel, 3,000 Units / Reel
CAT5112YI00GT3 A25 TSSOP840C to +85C NiPdAu Tape & Reel, 3,000 Units / Reel
CAT5112ZI10GT3 ABPN MSOP840C to +85C NiPdAu Tape & Reel, 3,000 Units / Reel
CAT5112ZI50GT3 ABPN MSOP840C to +85C NiPdAu Tape & Reel, 3,000 Units / Reel
CAT5112ZI00GT3 ABPN MSOP840C to +85C NiPdAu Tape & Reel, 3,000 Units / Reel
CAT5112LI10G CAT5112L PDIP840C to +85C NiPdAu Rail, 50 Units
CAT5112LI50G CAT5112L PDIP840C to +85C NiPdAu Rail, 50 Units
CAT5112LI00G CAT5112L PDIP840C to +85C NiPdAu Rail, 50 Units
For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging
Specifications Brochure, BRD8011/D.
10.For detailed information and a breakdown of device nomenclature and numbering systems, please see the ON Semiconductor Device
Nomenclature document, TND310/D, available at www.onsemi.com
ON Semiconductor and are registered trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC owns the rights to a number of patents, trademarks,
copyrights, trade secrets, and other intellectual property. A listing of SCILLC’s product/patent coverage may be accessed at www.onsemi.com/site/pdf/PatentMarking.pdf. SCILLC
reserves the right to make changes without further notice to any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any
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PUBLICATION ORDERING INFORMATION
N. American Technical Support: 8002829855 Toll Free
USA/Canada
Europe, Middle East and Africa Technical Support:
Phone: 421 33 790 2910
Japan Customer Focus Center
Phone: 81358171050
CAT5112/D
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