677
Audio ICs BH3857AFV
(2) Surround 2 The surround matrix construction is shown in the dia-
gram on the left.
The gain calculations are given by the formulas in the dia-
gram.
FOperation notes
We guarantee the application example, but recommend
that you thoroughly check its characteristics and pay
attention to the points of caution given below.If you
change any of the external component values, check
both the static and transient characteristics of the circuit,
and allow sufficient margin in your selections to take into
account variations in the components and ICs.
(1) Operating power supply voltage range
The basic circuit functions are guaranteed to operate if
the circuit is operated within the recommended tempera-
ture and supply voltage ranges. Please confirm the val-
ues of the circuit constants, voltage setting, and tempera-
ture in actual use.
(2) Step switching noise
The VC (pin 37), TC (pin 36), BC (pin 35), and SC (pin 25)
terminals have components connected to them in the ap-
plication example. The values of these components may
need to be changed depending on the signal level setting
and PCB pattern. Investigate carefully before deciding
on the values of the various circuit constants.
The equivalent circuit for these terminals is given below
(an integrator circuit is set at the first stage to slow the
variation).
(3) Volume and tone level settings
This specification sheet gives reference values for the
amount of attenuation and gain with respect to the serial
control data.
The internal D/A convertor is an R-2R circuit, and data
exists for the places where continuous variation does not
occur between data.
Use this when fine setting is required. The setting limits
are up to 8 bits for volume (256 steps) and 5 bits (32
steps) for tone.
(4) Digital / analog separation
The digital and analog power supplies and grounds are
completely separate. The digital circuits are supplied
from a stable reference source that is on the chip (Vref (pin
31)). For this reason, there is no need to worry about tim-
ing shifts, or interference due to digital noise.
(5) Output ports
Ports 1 to 4 (pins 26 to 29), are reset when the power is
applied. The reset state continues until the next serial
data is input.
Note: The CK, DATA and LATCH line data must be held
low up until the next data is input after power is ap-
plied.
SDo not apply more than 15V to the output ports.
(6) DC control
An internal impedance of 10kΩ is seen from the VC (pin
37), TC (pin 36), and BC (pin 35) terminals, and 200kΩ
is seen from the SC (pin 25) terminal, so with regard to
DC control, we recommend direct control with the voltage
source.
When using variable volume, take the impedance into
consideration when making the setting.
Note: The DC control voltage range is 0V to Vref.
Do not apply voltages above Vref to the terminals.