REVISIONS LTR DESCRIPTION DATE (YR-MO-DA) APPROVED A Add vendor CAGE number 75569. Add device type 02. Add case outline S. Technical changes in table I. Editorial changes throughout. 89-03-28 D. M. Cool B Update boilerplate to MIL-PRF-38535 requirements. Editorial changes throughout. - LTG 03-08-22 Thomas M. Hess C Add footnote 5/ for test condition of total power supply current (ICC) to table I. Update boilerplate paragraphs to the current MIL-PRF-38535 requirements. - LTG 10-01-14 Thomas M. Hess D Add footnote 7/ for total power supply current (ICC) in table I. Update boilerplate paragraphs to the current MIL-PRF-38535 requirements. - MAA 10-12-28 Thomas M. Hess REV SHEET REV SHEET REV STATUS REV D D D D D D D D D D D D OF SHEETS SHEET 1 2 3 4 5 6 7 8 9 10 11 12 PMIC N/A PREPARED BY Monica L. Poelking STANDARD MICROCIRCUIT DRAWING DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 http://www.dscc.dla.mil CHECKED BY Ray Monnin APPROVED BY THIS DRAWING IS AVAILABLE FOR USE BY ALL DEPARTMENTS AND AGENCIES OF THE DEPARTMENT OF DEFENSE AMSC N/A D. M. Cool DRAWING APPROVAL DATE 87-11-03 REVISION LEVEL D MICROCIRCUIT, DIGITAL, FAST CMOS, INVERTING OCTAL LINE DRIVER/BUFFER WITH THREE-STATE OUTPUTS, TTL COMPATIBLE INPUTS, MONOLITHIC SILICON SIZE CAGE CODE A 67268 SHEET DSCC FORM 2233 APR 97 5962-87655 1 OF 12 5962-E140-11 1. SCOPE 1.1 Scope. This drawing describes device requirements for MIL-STD-883 compliant, non-JAN class level B microcircuits in accordance with MIL-PRF-38535, appendix A. 1.2 Part or Identifying Number (PIN). The complete PIN is as shown in the following example: 5962-87655 01 R A Drawing number Device type (see 1.2.1) Case outline (see 1.2.2) Lead finish (see 1.2.3) 1.2.1 Device type(s). The device type(s) identify the circuit function as follows: Generic number Device type Circuit function 01 54FCT240 Inverting octal line driver/buffer with three-state, TTL compatible inputs 02 54FCT240A Inverting octal line driver/buffer with three-state, TTL compatible inputs 1.2.2 Case outline(s). The case outline(s) are as designated in MIL-STD-1835 and as follows: Outline letter R S 2 Descriptive designator GDIP1-T20 or CDIP2-T20 GDFP2-F20 or CDFP3-F20 CQCC1-N20 Terminals Package style 20 20 20 Dual-in-line Flat pack Square leadless chip carrier 1.2.3 Lead finish. The lead finish is as specified in MIL-PRF-38535, appendix A. 1.3 Absolute maximum ratings. 1/ Supply voltage range ........................................................... -0.5 V dc to +6.0 V dc Input voltage range .............................................................. -0.5 V dc to VCC + 0.5 V dc Output voltage range............................................................ -0.5 V dc to VCC + 0.5 V dc DC input diode current (IIK)................................................... -20 mA DC output diode current (IOK) ............................................... -50 mA DC output current ................................................................. 100 mA Maximum power dissipation (PD) 2/ .................................... 500 mW Thermal resistance, junction-to-case (JC) ........................... See MIL-STD-1835 Storage temperature range .................................................. -65C to +150C Junction temperature (TJ) ..................................................... +175C Lead temperature (soldering, 10 seconds) ........................... +300C 1.4 Recommended operating conditions. Supply voltage range (VCC) .................................................. Maximum low level input voltage (VIL) .................................. Minimum high level input voltage (VIH) ................................. Case operating temperature range (TC) ............................... +4.5 V dc to +5.5 V dc 0.8 V dc 2.0 V dc -55C to +125C 1/ All voltages are referenced to GND. 2/ Must withstand the added PD due to short circuit test; e.g., IOS. STANDARD MICROCIRCUIT DRAWING DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 DSCC FORM 2234 APR 97 SIZE 5962-87655 A REVISION LEVEL D SHEET 2 2. APPLICABLE DOCUMENTS 2.1 Government specification, standards, and handbooks. The following specification, standards, and handbooks form a part of this drawing to the extent specified herein. Unless otherwise specified, the issues of these documents are those cited in the solicitation or contract. DEPARTMENT OF DEFENSE SPECIFICATION MIL-PRF-38535 - Integrated Circuits, Manufacturing, General Specification for. DEPARTMENT OF DEFENSE STANDARDS MIL-STD-883 MIL-STD-1835 - Test Method Standard Microcircuits. Interface Standard Electronic Component Case Outlines. DEPARTMENT OF DEFENSE HANDBOOKS MIL-HDBK-103 MIL-HDBK-780 - List of Standard Microcircuit Drawings. Standard Microcircuit Drawings. (Copies of these documents are available online at https://assist.daps.dla.mil/quicksearch/ or from the Standardization Document Order Desk, 700 Robbins Avenue, Building 4D, Philadelphia, PA 19111-5094.) 2.2 Order of precedence. In the event of a conflict between the text of this drawing and the references cited herein, the text of this drawing takes precedence. Nothing in this document, however, supersedes applicable laws and regulations unless a specific exemption has been obtained. 3. REQUIREMENTS 3.1 Item requirements. The individual item requirements shall be in accordance with MIL-PRF-38535, appendix A for nonJAN class level B devices and as specified herein. Product built to this drawing that is produced by a Qualified Manufacturer Listing (QML) certified and qualified manufacturer or a manufacturer who has been granted transitional certification to MIL-PRF-38535 may be processed as QML product in accordance with the manufacturers approved program plan and qualifying activity approval in accordance with MIL-PRF-38535. This QML flow as documented in the Quality Management (QM) plan may make modifications to the requirements herein. These modifications shall not affect form, fit, or function of the device. These modifications shall not affect the PIN as described herein. A "Q" or "QML" certification mark in accordance with MIL-PRF-38535 is required to identify when the QML flow option is used. 3.2 Design, construction, and physical dimensions. The design, construction, and physical dimensions shall be as specified in MIL-PRF-38535, appendix A and herein. 3.2.1 Case outline(s). The case outline(s) shall be in accordance with 1.2.2 herein. 3.2.2 Terminal connections. The terminal connections shall be as specified on figure 1. 3.2.3 Truth table. The truth table shall be as specified on figure 2. 3.2.4 Logic diagram. The logic diagram shall be as specified on figure 3. 3.2.5 Switching waveforms and test circuit. The switching waveforms and test circuit shall be as specified on figure 4. 3.3 Electrical performance characteristics. Unless otherwise specified herein, the electrical performance characteristics are as specified in table I and shall apply over the full (case or ambient) operating temperature range. 3.4 Electrical test requirements. The electrical test requirements shall be the subgroups specified in table II. The electrical tests for each subgroup are described in table I. STANDARD MICROCIRCUIT DRAWING DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 DSCC FORM 2234 APR 97 SIZE 5962-87655 A REVISION LEVEL D SHEET 3 3.5 Marking. Marking shall be in accordance with MIL-PRF-38535, appendix A. The part shall be marked with the PIN listed in 1.2 herein. In addition, the manufacturer's PIN may also be marked. For packages where marking of the entire SMD PIN number is not feasible due to space limitations, the manufacturer has the option of not marking the "5962-" on the device. 3.5.1 Certification/compliance mark. A compliance indicator "C" shall be marked on all non-JAN devices built in compliance to MIL-PRF-38535, appendix A. The compliance indicator "C" shall be replaced with a "Q" or "QML" certification mark in accordance with MIL-PRF-38535 to identify when the QML flow option is used. 3.6 Certificate of compliance. A certificate of compliance shall be required from a manufacturer in order to be listed as an approved source of supply in MIL-HDBK-103 (see 6.6 herein). The certificate of compliance submitted to DSCC-VA prior to listing as an approved source of supply shall affirm that the manufacturer's product meets the requirements of MIL-PRF-38535, appendix A and the requirements herein. 3.7 Certificate of conformance. A certificate of conformance as required in MIL-PRF-38535, appendix A shall be provided with each lot of microcircuits delivered to this drawing. 3.8 Notification of change. Notification of change to DLA Land and Maritime-VA shall be required for any change that affects this drawing. 3.9 Verification and review. DLA Land and Maritime, DLA Land and Maritime's agent, and the acquiring activity retain the option to review the manufacturer's facility and applicable required documentation. Offshore documentation shall be made available onshore at the option of the reviewer. STANDARD MICROCIRCUIT DRAWING DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 DSCC FORM 2234 APR 97 SIZE 5962-87655 A REVISION LEVEL D SHEET 4 TABLE I. Electrical performance characteristics. Test Symbol Test conditions -55C TC +125C VCC = 5.0 V dc 10% unless otherwise specified Device type Group A subgroups Limits Min Unit Max IOH = -300 A All 1, 2, 3 4.3 IOH = -12 mA All 1, 2, 3 2.4 IOL = +300 A All 1, 2, 3 0.2 IOL = +32 mA All 1, 2, 3 0.5 VCC = 4.5 V, IIN = -18 mA All 1 -1.2 V IIH VCC = 5.5 V, VIN = 5.5 V All 1, 2, 3 5.0 A IIL VCC = 5.5 V, VIN = GND All 1, 2, 3 -5.0 A High impedance output current IOZH VCC = 5.5 V, VIN = 5.5 V All 1, 2, 3 10 A IOZL VCC = 5.5 V, VIN = GND All 1, 2, 3 -10 Short circuit output current IOS VCC = 5.5 V 1/ All 1, 2, 3 Quiescent power supply current (CMOS inputs) ICCQ VIN 0.2 V or VIN 5.3 V VCC = 5.5 V fi = 0 MHz All 1, 2, 3 1.5 mA Quiescent power supply current (TTL inputs) ICC VCC = 5.5 V VIN = 3.4 V 2/ All 1, 2, 3 2.0 mA Dynamic power supply current ICCD VCC = 5.5 V OE = GND VIN 5.3 V or VIN 0.2 V One bit toggling 50% duty cycle Output open All 3/ 0.25 mA/ MHz Total power supply current 4/ 5/ 7/ ICC VCC = 5.5 V Outputs open OE = GND One bit toggling 50% duty cycle fi = 10 MHz VIN 5.3 V or VIN 0.2 V All 1, 2, 3 4.0 mA VIN 3.4 V or VIN = GND All 1, 2, 3 4.8 mA High level output voltage VOH Low level output voltage VOL Input clamp voltage VIK High level input current Low level input current VCC = 4.5 V VIL = 0.8 V VIH = 2.0 V VCC = 4.5 V VIL = 0.8 V VIH = 2.0 V V V -60 mA See footnotes at end of table. STANDARD MICROCIRCUIT DRAWING DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 DSCC FORM 2234 APR 97 SIZE 5962-87655 A REVISION LEVEL D SHEET 5 TABLE I. Electrical performance characteristics - Continued. Test Input capacitance Output capacitance Symbol Test conditions -55C TC +125C VCC = 5.0 V dc 10% unless otherwise specified Device type Group A subgroups Limits Min Unit Max CIN See 4.3.1c All 4 10 pF COUT See 4.3.1c All 4 12 pF See 4.3.1d All 7, 8 CL = 50 pF 10% RL = 500 5% See figure 4 6/ 01 9, 10, 11 1.5 9.0 ns 02 9, 10, 11 1.5 5.1 01 9, 10, 11 1.5 10.5 02 9, 10, 11 1.5 6.5 01 9, 10, 11 1.5 12.5 02 9, 10, 11 1.5 5.9 Functional tests Propagation delay time, Dn to On tPLH, tPHL Output enable time, OEn to On tPZH, tPZL Output disable time, OEn to On tPHZ, tPLZ ns ns 1/ Not more than one output should be shorted at one time, and the duration of the short circuit condition should not exceed one second. 2/ TTL driven input (VIN = 3.4 V); all other inputs at VCC or GND. 3/ This parameter is not directly testable, but is derived for use in total power supply calculations. 4/ ICC = ICCQ + (ICC x DH x NT) + (ICCD x fI x NI) Where: DH = Duty cycle for TTL inputs high. NT = Number of TTL inputs at DH. fI = Input frequency in MHz. NI = Number of inputs at fI. 5/ For ICC test in an ATE environment, the effect of parasitic output capacitive loading from the test environment must be taken into account, as its effect is not intended to be included in the test results. The impact must be characterized and appropriate offset factors must be applied to the test result. 6/ The minimum limits are guaranteed, if not tested, to the specified limits. 7/ The Supplier/ Vendor (cage code 0C7V7 ) devices meet total power supply current limit, Icc = 5.5 mA at VIN 5.3 V or VIN 0.2 V, and Icc = 6.0 mA at VIN 3.4 V or VIN = GND; although table I stated Icc = 4.0 mA and 4.8 mA. STANDARD MICROCIRCUIT DRAWING DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 DSCC FORM 2234 APR 97 SIZE 5962-87655 A REVISION LEVEL D SHEET 6 Device types 01 and 02 Case outlines R, S, and 2 Terminal number Terminal symbol 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 OEA DA0 OB0 DA1 OB1 DA2 OB2 DA3 OB3 GND DB3 OA3 DB2 OA2 DB1 OA1 DB0 OA0 OEB VCC FIGURE 1. Terminal connections. Device types 01 and 02 Inputs Output OEA, OEB DAn, DBn OAn, OBn L L H L H L H X Z L = Low voltage level H = High voltage level X = Irrelevant Z = High impedance state FIGURE 2. Truth table. STANDARD MICROCIRCUIT DRAWING DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 DSCC FORM 2234 APR 97 SIZE 5962-87655 A REVISION LEVEL D SHEET 7 FIGURE 3. Logic diagram. STANDARD MICROCIRCUIT DRAWING DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 DSCC FORM 2234 APR 97 SIZE 5962-87655 A REVISION LEVEL D SHEET 8 NOTES: 1. Diagram shown for input control enable - low and input control disable - high. 2. Pulse generator for all pulses: tf 2.5 ns, tr 2.5 ns. FIGURE 4. Switching waveforms and test circuit. STANDARD MICROCIRCUIT DRAWING DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 DSCC FORM 2234 APR 97 SIZE 5962-87655 A REVISION LEVEL D SHEET 9 Switch position Test Switch tPLZ tPZL All other Closed Closed Open NOTES: 1. RL = 500. 2. CL = 50 pF; load capacitance includes jig and probe capacitance. 3. RT = Termination resistance should be equal to ZOUT of pulse generators. FIGURE 4. Switching waveforms and test circuit - Continued. STANDARD MICROCIRCUIT DRAWING DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 DSCC FORM 2234 APR 97 SIZE 5962-87655 A REVISION LEVEL D SHEET 10 4. VERIFICATION 4.1 Sampling and inspection. Sampling and inspection procedures shall be in accordance with MIL-PRF-38535, appendix A. 4.2 Screening. Screening shall be in accordance with method 5004 of MIL-STD-883, and shall be conducted on all devices prior to quality conformance inspection. The following additional criteria shall apply: a. Burn-in test, method 1015 of MIL-STD-883. (1) Test condition A, B, C, or D. The test circuit shall be maintained by the manufacturer under document revision level control and shall be made available to the preparing or acquiring activity upon request. The test circuit shall specify the inputs, outputs, biases, and power dissipation, as applicable, in accordance with the intent specified in method 1015 of MIL-STD-883. (2) TA = +125C, minimum. b. Interim and final electrical test parameters shall be as specified in table II herein, except interim electrical parameter tests prior to burn-in are optional at the discretion of the manufacturer. TABLE II. Electrical test requirements. MIL-STD-883 test requirements Interim electrical parameters (method 5004) Final electrical test parameters (method 5004) Group A test requirements (method 5005) Groups C and D end-point electrical parameters (method 5005) Subgroups (in accordance with MIL-STD-883, method 5005, table I) --1*, 2, 3, 7, 8, 9, 10, 11 1, 2, 3, 4, 7, 8, 9, 10, 11 1, 2, 3, 7, 9 * PDA applies to subgroup 1. 4.3 Quality conformance inspection. Quality conformance inspection shall be in accordance with method 5005 of MIL-STD-883 including groups A, B, C, and D inspections. The following additional criteria shall apply. 4.3.1 Group A inspection. a. Tests shall be as specified in table II herein. b. Subgroups 5 and 6 in table I, method 5005 of MIL-STD-883 shall be omitted. c. Subgroup 4 (CIN measurement) shall be measured only for the initial test and after process or design changes which may affect input capacitance. Test all applicable pins on five devices with zero failures. d. Subgroups 7 and 8 shall include verification of the truth table as specified on figure 2 herein. STANDARD MICROCIRCUIT DRAWING DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 DSCC FORM 2234 APR 97 SIZE 5962-87655 A REVISION LEVEL D SHEET 11 4.3.2 Groups C and D inspections. a. End-point electrical parameters shall be as specified in table II herein. b. Steady-state life test conditions, method 1005 of MIL-STD-883. (1) Test condition A, B, C, or D. The test circuit shall be maintained by the manufacturer under document revision level control and shall be made available to the preparing or acquiring activity upon request. The test circuit shall specify the inputs, outputs, biases, and power dissipation, as applicable, in accordance with the intent specified in method 1005 of MIL-STD-883. (2) TA = +125C, minimum. (3) Test duration: 1,000 hours, except as permitted by method 1005 of MIL-STD-883. 5. PACKAGING 5.1 Packaging requirements. The requirements for packaging shall be in accordance with MIL-PRF-38535, appendix A. 6. NOTES 6.1 Intended use. Microcircuits conforming to this drawing are intended for use for Government microcircuit applications (original equipment), design applications, and logistics purposes. 6.2 Replaceability. Microcircuits covered by this drawing will replace the same generic device covered by a contractorprepared specification or drawing. 6.3 Configuration control of SMD's. All proposed changes to existing SMD's will be coordinated with the users of record for the individual documents. This coordination will be accomplished using DD Form 1692, Engineering Change Proposal. 6.4 Record of users. Military and industrial users should inform DLA Land and Maritime, when a system application requires configuration control and the applicable SMD. DLA Land and Maritime will maintain a record of users and this list will be used for coordination and distribution of changes to the drawings. Users of drawings covering microelectronics devices (FSC 5962) should contact DLA Land and Maritime -VA, telephone (614) 692-0544. 6.5 Comments. Comments on this drawing should be directed to DLA Land and Maritime -VA, Columbus, Ohio 432183990, or telephone (614) 692-0547. 6.6 Approved sources of supply. Approved sources of supply are listed in MIL-HDBK-103. The vendors listed in MIL-HDBK-103 have agreed to this drawing and a certificate of compliance (see 3.6 herein) has been submitted to and accepted by DLA Land and Maritime -VA. STANDARD MICROCIRCUIT DRAWING DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 DSCC FORM 2234 APR 97 SIZE 5962-87655 A REVISION LEVEL D SHEET 12 STANDARD MICROCIRCUIT DRAWING BULLETIN DATE: 10-12-28 Approved sources of supply for SMD 5962-87655 are listed below for immediate acquisition information only and shall be added to MIL-HDBK-103 and QML-38535 during the next revision. MIL-HDBK-103 and QML-38535 will be revised to include the addition or deletion of sources. The vendors listed below have agreed to this drawing and a certificate of compliance has been submitted to and accepted by DLA Land and Maritime-VA. This information bulletin is superseded by the next dated revision of MIL-HDBK-103 and QML-38535. DLA Land and Maritime maintains an online database of all current sources of supply at http://www.dscc.dla.mil/Programs/Smcr/. Standard microcircuit drawing PIN 1/ Vendor CAGE number Vendor similar PIN 2/ 5962-8765501RA 0C7V7 54FCT240DMQB 5962-8765501SA 0C7V7 54FCT240FMQB 5962-87655012A 0C7V7 54FCT240LMQB 5962-8765502RA 3/ IDT54FCT240ADB 5962-8765502SA 3/ IDT54FCT240AEB 5962-87655022A 3/ IDT54FCT240ALB 1/ The lead finish shown for each PIN representing a hermetic package is the most readily available from the manufacturer listed for that part. If the desired lead finish is not listed contact the vendor to determine its availability. 2/ Caution. Do not use this number for item acquisition. Items acquired to this number may not satisfy the performance requirements of this drawing. 3/ Not available from an approved source of supply. Vendor CAGE number 0C7V7 Vendor name and address QP Semiconductor 2945 Oakmead Village Court Santa Clara, CA 95051 The information contained herein is disseminated for convenience only and the Government assumes no liability whatsoever for any inaccuracies in the information bulletin.