CC2510Fx/CC2511Fx
SWRZ014C Page 3 of 6
// Initialization of source buffers and DMA descriptor for the DMA transfer
unsigned char __xdata PM2_BUF[7] = {0x06,0x06,0x06,0x06,0x06,0x06,0x04};
unsigned char __xdata PM3_BUF[7] = {0x07,0x07,0x07,0x07,0x07,0x07,0x04};
unsigned char __xdata dmaDesc[8] = {0x00,0x00,0xDF,0xBE,0x00,0x07,0x20,0x42};
// Store current DMA channel 0 descriptor and abort any ongoing transfers if
// the channel is in use
unsigned char storedDescHigh = DMA0CFGH;
unsigned char storedDescLow = DMA0CFGL;
DMAARM |= 0x81;
// Update descriptor with correct source
// NB! Replace &PM2_BUF with &PM3_BUF if powermode 3 is chosen instead
dmaDesc[0] = (unsigned int)& PM2_BUF >> 8;
dmaDesc[1] = (unsigned int)& PM2_BUF;
// Associate the descriptor with DMA channel 0 and arm the DMA channel
DMA0CFGH = (unsigned int)&dmaDesc >> 8;
DMA0CFGL = (unsigned int)&dmaDesc;
DMAARM = 0x01;
// NOTE! At this point, make sure all interrupts that will not be used to
// wake from PM are disabled as described in chapter 13.1.3 of the datasheet.
// Align with positive 32 kHz clock edge as described in chapter 13.8.2
// of the datasheet.
char temp = WORTIME0;
while( temp == WORTIME0);
// Make sure XOSC is powered down when entering PM2/3 and that the flash
// cache is disabled
// NB! Replace 0x06 with 0x07 if power mode 3 is chosen instead
MEMCTR |= 0x02;
SLEEP = 0x06;
// Enter power mode as described in chapter 13.1.3 in the datasheet.
// Make sure DMA channel 0 is triggered just before setting PCON.IDLE
asm("NOP");
asm("NOP");
asm("NOP");
if( SLEEP & 0x03 ) {
asm(“MOV 0xD7,#0x01”); // DMAREQ = 0x01;
asm(“NOP”); // Needed to perfectly align the DMA transfer
asm(“ORL 0x87,#0x01”); // PCON |= 0x01;
asm("NOP");
}
// Enable Flash Cache
MEMCTR &= ~0x02;
// Update DMA channel 0 with original descriptor and arm channel if it was in
// use before PM was entered
DMA0CFGH = storedDescHigh;
DMA0CFGL = storedDescLow;
DMAARM = 0x01;